diff --git a/examples/system/.build-test-rules.yml b/examples/system/.build-test-rules.yml
index f4d6b6b869..6e4cdcc0af 100644
--- a/examples/system/.build-test-rules.yml
+++ b/examples/system/.build-test-rules.yml
@@ -118,10 +118,6 @@ examples/system/ipc/ipc_isr/riscv:
   enable:
     - if: IDF_TARGET_ARCH_RISCV == 1 and ESP_IPC_ISR_ENABLE == 1
       reason: The test is intended only for multi-core chips
-  disable_test:
-    - if: IDF_TARGET == "esp32p4"
-      temporary: true
-      reason: lack of runners
   depends_components:
     - esp_system
 
diff --git a/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py b/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py
index cd1bba908a..17e981e051 100644
--- a/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py
+++ b/examples/system/ipc/ipc_isr/riscv/pytest_ipc_isr_riscv.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+# SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
 import pytest
 from pytest_embedded import Dut
@@ -6,15 +6,14 @@ from pytest_embedded import Dut
 
 @pytest.mark.esp32p4
 @pytest.mark.generic
-@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='lack of runner')
 def test_ipc_isr_riscv(dut: Dut) -> None:
     dut.expect_exact('example: Start')
-    dut.expect_exact('example: MSTATUS = 0x3880')
+    dut.expect_exact('example: MSTATUS = 0x11880')
     dut.expect_exact('example: in[0] = 0x1')
     dut.expect_exact('example: in[1] = 0x2')
     dut.expect_exact('example: in[2] = 0x3')
     dut.expect_exact('example: out[0] = (in[0] | in[1] | in[2]) = 0x3')
     dut.expect_exact('example: out[1] = (in[0] + in[1] + in[2]) = 0x6')
     dut.expect_exact('example: out[2] = MCAUSE of other cpu = 0xb800002c')
-    dut.expect_exact('example: out[3] = MSTATUS of other cpu = 0x3880')
+    dut.expect_exact('example: out[3] = MSTATUS of other cpu = 0x11880')
     dut.expect_exact('example: End')