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esp_phy: use spinlock to avoid regi2c access conflicts
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@ -34,11 +34,16 @@ extern "C" {
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#else
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/* Access internal registers, don't use in application */
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uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
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uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
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void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
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void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
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/* enter the critical section that protects internal registers. Don't use it in SDK. Use the functions above. */
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void regi2c_enter_critical(void);
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void regi2c_exit_critical(void);
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#endif // BOOTLOADER_BUILD
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/* Convenience macros for the above functions, these use register definitions
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@ -43,6 +43,16 @@ void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_
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portEXIT_CRITICAL_SAFE(&mux);
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}
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void IRAM_ATTR regi2c_enter_critical(void)
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{
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portENTER_CRITICAL_SAFE(&mux);
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}
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void IRAM_ATTR regi2c_exit_critical(void)
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{
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portEXIT_CRITICAL_SAFE(&mux);
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}
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/**
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* Restore regi2c analog calibration related configuration registers.
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* This is a workaround, and is fixed on later chips
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@ -5,6 +5,8 @@ if(IDF_TARGET STREQUAL "esp32c2")
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return()
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endif()
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set(srcs "src/phy_override.c" "src/lib_printf.c")
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if(CONFIG_APP_NO_BLOBS)
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set(link_binary_libs 0)
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set(ldfragments)
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@ -14,11 +16,10 @@ else()
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endif()
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if(IDF_TARGET STREQUAL "esp32h2")
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set(srcs "src/phy_init_esp32hxx.c")
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list(APPEND srcs "src/phy_init_esp32hxx.c")
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else()
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set(srcs "src/phy_init.c")
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list(APPEND srcs "src/phy_init.c")
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endif()
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list(APPEND srcs "src/lib_printf.c")
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idf_build_get_property(build_dir BUILD_DIR)
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@ -29,23 +30,23 @@ if(CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN)
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endif()
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if(CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN_EMBED)
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idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS "include" "${idf_target}/include"
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PRIV_REQUIRES nvs_flash efuse
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LDFRAGMENTS "${ldfragments}"
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EMBED_FILES "${build_dir}/phy_multiple_init_data.bin"
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)
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else()
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idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS "include" "${idf_target}/include"
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PRIV_REQUIRES nvs_flash efuse
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LDFRAGMENTS "${ldfragments}"
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)
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set(embed_files "${build_dir}/phy_multiple_init_data.bin")
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endif()
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# [refactor-todo]: requires "driver" component for periph_ctrl header file
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idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS "include" "${idf_target}/include"
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PRIV_REQUIRES nvs_flash driver efuse
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LDFRAGMENTS "${ldfragments}"
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EMBED_FILES ${embed_files}
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)
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set(target_name "${idf_target}")
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target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"")
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# Override functions in PHY lib with the functions in 'phy_override.c'
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-u include_esp_phy_override")
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if(link_binary_libs)
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target_link_libraries(${COMPONENT_LIB} PUBLIC phy)
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50
components/esp_phy/src/phy_override.c
Normal file
50
components/esp_phy/src/phy_override.c
Normal file
@ -0,0 +1,50 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdbool.h>
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#include "esp_private/regi2c_ctrl.h"
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#include "driver/adc.h"
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/*
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* This file is used to override the hooks provided by the PHY lib for some system features.
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* Call phy_override() so that this file will be linked.
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*/
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static bool s_wifi_adc_xpd_flag;
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void include_esp_phy_override(void)
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{
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/* When this empty function is called, all functions below will be linked. */
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}
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/* Coordinate ADC power with other modules. */
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// It seems that it is only required on ESP32, but we still compile it for all chips, in case it is
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// called by PHY unexpectedly.
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void set_xpd_sar(bool en)
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{
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if (s_wifi_adc_xpd_flag == en) {
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/* ignore repeated calls to set_xpd_sar when the state is already correct */
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return;
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}
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s_wifi_adc_xpd_flag = en;
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if (en) {
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adc_power_acquire();
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} else {
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adc_power_release();
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}
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}
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//add spinlock protection
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void phy_i2c_enter_critical(void)
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{
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regi2c_enter_critical();
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}
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void phy_i2c_exit_critical(void)
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{
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regi2c_exit_critical();
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}
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@ -15,7 +15,6 @@
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#include "soc/rtc.h"
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#include "esp_wpa.h"
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#include "esp_netif.h"
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#include "driver/adc.h"
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#include "esp_coexist_internal.h"
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#include "esp_phy_init.h"
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#include "phy.h"
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@ -56,7 +55,6 @@ uint64_t g_wifi_feature_caps =
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#endif
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0;
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static bool s_wifi_adc_xpd_flag;
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static const char* TAG = "wifi_init";
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@ -278,24 +276,6 @@ void wifi_apb80m_release(void)
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}
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#endif //CONFIG_PM_ENABLE
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/* Coordinate ADC power with other modules. This overrides the function from PHY lib. */
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// It seems that it is only required on ESP32, but we still compile it for all chips, in case it is
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// called by PHY unexpectedly.
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void set_xpd_sar(bool en)
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{
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if (s_wifi_adc_xpd_flag == en) {
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/* ignore repeated calls to set_xpd_sar when the state is already correct */
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return;
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}
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s_wifi_adc_xpd_flag = en;
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if (en) {
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adc_power_acquire();
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} else {
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adc_power_release();
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}
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}
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#ifndef CONFIG_ESP_WIFI_FTM_ENABLE
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void ieee80211_ftm_attach(void)
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{
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