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feat(dvp): DVP cam supports more color format and don't initialize xclock pin

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This commit is contained in:
Dong Heng 2024-06-26 10:56:27 +08:00
parent fabf68803d
commit f20c9bbbbb
3 changed files with 27 additions and 26 deletions
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11
components/esp_driver_cam/dvp/include/esp_cam_ctlr_dvp.h
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@ -9,6 +9,7 @@
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "soc/gpio_num.h"
#include "hal/cam_types.h"
#include "esp_cam_ctlr.h"
@ -21,11 +22,11 @@ extern "C" {
*/
typedef struct esp_cam_ctlr_dvp_pin_config {
cam_ctlr_data_width_t data_width; /*!< Number of data lines */
int data_io[CAM_DVP_DATA_SIG_NUM]; /*!< DVP data pin number */
int vsync_io; /*!< DVP V-Sync pin number */
int de_io; /*!< DVP DE pin number */
int pclk_io; /*!< DVP PCLK input pin number, clock is from camera sensor */
int xclk_io; /*!< DVP output clock pin number */
gpio_num_t data_io[CAM_DVP_DATA_SIG_NUM]; /*!< DVP data pin number */
gpio_num_t vsync_io; /*!< DVP V-Sync pin number */
gpio_num_t de_io; /*!< DVP DE pin number */
gpio_num_t pclk_io; /*!< DVP PCLK input pin number, clock is from camera sensor */
gpio_num_t xclk_io; /*!< DVP output clock pin number, if using external XTAL, set xclk_io = GPIO_NUM_NC */
} esp_cam_ctlr_dvp_pin_config_t;
/**

40
components/esp_driver_cam/dvp/src/esp_cam_ctlr_dvp_cam.c
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@ -7,6 +7,7 @@
#include <sys/param.h>
#include "hal/gpio_ll.h"
#include "hal/cam_ll.h"
#include "hal/color_hal.h"
#include "driver/gpio.h"
#include "esp_cache.h"
#include "esp_private/periph_ctrl.h"
@ -238,23 +239,15 @@ static esp_err_t esp_cam_ctlr_dvp_cam_get_frame_size(const esp_cam_ctlr_dvp_conf
if (config->pic_format_jpeg) {
*p_size = config->h_res * config->v_res;
} else {
switch (config->input_data_color_type) {
case CAM_CTLR_COLOR_RGB565:
*p_size = config->h_res * config->v_res * 2;
break;
case CAM_CTLR_COLOR_YUV422:
*p_size = config->h_res * config->v_res * 2;
break;
case CAM_CTLR_COLOR_YUV420:
*p_size = (config->h_res * config->v_res / 2) * 3;
break;
case CAM_CTLR_COLOR_RGB888:
*p_size = config->h_res * config->v_res * 3;
break;
default:
ret = ESP_ERR_INVALID_ARG;
break;
color_space_pixel_format_t pixel_format = {
.color_type_id = config->input_data_color_type
};
uint32_t depth = color_hal_pixel_format_get_bit_depth(pixel_format);
if (!depth) {
return ESP_ERR_INVALID_ARG;
}
*p_size = config->h_res * config->v_res * depth / 8;
}
return ret;
@ -317,12 +310,17 @@ esp_err_t esp_cam_ctlr_dvp_init(int ctlr_id, cam_clock_source_t clk_src, const e
DVP_CAM_CONFIG_INPUT_PIN(pin->data_io[i], cam_periph_signals.buses[ctlr_id].data_sigs[i], false);
}
ret = gpio_set_direction(pin->xclk_io, GPIO_MODE_OUTPUT);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "failed to configure pin=%d", pin->xclk_io);
return ret;
/* If using external XTAL, don't initialize xclock pin */
if (pin->xclk_io != GPIO_NUM_NC) {
gpio_func_sel(pin->xclk_io, PIN_FUNC_GPIO);
ret = gpio_set_direction(pin->xclk_io, GPIO_MODE_OUTPUT);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "failed to configure pin=%d", pin->xclk_io);
return ret;
}
esp_rom_gpio_connect_out_signal(pin->xclk_io, cam_periph_signals.buses[ctlr_id].clk_sig, false, false);
}
esp_rom_gpio_connect_out_signal(pin->xclk_io, cam_periph_signals.buses[ctlr_id].clk_sig, false, false);
PERIPH_RCC_ACQUIRE_ATOMIC(cam_periph_signals.buses[ctlr_id].module, ref_count) {
if (ref_count == 0) {

2
components/hal/include/hal/cam_ctlr_types.h
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@ -25,6 +25,8 @@ typedef enum {
CAM_CTLR_COLOR_RGB888 = COLOR_TYPE_ID(COLOR_SPACE_RGB, COLOR_PIXEL_RGB888), ///< RGB888
CAM_CTLR_COLOR_YUV420 = COLOR_TYPE_ID(COLOR_SPACE_YUV, COLOR_PIXEL_YUV420), ///< YUV420
CAM_CTLR_COLOR_YUV422 = COLOR_TYPE_ID(COLOR_SPACE_YUV, COLOR_PIXEL_YUV422), ///< YUV422
CAM_CTLR_COLOR_GRAY4 = COLOR_TYPE_ID(COLOR_SPACE_GRAY, COLOR_PIXEL_GRAY4), ///< GRAY4
CAM_CTLR_COLOR_GRAY8 = COLOR_TYPE_ID(COLOR_SPACE_GRAY, COLOR_PIXEL_GRAY8), ///< GRAY8
} cam_ctlr_color_t;
/**