mirror of
https://github.com/espressif/esp-idf.git
synced 2024-09-19 14:26:01 -04:00
feat(isp): added isp sharp driver
This commit is contained in:
Armando
parent
eff2e4eddd
commit
f1b5846a55
@ -20,6 +20,10 @@ if(CONFIG_SOC_ISP_BF_SUPPORTED)
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list(APPEND srcs "src/isp_bf.c")
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endif()
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if(CONFIG_SOC_ISP_SHARPEN_SUPPORTED)
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list(APPEND srcs "src/isp_sharpen.c")
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endif()
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if(NOT ${target} STREQUAL "linux")
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list(APPEND requires esp_mm)
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endif()
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@ -28,4 +32,5 @@ idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${public_include}
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REQUIRES ${requires}
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PRIV_REQUIRES ${priv_requires}
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LDFRAGMENTS "linker.lf"
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)
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@ -8,4 +8,15 @@ menu "ESP-Driver:ISP Configurations"
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Ensure the ISP driver ISR is IRAM-Safe. When enabled, the ISR handler
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will be available when the cache is disabled.
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config ISP_CTRL_FUNC_IN_IRAM
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bool "Place ISP control functions into IRAM"
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default n
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help
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Place ISP control functions into IRAM,
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so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
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Enabling this option can improve driver performance as well.
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Function list:
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- `esp_isp_sharpen_configure`
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endmenu # ISP Configuration
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@ -12,8 +12,9 @@
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#pragma once
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#include "driver/isp_core.h"
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#include "driver/isp_ae.h"
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#include "driver/isp_af.h"
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#include "driver/isp_awb.h"
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#include "driver/isp_bf.h"
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#include "driver/isp_ccm.h"
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#include "driver/isp_ae.h"
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#include "driver/isp_sharpen.h"
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@ -82,6 +82,28 @@ esp_err_t esp_isp_enable(isp_proc_handle_t proc);
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*/
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esp_err_t esp_isp_disable(isp_proc_handle_t proc);
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/*---------------------------------------------
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Event Callbacks
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----------------------------------------------*/
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/**
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* @brief Register ISP event callbacks
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*
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* @note User can deregister a previously registered callback by calling this function and setting the to-be-deregistered callback member in
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* the `cbs` structure to NULL.
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* @note When CONFIG_ISP_ISR_IRAM_SAFE is enabled, the callback itself and functions called by it should be placed in IRAM.
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* Involved variables (including `user_data`) should be in internal RAM as well.
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*
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* @param[in] proc Processor handle
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* @param[in] cbs Group of callback functions
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* @param[in] user_data User data, which will be delivered to the callback functions directly
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*
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* @return
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* - ESP_OK: On success
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* - ESP_ERR_INVALID_ARG: Invalid arguments
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* - ESP_ERR_INVALID_STATE: Driver state is invalid, you shouldn't call this API at this moment
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*/
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esp_err_t esp_isp_register_event_callbacks(isp_proc_handle_t proc, const esp_isp_evt_cbs_t *cbs, void *user_data);
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#ifdef __cplusplus
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}
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#endif
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72
components/esp_driver_isp/include/driver/isp_sharpen.h
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72
components/esp_driver_isp/include/driver/isp_sharpen.h
Normal file
@ -0,0 +1,72 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "esp_err.h"
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#include "driver/isp_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ISP Sharpen configurations
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*/
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typedef struct {
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isp_sharpen_h_freq_coeff h_freq_coeff; ///< High freq pixel sharpeness coeff
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isp_sharpen_m_freq_coeff m_freq_coeff; ///< Medium freq pixel sharpeness coeff
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uint8_t h_thresh; ///< High threshold, pixel value higher than this threshold will be multiplied by `h_freq_coeff`
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uint8_t l_thresh; ///< Low threshold, pixel value higher than this threshold but lower than `h_thresh` will be multiplied by `m_freq_coeff`. Pixel value lower than this threshold will be set to 0
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isp_sharpen_edge_padding_mode_t padding_mode; ///< Sharpen edge padding mode
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uint8_t padding_data; ///< Sharpen edge padding pixel data
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uint8_t sharpen_template[ISP_SHARPEN_TEMPLATE_X_NUMS][ISP_SHARPEN_TEMPLATE_Y_NUMS]; ///< Sharpen template data
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uint8_t padding_line_tail_valid_start_pixel; ///< Sharpen edge padding line tail valid start pixel, padding data will only be valid between the valid start pixel and the valid end pixel. Set both the start and end pixel to 0 to make all padding pixel valid
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uint8_t padding_line_tail_valid_end_pixel; ///< Sharpen edge padding line tail valid end pixel, padding data will only be valid between the valid start pixel and the valid end pixel. Set both the start and end pixel to 0 to make all padding pixel valid
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} esp_isp_sharpen_config_t;
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/**
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* @brief ISP Sharpen configuration
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*
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* @note After calling this API, sharpen doesn't take into effect until `esp_isp_sharpen_enable` is called
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*
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* @param[in] proc Processor handle
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* @param[in] config Sharpen configurations, set NULL to de-configure the ISP Sharpen
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*
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* @return
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* - ESP_OK On success
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* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid
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*/
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esp_err_t esp_isp_sharpen_configure(isp_proc_handle_t proc, const esp_isp_sharpen_config_t *config);
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/**
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* @brief Enable ISP Sharpen function
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*
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* @param[in] proc Processor handle
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*
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* @return
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* - ESP_OK On success
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* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
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* - ESP_ERR_INVALID_STATE Driver state is invalid.
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*/
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esp_err_t esp_isp_sharpen_enable(isp_proc_handle_t proc);
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/**
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* @brief Disable ISP Sharpen function
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*
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* @param[in] proc Processor handle
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*
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* @return
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* - ESP_OK On success
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* - ESP_ERR_INVALID_ARG If the combination of arguments is invalid.
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* - ESP_ERR_INVALID_STATE Driver state is invalid.
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*/
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esp_err_t esp_isp_sharpen_disable(isp_proc_handle_t proc);
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#ifdef __cplusplus
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}
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#endif
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@ -5,6 +5,7 @@
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*/
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#pragma once
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#include <stdbool.h>
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#include "hal/isp_types.h"
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#include "hal/color_types.h"
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@ -75,6 +76,38 @@ typedef struct isp_awb_controller_t *isp_awb_ctlr_t;
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*/
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typedef struct isp_ae_controller_t *isp_ae_ctlr_t;
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/*---------------------------------------------
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Event Callbacks
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----------------------------------------------*/
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/**
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* @brief Event data structure
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*/
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typedef struct {
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uint8_t high_freq_pixel_max; ///< high freq pixel max value
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} esp_isp_sharpen_evt_data_t;
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/**
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* @brief Prototype of ISP sharpen event callback
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*
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* @param[in] proc Processor handle
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* @param[in] edata ISP sharpen event data
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* @param[in] user_data User registered context, registered when in `esp_isp_register_event_callbacks()`
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*
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* @return Whether a high priority task is woken up by this function
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*/
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typedef bool (*esp_isp_sharpen_callback_t)(isp_proc_handle_t proc, const esp_isp_sharpen_evt_data_t *edata, void *user_data);
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/**
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* @brief Group of ISP event callbacks
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*
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* @note These callbacks are all running in an ISR environment.
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* @note When CONFIG_ISP_ISR_IRAM_SAFE is enabled, the callback itself and functions called by it should be placed in IRAM.
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* Involved variables should be in internal RAM as well.
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*/
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typedef struct {
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esp_isp_sharpen_callback_t on_sharpen_frame_done; ///< Event callback, invoked when sharpen frame done
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} esp_isp_evt_cbs_t;
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#ifdef __cplusplus
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}
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#endif
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@ -31,7 +31,7 @@
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extern "C" {
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#endif
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#if CONFIG_ISP_ISR_IRAM_SAFE
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#if CONFIG_ISP_ISR_IRAM_SAFE || CONFIG_ISP_CTRL_FUNC_IN_IRAM
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#define ISP_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_IRAM)
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#define ISP_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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@ -43,7 +43,6 @@ typedef enum {
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ISP_FSM_INIT, // Controller is initialized, but not enabled
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ISP_FSM_ENABLE, // Controller is enabled, but is not running
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ISP_FSM_START, // Controller is in running
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ISP_FSM_ONESHOT, // Controller is in oneshot sampling
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ISP_FSM_CONTINUOUS, // Controller is in continuous sampling
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} isp_fsm_t;
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@ -68,16 +67,21 @@ typedef struct isp_processor_t {
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/* sub module contexts */
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isp_af_ctlr_t af_ctlr[SOC_ISP_AF_CTLR_NUMS];
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isp_awb_ctlr_t awb_ctlr;
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isp_fsm_t bf_fsm;
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isp_ae_ctlr_t ae_ctlr;
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isp_fsm_t bf_fsm;
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isp_fsm_t sharpen_fsm;
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esp_isp_evt_cbs_t cbs;
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void *user_data;
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/* ISR */
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intr_handle_t intr_hdl;
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int intr_priority;
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int isr_ref_counts;
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struct {
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uint32_t af_isr_added: 1;
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uint32_t ae_isr_added: 1;
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uint32_t awb_isr_added: 1;
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uint32_t af_isr_added: 1;
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uint32_t ae_isr_added: 1;
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uint32_t awb_isr_added: 1;
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uint32_t sharp_isr_added: 1;
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} isr_users;
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} isp_processor_t;
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@ -87,6 +91,7 @@ typedef enum {
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ISP_SUBMODULE_AF,
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ISP_SUBMODULE_AE,
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ISP_SUBMODULE_AWB,
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ISP_SUBMODULE_SHARPEN,
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} isp_submodule_t;
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/*---------------------------------------------------------------
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@ -97,6 +102,7 @@ esp_err_t esp_isp_deregister_isr(isp_proc_handle_t proc, isp_submodule_t submodu
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bool esp_isp_af_isr(isp_proc_handle_t proc, uint32_t af_events);
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bool esp_isp_ae_isr(isp_proc_handle_t proc, uint32_t ae_events);
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bool esp_isp_awb_isr(isp_proc_handle_t proc, uint32_t awb_events);
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bool esp_isp_sharpen_isr(isp_proc_handle_t proc, uint32_t sharp_events);
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#ifdef __cplusplus
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}
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11
components/esp_driver_isp/linker.lf
Normal file
11
components/esp_driver_isp/linker.lf
Normal file
@ -0,0 +1,11 @@
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[mapping:isp_driver]
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archive: libesp_driver_isp.a
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entries:
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if ISP_CTRL_FUNC_IN_IRAM = y:
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isp_sharpen: esp_isp_sharpen_configure (noflash)
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[mapping:isp_hal]
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archive: libhal.a
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entries:
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if ISP_CTRL_FUNC_IN_IRAM = y:
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isp_hal: isp_hal_sharpen_config (noflash)
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@ -14,11 +14,6 @@
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#include "esp_clk_tree.h"
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#include "driver/isp_core.h"
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#include "driver/isp_bf.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/mipi_csi_share_hw_ctrl.h"
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#include "hal/hal_utils.h"
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#include "soc/mipi_csi_bridge_struct.h"
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#include "soc/isp_periph.h"
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#include "esp_private/isp_private.h"
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static const char *TAG = "ISP_BF";
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@ -167,6 +167,31 @@ esp_err_t esp_isp_del_processor(isp_proc_handle_t proc)
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return ESP_OK;
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}
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esp_err_t esp_isp_register_event_callbacks(isp_proc_handle_t proc, const esp_isp_evt_cbs_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(proc && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(proc->isp_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "processor isn't in the init state");
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#if CONFIG_ISP_ISR_IRAM_SAFE
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if (cbs->on_sharpen_frame_done) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_sharpen_frame_done), ESP_ERR_INVALID_ARG, TAG, "on_sharpen_frame_done callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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proc->cbs.on_sharpen_frame_done = cbs->on_sharpen_frame_done;
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proc->user_data = user_data;
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if (cbs->on_sharpen_frame_done) {
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ESP_RETURN_ON_ERROR(esp_isp_register_isr(proc, ISP_SUBMODULE_SHARPEN), TAG, "fail to register ISR");
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} else {
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ESP_RETURN_ON_ERROR(esp_isp_deregister_isr(proc, ISP_SUBMODULE_SHARPEN), TAG, "fail to deregister ISR");
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}
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return ESP_OK;
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}
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esp_err_t esp_isp_enable(isp_proc_handle_t proc)
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{
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ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
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@ -201,6 +226,7 @@ static void IRAM_ATTR s_isp_isr_dispatcher(void *arg)
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uint32_t af_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_AF_MASK);
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uint32_t awb_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_AWB_MASK);
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uint32_t ae_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_AE_MASK);
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uint32_t sharp_events = isp_hal_check_clear_intr_event(&proc->hal, ISP_LL_EVENT_SHARP_MASK);
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bool do_dispatch = false;
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//Deal with hw events
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@ -234,6 +260,17 @@ static void IRAM_ATTR s_isp_isr_dispatcher(void *arg)
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}
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do_dispatch = false;
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}
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if (sharp_events) {
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portENTER_CRITICAL_ISR(&proc->spinlock);
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do_dispatch = proc->isr_users.sharp_isr_added;
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portEXIT_CRITICAL_ISR(&proc->spinlock);
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if (do_dispatch) {
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need_yield |= esp_isp_sharpen_isr(proc, sharp_events);
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}
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do_dispatch = false;
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}
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if (need_yield) {
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portYIELD_FROM_ISR();
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}
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@ -262,6 +299,9 @@ esp_err_t esp_isp_register_isr(isp_proc_handle_t proc, isp_submodule_t submodule
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case ISP_SUBMODULE_AE:
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proc->isr_users.ae_isr_added = true;
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break;
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case ISP_SUBMODULE_SHARPEN:
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proc->isr_users.sharp_isr_added = true;
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break;
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default:
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assert(false);
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}
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@ -307,6 +347,9 @@ esp_err_t esp_isp_deregister_isr(isp_proc_handle_t proc, isp_submodule_t submodu
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case ISP_SUBMODULE_AE:
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proc->isr_users.ae_isr_added = false;
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break;
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case ISP_SUBMODULE_SHARPEN:
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proc->isr_users.sharp_isr_added = false;
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break;
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default:
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assert(false);
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}
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95
components/esp_driver_isp/src/isp_sharpen.c
Normal file
95
components/esp_driver_isp/src/isp_sharpen.c
Normal file
@ -0,0 +1,95 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <esp_types.h>
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#include <sys/lock.h>
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#include "sdkconfig.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "freertos/FreeRTOS.h"
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#include "driver/isp_core.h"
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#include "driver/isp_sharpen.h"
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#include "soc/isp_periph.h"
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#include "esp_private/isp_private.h"
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static const char *TAG = "ISP_SHARPEN";
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/*---------------------------------------------------------------
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Sharpen
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---------------------------------------------------------------*/
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esp_err_t esp_isp_sharpen_configure(isp_proc_handle_t proc, const esp_isp_sharpen_config_t *config)
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{
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ESP_RETURN_ON_FALSE_ISR(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
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if (config) {
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bool valid_padding_setting = (!config->padding_line_tail_valid_end_pixel && !config->padding_line_tail_valid_start_pixel) || (config->padding_line_tail_valid_end_pixel > config->padding_line_tail_valid_start_pixel);
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ESP_RETURN_ON_FALSE_ISR(valid_padding_setting, ESP_ERR_INVALID_ARG, TAG, "wrong padding line tail valid pixel setting");
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isp_hal_sharpen_cfg_t sharpen_hal_cfg = {
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.h_freq_coeff = config->h_freq_coeff,
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.m_freq_coeff = config->m_freq_coeff,
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.h_thresh = config->h_thresh,
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.l_thresh = config->l_thresh,
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.padding_mode = config->padding_mode,
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.padding_data = config->padding_data,
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.padding_line_tail_valid_start_pixel = config->padding_line_tail_valid_start_pixel,
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.padding_line_tail_valid_end_pixel = config->padding_line_tail_valid_end_pixel,
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};
|
||||
memcpy(sharpen_hal_cfg.sharpen_template, config->sharpen_template, ISP_SHARPEN_TEMPLATE_X_NUMS * ISP_SHARPEN_TEMPLATE_X_NUMS * sizeof(uint8_t));
|
||||
isp_hal_sharpen_config(&(proc->hal), &sharpen_hal_cfg);
|
||||
} else {
|
||||
isp_hal_sharpen_config(&(proc->hal), NULL);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t esp_isp_sharpen_enable(isp_proc_handle_t proc)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
|
||||
ESP_RETURN_ON_FALSE(proc->sharpen_fsm == ISP_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "sharpen is enabled already");
|
||||
|
||||
isp_ll_sharp_clk_enable(proc->hal.hw, true);
|
||||
isp_ll_enable_intr(proc->hal.hw, ISP_LL_EVENT_SHARP_FRAME, true);
|
||||
isp_ll_sharp_enable(proc->hal.hw, true);
|
||||
proc->sharpen_fsm = ISP_FSM_ENABLE;
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t esp_isp_sharpen_disable(isp_proc_handle_t proc)
|
||||
{
|
||||
ESP_RETURN_ON_FALSE(proc, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
|
||||
ESP_RETURN_ON_FALSE(proc->sharpen_fsm == ISP_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "sharpen isn't enabled yet");
|
||||
|
||||
isp_ll_sharp_enable(proc->hal.hw, false);
|
||||
isp_ll_enable_intr(proc->hal.hw, ISP_LL_EVENT_SHARP_FRAME, false);
|
||||
isp_ll_sharp_clk_enable(proc->hal.hw, false);
|
||||
proc->sharpen_fsm = ISP_FSM_INIT;
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
INTR
|
||||
---------------------------------------------------------------*/
|
||||
bool IRAM_ATTR esp_isp_sharpen_isr(isp_proc_handle_t proc, uint32_t sharp_events)
|
||||
{
|
||||
bool need_yield = false;
|
||||
esp_isp_sharpen_evt_data_t edata = {};
|
||||
|
||||
if (sharp_events) {
|
||||
edata.high_freq_pixel_max = isp_ll_sharp_get_high_freq_pixel_max(proc->hal.hw);
|
||||
}
|
||||
|
||||
if (sharp_events & ISP_LL_EVENT_SHARP_FRAME) {
|
||||
if (proc->cbs.on_sharpen_frame_done) {
|
||||
need_yield |= proc->cbs.on_sharpen_frame_done(proc, &edata, proc->user_data);
|
||||
}
|
||||
}
|
||||
|
||||
return need_yield;
|
||||
}
|
||||
@ -67,6 +67,7 @@ extern "C" {
|
||||
#define ISP_LL_EVENT_AF_MASK (ISP_LL_EVENT_AF_FDONE | ISP_LL_EVENT_AF_ENV)
|
||||
#define ISP_LL_EVENT_AE_MASK (ISP_LL_EVENT_AE_FDONE | ISP_LL_EVENT_AE_ENV)
|
||||
#define ISP_LL_EVENT_AWB_MASK (ISP_LL_EVENT_AWB_FDONE)
|
||||
#define ISP_LL_EVENT_SHARP_MASK (ISP_LL_EVENT_SHARP_FRAME)
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AF
|
||||
@ -787,6 +788,7 @@ static inline void isp_ll_bf_set_template(isp_dev_t *hw, uint8_t template_arr[SO
|
||||
|
||||
hw->bf_gau1.gau_template22 = template_arr[2][2];
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
CCM
|
||||
---------------------------------------------------------------*/
|
||||
@ -1324,6 +1326,166 @@ static inline uint32_t isp_ll_awb_get_accumulated_b_value(isp_dev_t *hw)
|
||||
return hw->awb0_acc_b.awb0_acc_b;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Sharpen
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Enable / Disable sharpen clock
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] enable Enable / Disable
|
||||
*/
|
||||
static inline void isp_ll_sharp_clk_enable(isp_dev_t *hw, bool enable)
|
||||
{
|
||||
hw->clk_en.clk_sharp_force_on = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable / Disable sharpen
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] enable Enable / Disable
|
||||
*/
|
||||
static inline void isp_ll_sharp_enable(isp_dev_t *hw, bool enable)
|
||||
{
|
||||
hw->cntl.sharp_en = enable;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set sharpen low thresh
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] thresh Thresh
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_low_thresh(isp_dev_t *hw, uint8_t thresh)
|
||||
{
|
||||
hw->sharp_ctrl0.sharp_threshold_low = thresh;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set sharpen high thresh
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] thresh Thresh
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_high_thresh(isp_dev_t *hw, uint8_t thresh)
|
||||
{
|
||||
hw->sharp_ctrl0.sharp_threshold_high = thresh;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set sharpen medium pixel coeff
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] coeff coeff
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_medium_freq_coeff(isp_dev_t *hw, isp_sharpen_m_freq_coeff coeff)
|
||||
{
|
||||
//val between `sharp_amount_low` and `sharp_threshold_high` will be multiplied by `sharp_amount_low`
|
||||
hw->sharp_ctrl0.sharp_amount_low = coeff.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set sharpen high freq pixel coeff
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] coeff coeff
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_high_freq_coeff(isp_dev_t *hw, isp_sharpen_h_freq_coeff coeff)
|
||||
{
|
||||
//val higher than `sharp_threshold_high` will be multiplied by `sharp_amount_high`
|
||||
hw->sharp_ctrl0.sharp_amount_high = coeff.val;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set ISP sharpen padding mode
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] padding_mode padding mode
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_padding_mode(isp_dev_t *hw, isp_sharpen_edge_padding_mode_t padding_mode)
|
||||
{
|
||||
hw->sharp_matrix_ctrl.sharp_padding_mode = padding_mode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set ISP sharpen padding data
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] padding_data padding data
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_padding_data(isp_dev_t *hw, uint32_t padding_data)
|
||||
{
|
||||
hw->sharp_matrix_ctrl.sharp_padding_data = padding_data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set ISP sharpen tail start pulse pixel
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] start_pixel start pixel value
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_padding_line_tail_valid_start_pixel(isp_dev_t *hw, uint32_t start_pixel)
|
||||
{
|
||||
hw->sharp_matrix_ctrl.sharp_tail_pixen_pulse_tl = start_pixel;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set ISP sharpen tail pulse end pixel
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] end_pixel end pixel value
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_padding_line_tail_valid_end_pixel(isp_dev_t *hw, uint32_t end_pixel)
|
||||
{
|
||||
hw->sharp_matrix_ctrl.sharp_tail_pixen_pulse_th = end_pixel;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set ISP sharpen template
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
* @param[in] template_arr 2-d array for the template
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void isp_ll_sharp_set_template(isp_dev_t *hw, uint8_t template_arr[SOC_ISP_SHARPEN_TEMPLATE_X_NUMS][SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS])
|
||||
{
|
||||
for (int i = 0; i < SOC_ISP_SHARPEN_TEMPLATE_X_NUMS; i++) {
|
||||
for (int j = 0; j < SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS; j++) {
|
||||
if (j == 0) {
|
||||
hw->sharp_filter[i].sharp_filter_coe0 = template_arr[i][j];
|
||||
} else if (j == 1) {
|
||||
hw->sharp_filter[i].sharp_filter_coe1 = template_arr[i][j];
|
||||
} else if (j == 2) {
|
||||
hw->sharp_filter[i].sharp_filter_coe2 = template_arr[i][j];
|
||||
} else {
|
||||
HAL_ASSERT(false);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get ISP sharpen high freq image pixel max value
|
||||
*
|
||||
* @param[in] hw Hardware instance address
|
||||
*
|
||||
* @return Max value
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint8_t isp_ll_sharp_get_high_freq_pixel_max(isp_dev_t *hw)
|
||||
{
|
||||
return hw->sharp_ctrl1.sharp_gradient_max;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -33,6 +33,21 @@ typedef struct {
|
||||
uint8_t padding_line_tail_valid_end_pixel; ///< BF edge padding line tail valid end pixel
|
||||
} isp_hal_bf_cfg_t;
|
||||
|
||||
/**
|
||||
* @brief Sharpen configurations
|
||||
*/
|
||||
typedef struct {
|
||||
isp_sharpen_h_freq_coeff h_freq_coeff; ///< High freq pixel sharpeness coeff
|
||||
isp_sharpen_m_freq_coeff m_freq_coeff; ///< Medium freq pixel sharpeness coeff
|
||||
uint8_t h_thresh; ///< High threshold, pixel value higher than this threshold will be multiplied by `h_freq_coeff`
|
||||
uint8_t l_thresh; ///< Low threshold, pixel value higher than this threshold but lower than `h_thresh` will be multiplied by `m_freq_coeff`. Pixel value lower than this threshold will be set to 0
|
||||
isp_sharpen_edge_padding_mode_t padding_mode; ///< Sharpen edge padding mode
|
||||
uint8_t padding_data; ///< Sharpen edge padding pixel data
|
||||
uint8_t sharpen_template[ISP_SHARPEN_TEMPLATE_X_NUMS][ISP_SHARPEN_TEMPLATE_Y_NUMS]; ///< Sharpen template data
|
||||
uint8_t padding_line_tail_valid_start_pixel; ///< Sharpen edge padding line tail valid start pixel
|
||||
uint8_t padding_line_tail_valid_end_pixel; ///< Sharpen edge padding line tail valid end pixel
|
||||
} isp_hal_sharpen_cfg_t;
|
||||
|
||||
/**
|
||||
* @brief Context that should be maintained by both the driver and the HAL
|
||||
*/
|
||||
@ -77,43 +92,6 @@ void isp_hal_af_window_config(isp_hal_context_t *hal, int window_id, const isp_w
|
||||
*/
|
||||
void isp_hal_ae_window_config(isp_hal_context_t *hal, const isp_window_t *window);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
INTR
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Clear ISP HW intr event
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] mask HW event mask
|
||||
*/
|
||||
uint32_t isp_hal_check_clear_intr_event(isp_hal_context_t *hal, uint32_t mask);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
BF
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Configure ISP BF registers
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] config BF config, set NULL to de-config the ISP BF
|
||||
*/
|
||||
void isp_hal_bf_config(isp_hal_context_t *hal, isp_hal_bf_cfg_t *config);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Color Correction Matrix
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Set Color Correction Matrix
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] saturation Whether to enable saturation when float data overflow
|
||||
* @param[in] flt_matrix 3x3 RGB correction matrix
|
||||
* @return
|
||||
* - true Set success
|
||||
* - false Invalid argument
|
||||
*/
|
||||
bool isp_hal_ccm_set_matrix(isp_hal_context_t *hal, bool saturation, const float flt_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION]);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AWB
|
||||
---------------------------------------------------------------*/
|
||||
@ -162,6 +140,54 @@ bool isp_hal_awb_set_rg_ratio_range(isp_hal_context_t *hal, float rg_min, float
|
||||
*/
|
||||
bool isp_hal_awb_set_bg_ratio_range(isp_hal_context_t *hal, float bg_min, float bg_max);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
BF
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Configure ISP BF
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] config BF config, set NULL to de-config the ISP BF
|
||||
*/
|
||||
void isp_hal_bf_config(isp_hal_context_t *hal, isp_hal_bf_cfg_t *config);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Color Correction Matrix
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Set Color Correction Matrix
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] saturation Whether to enable saturation when float data overflow
|
||||
* @param[in] flt_matrix 3x3 RGB correction matrix
|
||||
* @return
|
||||
* - true Set success
|
||||
* - false Invalid argument
|
||||
*/
|
||||
bool isp_hal_ccm_set_matrix(const isp_hal_context_t *hal, bool saturation, const float flt_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION]);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
INTR
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Clear ISP HW intr event
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] mask HW event mask
|
||||
*/
|
||||
uint32_t isp_hal_check_clear_intr_event(const isp_hal_context_t *hal, uint32_t mask);
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Sharpness
|
||||
---------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Configure ISP sharpeness
|
||||
*
|
||||
* @param[in] hal Context of the HAL layer
|
||||
* @param[in] config Sharpness config, set NULL to de-config the ISP sharpness
|
||||
*/
|
||||
void isp_hal_sharpen_config(isp_hal_context_t *hal, isp_hal_sharpen_cfg_t *config);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -64,14 +64,26 @@ typedef enum {
|
||||
} isp_color_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
DVP
|
||||
AE
|
||||
---------------------------------------------------------------*/
|
||||
#if SOC_ISP_DVP_DATA_WIDTH_MAX
|
||||
#define ISP_DVP_DATA_SIG_NUM SOC_ISP_DVP_DATA_WIDTH_MAX // The ISP DVP data signal number
|
||||
|
||||
#if (SOC_ISP_AE_BLOCK_X_NUMS && SOC_ISP_AE_BLOCK_Y_NUMS)
|
||||
#define ISP_AE_BLOCK_X_NUM SOC_ISP_AE_BLOCK_X_NUMS // The AF window number for sampling
|
||||
#define ISP_AE_BLOCK_Y_NUM SOC_ISP_AE_BLOCK_Y_NUMS // The AF window number for sampling
|
||||
#else
|
||||
#define ISP_DVP_DATA_SIG_NUM 0
|
||||
#define ISP_AE_BLOCK_X_NUM 0
|
||||
#define ISP_AE_BLOCK_Y_NUM 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief ISP AE input data source
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
ISP_AE_SAMPLE_POINT_AFTER_DEMOSAIC, ///< AE input data after demosaic
|
||||
ISP_AE_SAMPLE_POINT_AFTER_GAMMA, ///< AE input data after gamma
|
||||
} isp_ae_sample_point_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AF
|
||||
---------------------------------------------------------------*/
|
||||
@ -81,6 +93,19 @@ typedef enum {
|
||||
#define ISP_AF_WINDOW_NUM 0
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AWB
|
||||
---------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief ISP AWB sample point in the ISP pipeline
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
ISP_AWB_SAMPLE_POINT_BEFORE_CCM, ///< Sample AWB data before CCM (Color Correction Matrix)
|
||||
ISP_AWB_SAMPLE_POINT_AFTER_CCM, ///< Sample AWB data after CCM (Color Correction Matrix)
|
||||
} isp_awb_sample_point_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
BF
|
||||
---------------------------------------------------------------*/
|
||||
@ -110,38 +135,69 @@ typedef enum {
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AWB
|
||||
DVP
|
||||
---------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief ISP AWB sample point in the ISP pipeline
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
ISP_AWB_SAMPLE_POINT_BEFORE_CCM, ///< Sample AWB data before CCM (Color Correction Matrix)
|
||||
ISP_AWB_SAMPLE_POINT_AFTER_CCM, ///< Sample AWB data after CCM (Color Correction Matrix)
|
||||
} isp_awb_sample_point_t;
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AE
|
||||
---------------------------------------------------------------*/
|
||||
|
||||
#if (SOC_ISP_AE_BLOCK_X_NUMS && SOC_ISP_AE_BLOCK_Y_NUMS)
|
||||
#define ISP_AE_BLOCK_X_NUM SOC_ISP_AE_BLOCK_X_NUMS // The AF window number for sampling
|
||||
#define ISP_AE_BLOCK_Y_NUM SOC_ISP_AE_BLOCK_Y_NUMS // The AF window number for sampling
|
||||
#if SOC_ISP_DVP_DATA_WIDTH_MAX
|
||||
#define ISP_DVP_DATA_SIG_NUM SOC_ISP_DVP_DATA_WIDTH_MAX // The ISP DVP data signal number
|
||||
#else
|
||||
#define ISP_AE_BLOCK_X_NUM 0
|
||||
#define ISP_AE_BLOCK_Y_NUM 0
|
||||
#define ISP_DVP_DATA_SIG_NUM 0
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Sharpen
|
||||
---------------------------------------------------------------*/
|
||||
#if SOC_ISP_SHARPEN_SUPPORTED
|
||||
#define ISP_SHARPEN_TEMPLATE_X_NUMS SOC_ISP_SHARPEN_TEMPLATE_X_NUMS // Sharpen template x field nums
|
||||
#define ISP_SHARPEN_TEMPLATE_Y_NUMS SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS // Sharpen template y field nums
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_INT_BITS SOC_ISP_SHARPEN_H_FREQ_COEF_INT_BITS
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_DEC_BITS SOC_ISP_SHARPEN_H_FREQ_COEF_DEC_BITS
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_RES_BITS SOC_ISP_SHARPEN_H_FREQ_COEF_RES_BITS
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_INT_BITS SOC_ISP_SHARPEN_M_FREQ_COEF_INT_BITS
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_DEC_BITS SOC_ISP_SHARPEN_M_FREQ_COEF_DEC_BITS
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_RES_BITS SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS
|
||||
#else
|
||||
#define ISP_SHARPEN_TEMPLATE_X_NUMS 0
|
||||
#define ISP_SHARPEN_TEMPLATE_Y_NUMS 0
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_INT_BITS 8
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_DEC_BITS 8
|
||||
#define ISP_SHARPEN_H_FREQ_COEF_RES_BITS 16
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_INT_BITS 8
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_DEC_BITS 8
|
||||
#define ISP_SHARPEN_M_FREQ_COEF_RES_BITS 16
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief ISP AE input data source
|
||||
*
|
||||
* @brief High freq pixel sharpeness coeff
|
||||
*/
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t decimal:ISP_SHARPEN_H_FREQ_COEF_DEC_BITS; ///< Integer part
|
||||
uint32_t integer:ISP_SHARPEN_H_FREQ_COEF_INT_BITS; ///< Decimal part
|
||||
uint32_t reserved:ISP_SHARPEN_H_FREQ_COEF_RES_BITS; ///< Reserved
|
||||
};
|
||||
uint32_t val;
|
||||
} isp_sharpen_h_freq_coeff;
|
||||
|
||||
/**
|
||||
* @brief Medium freq pixel sharpeness coeff
|
||||
*/
|
||||
typedef union {
|
||||
struct {
|
||||
uint32_t decimal:ISP_SHARPEN_M_FREQ_COEF_DEC_BITS; ///< Integer part
|
||||
uint32_t integer:ISP_SHARPEN_M_FREQ_COEF_INT_BITS; ///< Decimal part
|
||||
uint32_t reserved:ISP_SHARPEN_M_FREQ_COEF_RES_BITS; ///< Reserved
|
||||
};
|
||||
uint32_t val;
|
||||
} isp_sharpen_m_freq_coeff;
|
||||
|
||||
/**
|
||||
* @brief ISP Sharpen edge padding mode
|
||||
*/
|
||||
typedef enum {
|
||||
ISP_AE_SAMPLE_POINT_AFTER_DEMOSAIC, ///< AE input data after demosaic
|
||||
ISP_AE_SAMPLE_POINT_AFTER_GAMMA, ///< AE input data after gamma
|
||||
} isp_ae_sample_point_t;
|
||||
ISP_SHARPEN_EDGE_PADDING_MODE_SRND_DATA, ///< Fill Sharpen edge padding data with surrounding pixel data
|
||||
ISP_SHARPEN_EDGE_PADDING_MODE_CUSTOM_DATA, ///< Fill Sharpen edge padding data with custom pixel data
|
||||
} isp_sharpen_edge_padding_mode_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -26,38 +26,6 @@ void isp_hal_init(isp_hal_context_t *hal, int isp_id)
|
||||
isp_ll_init(hal->hw);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AF
|
||||
---------------------------------------------------------------*/
|
||||
void isp_hal_af_window_config(isp_hal_context_t *hal, int window_id, const isp_window_t *window)
|
||||
{
|
||||
isp_ll_af_set_window_range(hal->hw, window_id, window->top_left.x, window->top_left.y, window->btm_right.x, window->btm_right.y);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
BF
|
||||
---------------------------------------------------------------*/
|
||||
void isp_hal_bf_config(isp_hal_context_t *hal, isp_hal_bf_cfg_t *config)
|
||||
{
|
||||
if (config) {
|
||||
isp_ll_bf_set_sigma(hal->hw, config->denoising_level);
|
||||
isp_ll_bf_set_padding_mode(hal->hw, config->padding_mode);
|
||||
isp_ll_bf_set_padding_data(hal->hw, config->padding_data);
|
||||
isp_ll_bf_set_padding_line_tail_valid_start_pixel(hal->hw, config->padding_line_tail_valid_start_pixel);
|
||||
isp_ll_bf_set_padding_line_tail_valid_end_pixel(hal->hw, config->padding_line_tail_valid_end_pixel);
|
||||
isp_ll_bf_set_template(hal->hw, config->bf_template);
|
||||
} else {
|
||||
isp_ll_bf_set_sigma(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_mode(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_data(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_line_tail_valid_start_pixel(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_line_tail_valid_end_pixel(hal->hw, 0);
|
||||
uint8_t default_template[SOC_ISP_BF_TEMPLATE_X_NUMS][SOC_ISP_BF_TEMPLATE_Y_NUMS] = {};
|
||||
memset(default_template, SOC_ISP_BF_TEMPLATE_X_NUMS, sizeof(default_template));
|
||||
isp_ll_bf_set_template(hal->hw, default_template);
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
AE
|
||||
---------------------------------------------------------------*/
|
||||
@ -76,41 +44,11 @@ void isp_hal_ae_window_config(isp_hal_context_t *hal, const isp_window_t *window
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
INTR, put in iram
|
||||
AF
|
||||
---------------------------------------------------------------*/
|
||||
uint32_t isp_hal_check_clear_intr_event(isp_hal_context_t *hal, uint32_t mask)
|
||||
void isp_hal_af_window_config(isp_hal_context_t *hal, int window_id, const isp_window_t *window)
|
||||
{
|
||||
uint32_t triggered_events = isp_ll_get_intr_status(hal->hw) & mask;
|
||||
|
||||
if (triggered_events) {
|
||||
isp_ll_clear_intr(hal->hw, triggered_events);
|
||||
}
|
||||
|
||||
return triggered_events;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Color Correction Matrix
|
||||
---------------------------------------------------------------*/
|
||||
bool isp_hal_ccm_set_matrix(isp_hal_context_t *hal, bool saturation, const float flt_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION])
|
||||
{
|
||||
isp_ll_ccm_gain_t fp_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION] = {};
|
||||
hal_utils_fixed_point_t fp_cfg = {
|
||||
.int_bit = ISP_LL_CCM_MATRIX_INT_BITS,
|
||||
.frac_bit = ISP_LL_CCM_MATRIX_FRAC_BITS,
|
||||
.saturation = saturation,
|
||||
};
|
||||
int err_level = saturation ? -1 : 0;
|
||||
/* Transfer the float type to fixed point */
|
||||
for (int i = 0; i < ISP_CCM_DIMENSION; i++) {
|
||||
for (int j = 0; j < ISP_CCM_DIMENSION; j++) {
|
||||
if (hal_utils_float_to_fixed_point_32b(flt_matrix[i][j], &fp_cfg, &fp_matrix[i][j].val) < err_level) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
}
|
||||
isp_ll_ccm_set_matrix(hal->hw, fp_matrix);
|
||||
return true;
|
||||
isp_ll_af_set_window_range(hal->hw, window_id, window->top_left.x, window->top_left.y, window->btm_right.x, window->btm_right.y);
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
@ -181,3 +119,97 @@ bool isp_hal_awb_set_bg_ratio_range(isp_hal_context_t *hal, float bg_min, float
|
||||
isp_ll_awb_set_bg_ratio_range(hal->hw, fp_bg_min, fp_bg_max);
|
||||
return true;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
BF
|
||||
---------------------------------------------------------------*/
|
||||
void isp_hal_bf_config(isp_hal_context_t *hal, isp_hal_bf_cfg_t *config)
|
||||
{
|
||||
if (config) {
|
||||
isp_ll_bf_set_sigma(hal->hw, config->denoising_level);
|
||||
isp_ll_bf_set_padding_mode(hal->hw, config->padding_mode);
|
||||
isp_ll_bf_set_padding_data(hal->hw, config->padding_data);
|
||||
isp_ll_bf_set_padding_line_tail_valid_start_pixel(hal->hw, config->padding_line_tail_valid_start_pixel);
|
||||
isp_ll_bf_set_padding_line_tail_valid_end_pixel(hal->hw, config->padding_line_tail_valid_end_pixel);
|
||||
isp_ll_bf_set_template(hal->hw, config->bf_template);
|
||||
} else {
|
||||
isp_ll_bf_set_sigma(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_mode(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_data(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_line_tail_valid_start_pixel(hal->hw, 0);
|
||||
isp_ll_bf_set_padding_line_tail_valid_end_pixel(hal->hw, 0);
|
||||
uint8_t default_template[SOC_ISP_BF_TEMPLATE_X_NUMS][SOC_ISP_BF_TEMPLATE_Y_NUMS] = {};
|
||||
memset(default_template, 0, sizeof(default_template));
|
||||
isp_ll_bf_set_template(hal->hw, default_template);
|
||||
}
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Color Correction Matrix
|
||||
---------------------------------------------------------------*/
|
||||
bool isp_hal_ccm_set_matrix(const isp_hal_context_t *hal, bool saturation, const float flt_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION])
|
||||
{
|
||||
isp_ll_ccm_gain_t fp_matrix[ISP_CCM_DIMENSION][ISP_CCM_DIMENSION] = {};
|
||||
hal_utils_fixed_point_t fp_cfg = {
|
||||
.int_bit = ISP_LL_CCM_MATRIX_INT_BITS,
|
||||
.frac_bit = ISP_LL_CCM_MATRIX_FRAC_BITS,
|
||||
.saturation = saturation,
|
||||
};
|
||||
int err_level = saturation ? -1 : 0;
|
||||
/* Transfer the float type to fixed point */
|
||||
for (int i = 0; i < ISP_CCM_DIMENSION; i++) {
|
||||
for (int j = 0; j < ISP_CCM_DIMENSION; j++) {
|
||||
if (hal_utils_float_to_fixed_point_32b(flt_matrix[i][j], &fp_cfg, &fp_matrix[i][j].val) < err_level) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
}
|
||||
isp_ll_ccm_set_matrix(hal->hw, fp_matrix);
|
||||
return true;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
INTR, put in iram
|
||||
---------------------------------------------------------------*/
|
||||
uint32_t isp_hal_check_clear_intr_event(const isp_hal_context_t *hal, uint32_t mask)
|
||||
{
|
||||
uint32_t triggered_events = isp_ll_get_intr_status(hal->hw) & mask;
|
||||
|
||||
if (triggered_events) {
|
||||
isp_ll_clear_intr(hal->hw, triggered_events);
|
||||
}
|
||||
|
||||
return triggered_events;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------
|
||||
Sharpness
|
||||
---------------------------------------------------------------*/
|
||||
void isp_hal_sharpen_config(isp_hal_context_t *hal, isp_hal_sharpen_cfg_t *config)
|
||||
{
|
||||
if (config) {
|
||||
isp_ll_sharp_set_low_thresh(hal->hw, config->l_thresh);
|
||||
isp_ll_sharp_set_high_thresh(hal->hw, config->h_thresh);
|
||||
isp_ll_sharp_set_medium_freq_coeff(hal->hw, config->m_freq_coeff);
|
||||
isp_ll_sharp_set_high_freq_coeff(hal->hw, config->h_freq_coeff);
|
||||
isp_ll_sharp_set_padding_mode(hal->hw, config->padding_mode);
|
||||
isp_ll_sharp_set_padding_data(hal->hw, config->padding_data);
|
||||
isp_ll_sharp_set_padding_line_tail_valid_start_pixel(hal->hw, config->padding_line_tail_valid_start_pixel);
|
||||
isp_ll_sharp_set_padding_line_tail_valid_end_pixel(hal->hw, config->padding_line_tail_valid_end_pixel);
|
||||
isp_ll_sharp_set_template(hal->hw, config->sharpen_template);
|
||||
} else {
|
||||
isp_ll_sharp_set_low_thresh(hal->hw, 0);
|
||||
isp_ll_sharp_set_high_thresh(hal->hw, 0);
|
||||
isp_sharpen_m_freq_coeff m_freq = {};
|
||||
isp_sharpen_h_freq_coeff h_freq = {};
|
||||
isp_ll_sharp_set_medium_freq_coeff(hal->hw, m_freq);
|
||||
isp_ll_sharp_set_high_freq_coeff(hal->hw, h_freq);
|
||||
isp_ll_sharp_set_padding_mode(hal->hw, 0);
|
||||
isp_ll_sharp_set_padding_data(hal->hw, 0);
|
||||
isp_ll_sharp_set_padding_line_tail_valid_start_pixel(hal->hw, 0);
|
||||
isp_ll_sharp_set_padding_line_tail_valid_end_pixel(hal->hw, 0);
|
||||
uint8_t default_template[SOC_ISP_SHARPEN_TEMPLATE_X_NUMS][SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS] = {};
|
||||
memset(default_template, 0, sizeof(default_template));
|
||||
isp_ll_sharp_set_template(hal->hw, default_template);
|
||||
}
|
||||
}
|
||||
|
||||
@ -835,6 +835,14 @@ config SOC_ISP_DVP_SUPPORTED
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_ISP_SHARPEN_SUPPORTED
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_ISP_SHARE_CSI_BRG
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_ISP_NUMS
|
||||
int
|
||||
default 1
|
||||
@ -843,14 +851,6 @@ config SOC_ISP_DVP_CTLR_NUMS
|
||||
int
|
||||
default 1
|
||||
|
||||
config SOC_ISP_AF_CTLR_NUMS
|
||||
int
|
||||
default 1
|
||||
|
||||
config SOC_ISP_AF_WINDOW_NUMS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_AE_CTLR_NUMS
|
||||
int
|
||||
default 1
|
||||
@ -863,9 +863,13 @@ config SOC_ISP_AE_BLOCK_Y_NUMS
|
||||
int
|
||||
default 5
|
||||
|
||||
config SOC_ISP_SHARE_CSI_BRG
|
||||
bool
|
||||
default y
|
||||
config SOC_ISP_AF_CTLR_NUMS
|
||||
int
|
||||
default 1
|
||||
|
||||
config SOC_ISP_AF_WINDOW_NUMS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_BF_TEMPLATE_X_NUMS
|
||||
int
|
||||
@ -883,6 +887,38 @@ config SOC_ISP_DVP_DATA_WIDTH_MAX
|
||||
int
|
||||
default 16
|
||||
|
||||
config SOC_ISP_SHARPEN_TEMPLATE_X_NUMS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_SHARPEN_H_FREQ_COEF_INT_BITS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_SHARPEN_H_FREQ_COEF_DEC_BITS
|
||||
int
|
||||
default 5
|
||||
|
||||
config SOC_ISP_SHARPEN_H_FREQ_COEF_RES_BITS
|
||||
int
|
||||
default 24
|
||||
|
||||
config SOC_ISP_SHARPEN_M_FREQ_COEF_INT_BITS
|
||||
int
|
||||
default 3
|
||||
|
||||
config SOC_ISP_SHARPEN_M_FREQ_COEF_DEC_BITS
|
||||
int
|
||||
default 5
|
||||
|
||||
config SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS
|
||||
int
|
||||
default 24
|
||||
|
||||
config SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
|
||||
bool
|
||||
default y
|
||||
|
||||
@ -1484,6 +1484,25 @@ typedef union {
|
||||
uint32_t val;
|
||||
} isp_sharp_filter2_reg_t;
|
||||
|
||||
typedef union {
|
||||
struct {
|
||||
/** sharp_filter_coe0 : R/W; bitpos: [4:0]; default: 1;
|
||||
* this field configures usm filter coefficient
|
||||
*/
|
||||
uint32_t sharp_filter_coe0:5;
|
||||
/** sharp_filter_coe1 : R/W; bitpos: [9:5]; default: 2;
|
||||
* this field configures usm filter coefficient
|
||||
*/
|
||||
uint32_t sharp_filter_coe1:5;
|
||||
/** sharp_filter_coe2 : R/W; bitpos: [14:10]; default: 1;
|
||||
* this field configures usm filter coefficient
|
||||
*/
|
||||
uint32_t sharp_filter_coe2:5;
|
||||
uint32_t reserved_15:17;
|
||||
};
|
||||
uint32_t val;
|
||||
} isp_sharp_filter_reg_t;
|
||||
|
||||
/** Type of sharp_matrix_ctrl register
|
||||
* sharp pix2matrix ctrl
|
||||
*/
|
||||
@ -3778,9 +3797,7 @@ typedef struct {
|
||||
volatile isp_ae_win_reciprocal_reg_t ae_win_reciprocal;
|
||||
volatile isp_ae_block_mean_reg_t ae_block_mean[7];
|
||||
volatile isp_sharp_ctrl0_reg_t sharp_ctrl0;
|
||||
volatile isp_sharp_filter0_reg_t sharp_filter0;
|
||||
volatile isp_sharp_filter1_reg_t sharp_filter1;
|
||||
volatile isp_sharp_filter2_reg_t sharp_filter2;
|
||||
volatile isp_sharp_filter_reg_t sharp_filter[3];
|
||||
volatile isp_sharp_matrix_ctrl_reg_t sharp_matrix_ctrl;
|
||||
volatile isp_sharp_ctrl1_reg_t sharp_ctrl1;
|
||||
volatile isp_dma_cntl_reg_t dma_cntl;
|
||||
|
||||
@ -330,22 +330,31 @@
|
||||
#define SOC_LP_I2S_NUM (1U)
|
||||
|
||||
/*-------------------------- ISP CAPS ----------------------------------------*/
|
||||
#define SOC_ISP_BF_SUPPORTED 1
|
||||
#define SOC_ISP_CCM_SUPPORTED 1
|
||||
#define SOC_ISP_DVP_SUPPORTED 1
|
||||
#define SOC_ISP_BF_SUPPORTED 1
|
||||
#define SOC_ISP_CCM_SUPPORTED 1
|
||||
#define SOC_ISP_DVP_SUPPORTED 1
|
||||
#define SOC_ISP_SHARPEN_SUPPORTED 1
|
||||
#define SOC_ISP_SHARE_CSI_BRG 1
|
||||
|
||||
#define SOC_ISP_NUMS 1U
|
||||
#define SOC_ISP_DVP_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AF_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AF_WINDOW_NUMS 3
|
||||
#define SOC_ISP_AE_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AE_BLOCK_X_NUMS 5
|
||||
#define SOC_ISP_AE_BLOCK_Y_NUMS 5
|
||||
#define SOC_ISP_SHARE_CSI_BRG 1
|
||||
#define SOC_ISP_BF_TEMPLATE_X_NUMS 3
|
||||
#define SOC_ISP_BF_TEMPLATE_Y_NUMS 3
|
||||
#define SOC_ISP_CCM_DIMENSION 3
|
||||
#define SOC_ISP_DVP_DATA_WIDTH_MAX 16
|
||||
#define SOC_ISP_NUMS 1U
|
||||
#define SOC_ISP_DVP_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AE_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AE_BLOCK_X_NUMS 5
|
||||
#define SOC_ISP_AE_BLOCK_Y_NUMS 5
|
||||
#define SOC_ISP_AF_CTLR_NUMS 1U
|
||||
#define SOC_ISP_AF_WINDOW_NUMS 3
|
||||
#define SOC_ISP_BF_TEMPLATE_X_NUMS 3
|
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#define SOC_ISP_BF_TEMPLATE_Y_NUMS 3
|
||||
#define SOC_ISP_CCM_DIMENSION 3
|
||||
#define SOC_ISP_DVP_DATA_WIDTH_MAX 16
|
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#define SOC_ISP_SHARPEN_TEMPLATE_X_NUMS 3
|
||||
#define SOC_ISP_SHARPEN_TEMPLATE_Y_NUMS 3
|
||||
#define SOC_ISP_SHARPEN_H_FREQ_COEF_INT_BITS 3
|
||||
#define SOC_ISP_SHARPEN_H_FREQ_COEF_DEC_BITS 5
|
||||
#define SOC_ISP_SHARPEN_H_FREQ_COEF_RES_BITS 24
|
||||
#define SOC_ISP_SHARPEN_M_FREQ_COEF_INT_BITS 3
|
||||
#define SOC_ISP_SHARPEN_M_FREQ_COEF_DEC_BITS 5
|
||||
#define SOC_ISP_SHARPEN_M_FREQ_COEF_RES_BITS 24
|
||||
|
||||
/*-------------------------- LEDC CAPS ---------------------------------------*/
|
||||
#define SOC_LEDC_SUPPORT_PLL_DIV_CLOCK (1)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user