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i2s_std: fixed mclk check for 24-bit data and enable left alignment as default
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@ -62,7 +62,9 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
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{
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esp_err_t ret = ESP_OK;
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i2s_std_config_t *std_cfg = (i2s_std_config_t *)(handle->mode_info);
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ESP_RETURN_ON_FALSE(std_cfg->slot_cfg.data_bit_width != I2S_DATA_BIT_WIDTH_24BIT ||
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i2s_data_bit_width_t real_slot_bit = (int)std_cfg->slot_cfg.slot_bit_width < (int)std_cfg->slot_cfg.data_bit_width ?
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std_cfg->slot_cfg.data_bit_width : std_cfg->slot_cfg.slot_bit_width;
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ESP_RETURN_ON_FALSE(real_slot_bit != I2S_DATA_BIT_WIDTH_24BIT ||
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(clk_cfg->mclk_multiple % 3 == 0), ESP_ERR_INVALID_ARG, TAG,
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"The 'mclk_multiple' should be the multiple of 3 while using 24-bit data width");
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@ -145,7 +145,7 @@ extern "C" {
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.ws_width = bits_per_sample, \
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.ws_pol = false, \
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.bit_shift = true, \
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.left_align = false, \
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.left_align = true, \
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.big_endian = false, \
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.bit_order_lsb = false \
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}
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@ -164,7 +164,7 @@ extern "C" {
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.ws_width = 1, \
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.ws_pol = true, \
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.bit_shift = true, \
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.left_align = false, \
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.left_align = true, \
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.big_endian = false, \
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.bit_order_lsb = false \
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}
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@ -182,7 +182,7 @@ extern "C" {
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.ws_width = bits_per_sample, \
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.ws_pol = false, \
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.bit_shift = false, \
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.left_align = false, \
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.left_align = true, \
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.big_endian = false, \
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.bit_order_lsb = false \
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}
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