i2s_std: fixed mclk check for 24-bit data and enable left alignment as default

This commit is contained in:
laokaiyao 2023-04-26 15:23:58 +08:00
parent f00c78b020
commit f0c13fc7a8
2 changed files with 6 additions and 4 deletions

View File

@ -62,7 +62,9 @@ static esp_err_t i2s_std_set_clock(i2s_chan_handle_t handle, const i2s_std_clk_c
{
esp_err_t ret = ESP_OK;
i2s_std_config_t *std_cfg = (i2s_std_config_t *)(handle->mode_info);
ESP_RETURN_ON_FALSE(std_cfg->slot_cfg.data_bit_width != I2S_DATA_BIT_WIDTH_24BIT ||
i2s_data_bit_width_t real_slot_bit = (int)std_cfg->slot_cfg.slot_bit_width < (int)std_cfg->slot_cfg.data_bit_width ?
std_cfg->slot_cfg.data_bit_width : std_cfg->slot_cfg.slot_bit_width;
ESP_RETURN_ON_FALSE(real_slot_bit != I2S_DATA_BIT_WIDTH_24BIT ||
(clk_cfg->mclk_multiple % 3 == 0), ESP_ERR_INVALID_ARG, TAG,
"The 'mclk_multiple' should be the multiple of 3 while using 24-bit data width");

View File

@ -145,7 +145,7 @@ extern "C" {
.ws_width = bits_per_sample, \
.ws_pol = false, \
.bit_shift = true, \
.left_align = false, \
.left_align = true, \
.big_endian = false, \
.bit_order_lsb = false \
}
@ -164,7 +164,7 @@ extern "C" {
.ws_width = 1, \
.ws_pol = true, \
.bit_shift = true, \
.left_align = false, \
.left_align = true, \
.big_endian = false, \
.bit_order_lsb = false \
}
@ -182,7 +182,7 @@ extern "C" {
.ws_width = bits_per_sample, \
.ws_pol = false, \
.bit_shift = false, \
.left_align = false, \
.left_align = true, \
.big_endian = false, \
.bit_order_lsb = false \
}