mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'bugfix/i2c_func_iram_v4.4' into 'release/v4.4'
I2C: put some interrupt used functions into IRAM See merge request espressif/esp-idf!20991
This commit is contained in:
commit
ee867ec16b
@ -1288,6 +1288,7 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat
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return ret;
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}
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__attribute__((always_inline))
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static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) {
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return cmd->total_bytes == 1;
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}
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|
@ -238,6 +238,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
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*
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* @return I2C interrupt status
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
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{
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return hw->int_status.val;
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@ -293,6 +294,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
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{
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hw->command[cmd_idx].val = cmd.val;
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@ -457,6 +459,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
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*
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* @return RxFIFO readable length
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
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{
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return hw->status_reg.rx_fifo_cnt;
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@ -469,6 +472,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
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*
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* @return TxFIFO writable length
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
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{
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return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt;
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@ -493,6 +497,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_trans_start(i2c_dev_t *hw)
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{
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hw->ctr.trans_start = 1;
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@ -552,6 +557,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l
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*
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* @return None.
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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{
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uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c;
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@ -569,6 +575,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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{
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for(int i = 0; i < len; i++) {
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@ -617,6 +624,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = ~0;
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@ -630,6 +638,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = ~0;
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@ -643,6 +652,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
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{
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hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
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@ -655,6 +665,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
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{
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hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
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@ -667,6 +678,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = I2C_LL_MASTER_TX_INT;
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@ -679,6 +691,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = I2C_LL_MASTER_RX_INT;
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@ -715,6 +728,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
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{
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hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
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@ -739,6 +753,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
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@ -804,6 +819,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
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{
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typeof(hw->int_status) int_sts = hw->int_status;
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@ -830,6 +846,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
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{
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typeof(hw->int_status) int_sts = hw->int_status;
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@ -885,6 +902,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_update(i2c_dev_t *hw)
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{
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;// ESP32 do not support
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|
@ -134,6 +134,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_update(i2c_dev_t *hw)
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{
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hw->ctr.conf_upgate = 1;
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@ -259,6 +260,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
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*
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* @return I2C interrupt status
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
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{
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return hw->int_status.val;
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@ -314,6 +316,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
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{
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hw->command[cmd_idx].val = cmd.val;
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@ -478,6 +481,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
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*
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* @return RxFIFO readable length
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
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{
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return hw->sr.rx_fifo_cnt;
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@ -490,6 +494,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
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*
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* @return TxFIFO writable length
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*/
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__attribute__((always_inline))
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static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
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{
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return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt;
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@ -514,6 +519,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_trans_start(i2c_dev_t *hw)
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{
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hw->ctr.trans_start = 1;
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@ -573,6 +579,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l
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*
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* @return None.
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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{
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for (int i = 0; i< len; i++) {
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@ -589,6 +596,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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{
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for(int i = 0; i < len; i++) {
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@ -637,6 +645,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = ~0;
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@ -650,6 +659,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = ~0;
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@ -663,6 +673,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
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{
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hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
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@ -675,6 +686,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
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{
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hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
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@ -687,6 +699,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = I2C_LL_MASTER_TX_INT;
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@ -699,6 +712,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
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*
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* @return None
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*/
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__attribute__((always_inline))
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static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
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{
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hw->int_clr.val = I2C_LL_MASTER_RX_INT;
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@ -735,6 +749,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
|
||||
@ -759,6 +774,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
|
||||
@ -836,6 +852,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
@ -862,6 +879,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
|
@ -142,6 +142,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_update(i2c_dev_t *hw)
|
||||
{
|
||||
hw->ctr.conf_upgate = 1;
|
||||
@ -267,6 +268,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
|
||||
*
|
||||
* @return I2C interrupt status
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->int_status.val;
|
||||
@ -322,6 +324,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
|
||||
{
|
||||
hw->command[cmd_idx].val = cmd.val;
|
||||
@ -486,6 +489,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
|
||||
*
|
||||
* @return RxFIFO readable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->sr.rx_fifo_cnt;
|
||||
@ -498,6 +502,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
*
|
||||
* @return TxFIFO writable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
|
||||
{
|
||||
return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt;
|
||||
@ -522,6 +527,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_trans_start(i2c_dev_t *hw)
|
||||
{
|
||||
hw->ctr.trans_start = 1;
|
||||
@ -581,6 +587,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
for (int i = 0; i< len; i++) {
|
||||
@ -597,6 +604,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
for(int i = 0; i < len; i++) {
|
||||
@ -645,6 +653,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -658,6 +667,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -671,6 +681,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
|
||||
@ -683,6 +694,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
|
||||
@ -695,6 +707,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_TX_INT;
|
||||
@ -707,6 +720,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_RX_INT;
|
||||
@ -743,6 +757,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
|
||||
@ -767,6 +782,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
|
||||
@ -841,6 +857,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
@ -867,6 +884,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
|
@ -224,6 +224,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
|
||||
*
|
||||
* @return I2C interrupt status
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->int_status.val;
|
||||
@ -280,6 +281,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
|
||||
{
|
||||
hw->command[cmd_idx].val = cmd.val;
|
||||
@ -444,6 +446,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
|
||||
*
|
||||
* @return RxFIFO readable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->status_reg.rx_fifo_cnt;
|
||||
@ -456,6 +459,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
*
|
||||
* @return TxFIFO writable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
|
||||
{
|
||||
return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt;
|
||||
@ -480,6 +484,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_trans_start(i2c_dev_t *hw)
|
||||
{
|
||||
hw->ctr.trans_start = 1;
|
||||
@ -539,6 +544,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c;
|
||||
@ -556,6 +562,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c;
|
||||
@ -605,6 +612,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -618,6 +626,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -631,6 +640,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
|
||||
@ -643,6 +653,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
|
||||
@ -655,6 +666,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_TX_INT;
|
||||
@ -667,6 +679,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_RX_INT;
|
||||
@ -703,6 +716,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
|
||||
@ -727,6 +741,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
|
||||
@ -795,6 +810,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
@ -821,6 +837,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
@ -894,6 +911,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_update(i2c_dev_t *hw)
|
||||
{
|
||||
;// ESP32S2 do not support
|
||||
|
@ -129,6 +129,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_update(i2c_dev_t *hw)
|
||||
{
|
||||
hw->ctr.conf_upgate = 1;
|
||||
@ -272,6 +273,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask)
|
||||
*
|
||||
* @return I2C interrupt status
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->int_status.val;
|
||||
@ -327,6 +329,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx)
|
||||
{
|
||||
_Static_assert(sizeof(i2c_comd0_reg_t) == sizeof(i2c_hw_cmd_t),
|
||||
@ -494,6 +497,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw)
|
||||
*
|
||||
* @return RxFIFO readable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
{
|
||||
return hw->sr.rxfifo_cnt;
|
||||
@ -506,6 +510,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw)
|
||||
*
|
||||
* @return TxFIFO writable length
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw)
|
||||
{
|
||||
return SOC_I2C_FIFO_LEN - hw->sr.txfifo_cnt;
|
||||
@ -530,6 +535,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_trans_start(i2c_dev_t *hw)
|
||||
{
|
||||
hw->ctr.trans_start = 1;
|
||||
@ -605,6 +611,7 @@ static inline void i2c_ll_get_scl_clk_timing(i2c_dev_t *hw, int *high_period, in
|
||||
*
|
||||
* @return None.
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
for (int i = 0; i< len; i++) {
|
||||
@ -621,6 +628,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
|
||||
{
|
||||
for(int i = 0; i < len; i++) {
|
||||
@ -669,6 +677,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -682,6 +691,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = ~0;
|
||||
@ -695,6 +705,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT);
|
||||
@ -707,6 +718,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT);
|
||||
@ -719,6 +731,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_TX_INT;
|
||||
@ -731,6 +744,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_MASTER_RX_INT;
|
||||
@ -767,6 +781,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT);
|
||||
@ -791,6 +806,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw)
|
||||
{
|
||||
hw->int_clr.val = I2C_LL_SLAVE_TX_INT;
|
||||
@ -859,6 +875,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk)
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
@ -885,6 +902,8 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
|
||||
__attribute__((always_inline))
|
||||
static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event)
|
||||
{
|
||||
typeof(hw->int_status) int_sts = hw->int_status;
|
||||
|
@ -64,11 +64,6 @@ void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask)
|
||||
i2c_ll_disable_intr_mask(hal->dev, mask);
|
||||
}
|
||||
|
||||
void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask)
|
||||
{
|
||||
*mask = i2c_ll_get_intsts_mask(hal->dev);
|
||||
}
|
||||
|
||||
void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en)
|
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{
|
||||
i2c_ll_set_fifo_mode(hal->dev, fifo_mode_en);
|
||||
|
@ -67,3 +67,8 @@ void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len)
|
||||
{
|
||||
*len = i2c_ll_get_txfifo_len(hal->dev);
|
||||
}
|
||||
|
||||
void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask)
|
||||
{
|
||||
*mask = i2c_ll_get_intsts_mask(hal->dev);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user