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kconfig: refactor xtal freq kconfig to common configuration item

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This commit is contained in:
jingli 2022-07-13 10:54:41 +08:00
parent a61abcc22e
commit ee3423834e
54 changed files with 197 additions and 154 deletions
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7
components/bootloader_support/src/bootloader_clock_init.c
View File

@ -42,13 +42,6 @@ __attribute__((weak)) void bootloader_clock_configure(void)
if (esp_rom_get_reset_reason(0) != RESET_REASON_CPU0_SW || rtc_clk_apb_freq_get() < APB_CLK_FREQ) {
rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
#if CONFIG_IDF_TARGET_ESP32
clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
#endif
#if CONFIG_IDF_TARGET_ESP32C2
clk_cfg.xtal_freq = CONFIG_ESP32C2_XTAL_FREQ;
#endif
/* For other chips, there is no XTAL_FREQ choice */
clk_cfg.cpu_freq_mhz = cpu_freq_mhz;
clk_cfg.slow_clk_src = rtc_clk_slow_src_get();
if (clk_cfg.slow_clk_src == SOC_RTC_SLOW_CLK_SRC_INVALID) {

4
components/bt/controller/esp32c2/bt.c
View File

@ -576,13 +576,13 @@ void ble_rtc_clk_init(void)
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
#ifdef CONFIG_ESP32C2_XTAL_FREQ_26
#ifdef CONFIG_XTAL_FREQ_26
// LP_TIMER_CLK_DIV_NUM -> 130
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
#else
// LP_TIMER_CLK_DIV_NUM -> 250
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
#endif // CONFIG_ESP32C2_XTAL_FREQ_26
#endif // CONFIG_XTAL_FREQ_26
// MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
// MODEM_CLKRST_ETM_CLK_SEL -> 0

2
components/bt/include/esp32c2/include/esp_bt.h
View File

@ -226,7 +226,7 @@ typedef struct {
.coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \
.ble_scan_classify_filter_enable = 0, \
.main_xtal_freq = CONFIG_ESP32C2_XTAL_FREQ, \
.main_xtal_freq = CONFIG_XTAL_FREQ, \
.config_magic = CONFIG_MAGIC, \
};

4
components/bt/include/esp32c2/include/esp_bt_cfg.h
View File

@ -192,11 +192,11 @@ extern "C" {
#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
#ifdef CONFIG_ESP32C2_XTAL_FREQ_26
#ifdef CONFIG_XTAL_FREQ_26
#define RTC_FREQ_N (40000) /* in Hz */
#else
#define RTC_FREQ_N (32000) /* in Hz */
#endif // CONFIG_ESP32C2_XTAL_FREQ_26
#endif // CONFIG_XTAL_FREQ_26
#define BLE_LL_TX_PWR_DBM_N (0)

2
components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m
View File

@ -1,2 +1,2 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_ESP32C2_XTAL_FREQ_26=y
CONFIG_XTAL_FREQ_26=y

43
components/esp_hw_support/Kconfig
View File

@ -103,7 +103,6 @@ menu "Hardware Settings"
If you are seeing "flash read err, 1000" message printed to the
console after deep sleep reset, try increasing this value.
endmenu
menu "RTC Clock Config"
@ -168,7 +167,6 @@ menu "Hardware Settings"
default 0x4000 if MMU_PAGE_SIZE_16KB
default 0x8000 if MMU_PAGE_SIZE_32KB
default 0x10000 if MMU_PAGE_SIZE_64KB
endmenu
# Insert chip-specific HW config
@ -193,4 +191,45 @@ menu "Hardware Settings"
(e.g. SPI Flash write).
endmenu # GDMA Configuration
menu "Main XTAL Config"
choice XTAL_FREQ_SEL
prompt "Main XTAL frequency"
default XTAL_FREQ_40 if SOC_XTAL_SUPPORT_40M
help
This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
The selected value MUST reflect the frequency of the given hardware.
Note: The XTAL_FREQ_AUTO option allows the ESP target to automatically estimating XTAL clock's
operating frequency. However, this feature is only supported on the ESP32. The ESP32 uses the
internal 8MHZ as a reference when estimating. Due to the internal oscillator's frequency being
temperature dependent, usage of the XTAL_FREQ_AUTO is not recommended in applications that operate
in high ambient temperatures or use high-temperature qualified chips and modules.
config XTAL_FREQ_24
depends on SOC_XTAL_SUPPORT_24M
bool "24 MHz"
config XTAL_FREQ_26
depends on SOC_XTAL_SUPPORT_26M
bool "26 MHz"
config XTAL_FREQ_32
depends on SOC_XTAL_SUPPORT_32M
bool "32 MHz"
config XTAL_FREQ_40
depends on SOC_XTAL_SUPPORT_40M
bool "40 MHz"
config XTAL_FREQ_AUTO
depends on SOC_XTAL_SUPPORT_AUTO_DETECT
bool "Autodetect"
endchoice
# rtc_xtal_freq_t enum in soc/rtc.h lists the XTAL frequencies can be supported
# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
config XTAL_FREQ
int
default 24 if XTAL_FREQ_24
default 26 if XTAL_FREQ_26
default 32 if XTAL_FREQ_32
default 40 if XTAL_FREQ_40
default 0 if XTAL_FREQ_AUTO
endmenu
endmenu

2
components/esp_hw_support/include/esp_private/esp_clk.h
View File

@ -63,7 +63,7 @@ int esp_clk_apb_freq(void);
* @brief Return frequency of the main XTAL
*
* Frequency of the main XTAL can be either auto-detected or set at compile
* time (see CONFIG_ESP32_XTAL_FREQ_SEL sdkconfig option). In both cases, this
* time (see CONFIG_XTAL_FREQ_SEL sdkconfig option). In both cases, this
* function returns the actual value at run time.
*
* @return XTAL frequency, in Hz

30
components/esp_hw_support/port/esp32/Kconfig.hw_support
View File

@ -24,33 +24,3 @@ config ESP32_REV_MIN
default 1 if ESP32_REV_MIN_1
default 2 if ESP32_REV_MIN_2
default 3 if ESP32_REV_MIN_3
choice ESP32_XTAL_FREQ_SEL
prompt "Main XTAL frequency"
default ESP32_XTAL_FREQ_40
help
ESP32 currently supports the following XTAL frequencies:
- 26 MHz
- 40 MHz
Startup code can automatically estimate XTAL frequency. This feature
uses the internal 8MHz oscillator as a reference. Because the internal
oscillator frequency is temperature dependent, it is not recommended
to use automatic XTAL frequency detection in applications which need
to work at high ambient temperatures and use high-temperature
qualified chips and modules.
config ESP32_XTAL_FREQ_40
bool "40 MHz"
config ESP32_XTAL_FREQ_26
bool "26 MHz"
config ESP32_XTAL_FREQ_AUTO
bool "Autodetect"
endchoice
# Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
config ESP32_XTAL_FREQ
int
default 0 if ESP32_XTAL_FREQ_AUTO
default 40 if ESP32_XTAL_FREQ_40
default 26 if ESP32_XTAL_FREQ_26

2
components/esp_hw_support/port/esp32/rtc_clk_init.c
View File

@ -95,7 +95,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
rtc_xtal_freq_t est_xtal_freq = rtc_clk_xtal_freq_estimate();
if (est_xtal_freq != configured_xtal_freq) {
ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
configured_xtal_freq, est_xtal_freq);
}
}

21
components/esp_hw_support/port/esp32c2/Kconfig.hw_support
View File

@ -1,21 +0,0 @@
config ESP32C2_XTAL_FREQ
int
default 40 if ESP32C2_XTAL_FREQ_40
default 26 if ESP32C2_XTAL_FREQ_26
choice ESP32C2_XTAL_FREQ_SEL
prompt "Main XTAL frequency"
default ESP32C2_XTAL_FREQ_40
help
ESP32-C2 currently supports the following XTAL frequencies:
- 26 MHz
- 40 MHz
This option must be set to the correct value for the given hardware.
config ESP32C2_XTAL_FREQ_40 # TODO: IDF-5488
bool "40 MHz"
config ESP32C2_XTAL_FREQ_26
bool "26 MHz"
endchoice

4
components/esp_hw_support/port/esp32c2/rtc_clk.c
View File

@ -298,8 +298,8 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
{
uint32_t xtal_freq_mhz = clk_ll_xtal_load_freq_mhz();
if (xtal_freq_mhz == 0) {
ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_ESP32C2_XTAL_FREQ);
return CONFIG_ESP32C2_XTAL_FREQ;
ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_XTAL_FREQ);
return CONFIG_XTAL_FREQ;
}
return (rtc_xtal_freq_t)xtal_freq_mhz;
}

6
components/esp_hw_support/port/esp32c2/systimer.c
View File

@ -12,7 +12,7 @@
* So the resolution of the systimer is 40MHz/2.5 = 16MHz, or 26MHz/2.5 = 10.4MHz.
*/
#if CONFIG_ESP32C2_XTAL_FREQ_40
#if CONFIG_XTAL_FREQ_40
uint64_t systimer_ticks_to_us(uint64_t ticks)
{
return ticks / 16;
@ -22,7 +22,7 @@ uint64_t systimer_us_to_ticks(uint64_t us)
{
return us * 16;
}
#elif CONFIG_ESP32C2_XTAL_FREQ_26
#elif CONFIG_XTAL_FREQ_26
uint64_t systimer_ticks_to_us(uint64_t ticks)
{
return ticks * 5 / 52;
@ -34,4 +34,4 @@ uint64_t systimer_us_to_ticks(uint64_t us)
}
#else
#error "Unsupported XTAL frequency by systimer"
#endif // CONFIG_ESP32C2_XTAL_FREQ_xx
#endif // CONFIG_XTAL_FREQ_xx

5
components/esp_hw_support/sdkconfig.rename.esp32
View File

@ -22,3 +22,8 @@ CONFIG_ESP32_SPIRAM_SUPPORT CONFIG_SPIRAM
CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP
CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY
CONFIG_ESP32_XTAL_FREQ_26 CONFIG_XTAL_FREQ_26
CONFIG_ESP32_XTAL_FREQ_40 CONFIG_XTAL_FREQ_40
CONFIG_ESP32_XTAL_FREQ_AUTO CONFIG_XTAL_FREQ_AUTO
CONFIG_ESP32_XTAL_FREQ CONFIG_XTAL_FREQ

2
components/esp_system/Kconfig
View File

@ -331,7 +331,7 @@ menu "ESP System Settings"
int
prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM
depends on ESP_CONSOLE_UART
default 74880 if ESP32C2_XTAL_FREQ_26
default 74880 if (IDF_TARGET_ESP32C2 && XTAL_FREQ_26)
default 115200
range 1200 4000000 if !PM_ENABLE
range 1200 1000000 if PM_ENABLE

4
components/esp_system/port/soc/esp32c2/clk.c
View File

@ -71,7 +71,9 @@ static const char *TAG = "clk";
}
rtc_init(cfg);
assert(rtc_clk_xtal_freq_get() == CONFIG_ESP32C2_XTAL_FREQ);
#ifndef CONFIG_XTAL_FREQ_AUTO
assert(rtc_clk_xtal_freq_get() == CONFIG_XTAL_FREQ);
#endif
bool rc_fast_d256_is_enabled = rtc_clk_8md256_enabled();
rtc_clk_8m_enable(true, rc_fast_d256_is_enabled);

12
components/soc/esp32/include/soc/Kconfig.soc_caps.in
View File

@ -127,6 +127,18 @@ config SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL
int
default 5
config SOC_XTAL_SUPPORT_26M
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_XTAL_SUPPORT_AUTO_DETECT
bool
default y
config SOC_ADC_RTC_CTRL_SUPPORTED
bool
default y

2
components/soc/esp32/include/soc/rtc.h
View File

@ -122,7 +122,7 @@ typedef struct rtc_clk_config_s {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_AUTO, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 80, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

5
components/soc/esp32/include/soc/soc_caps.h
View File

@ -96,6 +96,11 @@
#endif // SOC_CAPS_ECO_VER < 2
#define SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL (5U)
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_26M 1
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_AUTO_DETECT 1
/*-------------------------- ADC CAPS ----------------------------------------*/
/*!< SAR ADC Module*/
#define SOC_ADC_RTC_CTRL_SUPPORTED 1

8
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
View File

@ -67,6 +67,14 @@ config SOC_SYSTIMER_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_26M
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_ADC_DIG_CTRL_SUPPORTED
bool
default y

2
components/soc/esp32c2/include/soc/rtc.h
View File

@ -174,7 +174,7 @@ typedef struct {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_40M, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 80, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

4
components/soc/esp32c2/include/soc/soc_caps.h
View File

@ -42,6 +42,10 @@
#define SOC_SECURE_BOOT_SUPPORTED 1
#define SOC_SYSTIMER_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_26M 1
#define SOC_XTAL_SUPPORT_40M 1
/*-------------------------- ADC CAPS -------------------------------*/
/*!< SAR ADC Module*/
#define SOC_ADC_DIG_CTRL_SUPPORTED 1

4
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@ -115,6 +115,10 @@ config SOC_MEMPROT_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

2
components/soc/esp32c3/include/soc/rtc.h
View File

@ -177,7 +177,7 @@ typedef struct {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_40M, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 80, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

3
components/soc/esp32c3/include/soc/soc_caps.h
View File

@ -57,6 +57,9 @@
#define SOC_SECURE_BOOT_SUPPORTED 1
#define SOC_MEMPROT_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
View File

@ -103,6 +103,10 @@ config SOC_SECURE_BOOT_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_32M
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y

2
components/soc/esp32h2/include/soc/rtc.h
View File

@ -182,7 +182,7 @@ typedef struct {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_32M, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 32, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

2
components/soc/esp32h2/include/soc/soc_caps.h
View File

@ -59,6 +59,8 @@
#define SOC_FLASH_ENC_SUPPORTED 1
#define SOC_SECURE_BOOT_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)

4
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
View File

@ -143,6 +143,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_ADC_RTC_CTRL_SUPPORTED
bool
default y

2
components/soc/esp32s2/include/soc/rtc.h
View File

@ -170,7 +170,7 @@ typedef struct {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_40M, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 80, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

2
components/soc/esp32s2/include/soc/soc_caps.h
View File

@ -75,6 +75,8 @@
#define SOC_MEMPROT_SUPPORTED 1
#define SOC_TOUCH_SENSOR_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
/*-------------------------- ADC CAPS ----------------------------------------*/
/*!< SAR ADC Module*/

4
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
View File

@ -199,6 +199,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_APPCPU_HAS_CLOCK_GATING_BUG
bool
default y

2
components/soc/esp32s3/include/soc/rtc.h
View File

@ -179,7 +179,7 @@ typedef struct {
* Default initializer for rtc_clk_config_t
*/
#define RTC_CLK_CONFIG_DEFAULT() { \
.xtal_freq = RTC_XTAL_FREQ_40M, \
.xtal_freq = CONFIG_XTAL_FREQ, \
.cpu_freq_mhz = 80, \
.fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
.slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

3
components/soc/esp32s3/include/soc/soc_caps.h
View File

@ -65,6 +65,9 @@
#define SOC_MEMPROT_SUPPORTED 1
#define SOC_TOUCH_SENSOR_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
/*-------------------------- SOC CAPS ----------------------------------------*/
#define SOC_APPCPU_HAS_CLOCK_GATING_BUG (1)

8
examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32
View File

@ -1118,10 +1118,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32
View File

@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32
View File

@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32
View File

@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32
View File

@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32
View File

@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32
View File

@ -1117,10 +1117,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32
View File

@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32
View File

@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32
View File

@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
examples/bluetooth/blufi/sdkconfig.defaults.esp32
View File

@ -1107,10 +1107,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_26 is not set
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
# CONFIG_XTAL_FREQ_26 is not set
# CONFIG_XTAL_FREQ_AUTO is not set
CONFIG_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set

8
tools/ldgen/samples/sdkconfig
View File

@ -184,10 +184,10 @@ CONFIG_RTC_CLK_SRC_EXT_CRYS=
CONFIG_RTC_CLK_CAL_CYCLES=1024
CONFIG_RTC_XTAL_BOOTSTRAP_CYCLES=100
CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
CONFIG_ESP32_XTAL_FREQ_40=y
CONFIG_ESP32_XTAL_FREQ_26=
CONFIG_ESP32_XTAL_FREQ_AUTO=
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_XTAL_FREQ_40=y
CONFIG_XTAL_FREQ_26=
CONFIG_XTAL_FREQ_AUTO=
CONFIG_XTAL_FREQ=40
CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE=
CONFIG_ESP_TIMER_PROFILING=
CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS=

2
tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal
View File

@ -1,2 +1,2 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_ESP32C2_XTAL_FREQ_26=y
CONFIG_XTAL_FREQ_26=y

2
tools/unit-test-app/configs/default_c2_26mhz
View File

@ -1,5 +1,5 @@
# This config is split between targets since different component needs to be included
CONFIG_IDF_TARGET="esp32c2"
CONFIG_ESP32C2_XTAL_FREQ_26=y
CONFIG_XTAL_FREQ_26=y
TEST_COMPONENTS=esp_timer

2
tools/unit-test-app/sdkconfig.defaults.esp32
View File

@ -1,3 +1,3 @@
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
CONFIG_ESP32_XTAL_FREQ_AUTO=y
CONFIG_XTAL_FREQ_AUTO=y
CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y

4
tools/unit-test-app/tools/ConfigDependency.yml
View File

@ -7,5 +7,5 @@
"ESP32C3_IDF": "CONFIG_IDF_TARGET_ESP32C3=y"
"quad_psram": '{CONFIG_SPIRAM_MODE_QUAD=y} and {CONFIG_IDF_TARGET_ESP32S3=y}'
"octal_psram": '{CONFIG_SPIRAM_MODE_OCT=y} and {CONFIG_IDF_TARGET_ESP32S3=y}'
"xtal_26mhz": '{CONFIG_ESP32C2_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
"xtal_40mhz": '{CONFIG_ESP32C2_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
"xtal_26mhz": '{CONFIG_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
"xtal_40mhz": '{CONFIG_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'