mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'test/driver_i2c' into 'master'
add i2c case See merge request idf/esp-idf!1937
This commit is contained in:
commit
edff003e72
@ -1608,6 +1608,31 @@ UT_012_05:
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- UT_T1_1
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- 8Mpsram
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UT_014_01:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T2_I2C
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UT_014_02:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T2_I2C
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UT_014_03:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T2_I2C
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UT_014_04:
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<<: *unit_test_template
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tags:
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- ESP32_IDF
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- UT_T2_I2C
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- psram
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UT_015_01:
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<<: *unit_test_template
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tags:
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526
components/driver/test/test_i2c.c
Normal file
526
components/driver/test/test_i2c.c
Normal file
@ -0,0 +1,526 @@
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/**
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* test environment UT_T2_I2C:
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* please prepare two ESP32-WROVER-KIT board.
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* Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "unity.h"
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#include "test_utils.h"
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#include "unity_config.h"
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#include "driver/i2c.h"
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#include "esp_attr.h"
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#include "esp_log.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/i2c_struct.h"
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#include "soc/i2c_reg.h"
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#include "esp_system.h"
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#include "driver/pcnt.h"
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#define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
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#define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
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#define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
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#define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
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#define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
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#define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
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#define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
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#define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
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#define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
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#define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
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#define I2C_MASTER_NUM I2C_NUM_1 /*!< I2C port number for master dev */
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#define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
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#define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
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#define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
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#define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
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#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
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#define READ_BIT I2C_MASTER_READ /*!< I2C master read */
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#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
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#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
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#define ACK_VAL 0x0 /*!< I2C ack value */
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#define NACK_VAL 0x1 /*!< I2C nack value */
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#define PULSE_IO 19
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#define PCNT_INPUT_IO 4
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#define PCNT_CTRL_FLOATING_IO 5
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#define HIGHEST_LIMIT 10000
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#define LOWEST_LIMIT -10000
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static DRAM_ATTR i2c_dev_t *const I2C[I2C_NUM_MAX] = { &I2C0, &I2C1 };
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static esp_err_t i2c_master_read_slave(i2c_port_t i2c_num, uint8_t *data_rd, size_t size)
|
||||
{
|
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if (size == 0) {
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return ESP_OK;
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}
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
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if (size > 1) {
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i2c_master_read(cmd, data_rd, size - 1, ACK_VAL);
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}
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i2c_master_read_byte(cmd, data_rd + size - 1, NACK_VAL);
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i2c_master_stop(cmd);
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esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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return ret;
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}
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static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
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{
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
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TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
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TEST_ESP_OK(i2c_master_stop(cmd));
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esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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return ret;
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}
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// print the reading buffer
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static void disp_buf(uint8_t *buf, int len)
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||||
{
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int i;
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for (i = 0; i < len; i++) {
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printf("%02x ", buf[i]);
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if (( i + 1 ) % 16 == 0) {
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printf("\n");
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}
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}
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printf("\n");
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}
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static i2c_config_t i2c_master_init()
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{
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i2c_config_t conf_master = {
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.mode = I2C_MODE_MASTER,
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.sda_pullup_en = GPIO_PULLUP_ENABLE,
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.scl_pullup_en = GPIO_PULLUP_ENABLE,
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.master.clk_speed = I2C_MASTER_FREQ_HZ,
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.sda_io_num = I2C_MASTER_SDA_IO,
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.scl_io_num = I2C_MASTER_SCL_IO,
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};
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return conf_master;
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}
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static i2c_config_t i2c_slave_init()
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{
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i2c_config_t conf_slave = {
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.mode = I2C_MODE_SLAVE,
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.sda_io_num = I2C_SLAVE_SDA_IO,
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.scl_io_num = I2C_SLAVE_SCL_IO,
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.sda_pullup_en = GPIO_PULLUP_ENABLE,
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.scl_pullup_en = GPIO_PULLUP_ENABLE,
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.slave.addr_10bit_en = 0,
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.slave.slave_addr = ESP_SLAVE_ADDR,
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};
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||||
return conf_slave;
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||||
}
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TEST_CASE("I2C config test", "[i2c]")
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{
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// master test
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i2c_config_t conf_master = i2c_master_init();
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||||
gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
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gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
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for (int i = 0; i < 2; i++) {
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for (int j = 0; j < 2; j++) {
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||||
conf_master.sda_pullup_en = sda_pull_up_en[i];
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conf_master.scl_pullup_en = scl_pull_up_en[j];
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TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
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TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
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TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
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I2C_MASTER_RX_BUF_DISABLE,
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I2C_MASTER_TX_BUF_DISABLE, 0));
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TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
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}
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}
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// slave test
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i2c_config_t conf_slave = i2c_slave_init();
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for (int i = 0; i < 2; i++) {
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for (int j = 0; j < 2; j++) {
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conf_master.sda_pullup_en = sda_pull_up_en[i];
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conf_master.scl_pullup_en = scl_pull_up_en[j];
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conf_slave.sda_pullup_en = sda_pull_up_en[i];
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conf_slave.scl_pullup_en = scl_pull_up_en[j];
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TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
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TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
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TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
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I2C_SLAVE_RX_BUF_LEN,
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I2C_SLAVE_TX_BUF_LEN, 0));
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TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
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}
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}
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}
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TEST_CASE("I2C set and get period test", "[i2c]")
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{
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int high_period, low_period;
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i2c_config_t conf_master = i2c_master_init();
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TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
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TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
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I2C_MASTER_RX_BUF_DISABLE,
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I2C_MASTER_TX_BUF_DISABLE, 0));
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TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
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TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
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TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
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TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
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TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
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TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
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TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
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TEST_ASSERT_EQUAL_INT(300, high_period);
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TEST_ASSERT_EQUAL_INT(400, low_period);
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TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
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}
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TEST_CASE("I2C config FIFO test", "[i2c]")
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{
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TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
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TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
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TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
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TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
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TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
|
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}
|
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|
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TEST_CASE("I2C timing test", "[i2c]")
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{
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int test_setup_time, test_data_time, test_stop_time, test_hold_time;
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uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
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i2c_config_t conf_master = i2c_master_init();
|
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TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
|
||||
TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
|
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TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
|
||||
TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
|
||||
|
||||
for (int i = 0; i < DATA_LENGTH; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
|
||||
TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
|
||||
TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
|
||||
TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
|
||||
TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
|
||||
TEST_ASSERT_EQUAL_INT32(80, test_data_time);
|
||||
TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
|
||||
TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
|
||||
free(data_wr);
|
||||
i2c_driver_delete(I2C_MASTER_NUM);
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE("I2C data mode test", "[i2c]")
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
|
||||
i2c_config_t conf_master = i2c_master_init();
|
||||
TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
for (int i = 0; i < DATA_LENGTH; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
|
||||
TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
|
||||
TEST_ASSERT_EQUAL_INT(1, I2C[I2C_MASTER_NUM]->ctr.rx_lsb_first);
|
||||
TEST_ASSERT_EQUAL_INT(1, I2C[I2C_MASTER_NUM]->ctr.tx_lsb_first);
|
||||
|
||||
TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
|
||||
TEST_ASSERT_EQUAL_INT(1, test_tx_trans_mode);
|
||||
TEST_ASSERT_EQUAL_INT(1, test_rx_trans_mode);
|
||||
free(data_wr);
|
||||
i2c_driver_delete(I2C_MASTER_NUM);
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE("I2C driver memory leaking check", "[i2c]")
|
||||
{
|
||||
esp_err_t ret;
|
||||
i2c_config_t conf_slave = i2c_slave_init();
|
||||
ret = i2c_param_config(I2C_SLAVE_NUM, &conf_slave);
|
||||
TEST_ASSERT(ret == ESP_OK);
|
||||
|
||||
int size = esp_get_free_heap_size();
|
||||
for (uint32_t i = 0; i <= 1000; i++) {
|
||||
ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0);
|
||||
TEST_ASSERT(ret == ESP_OK);
|
||||
vTaskDelay(10 / portTICK_RATE_MS);
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
TEST_ASSERT(ret == ESP_OK);
|
||||
}
|
||||
|
||||
TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
|
||||
}
|
||||
|
||||
static void i2c_master_write_test()
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int i;
|
||||
|
||||
i2c_config_t conf_master = i2c_master_init();
|
||||
TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
|
||||
unity_send_signal("master write");
|
||||
for (i = 0; i < DATA_LENGTH / 2; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
|
||||
disp_buf(data_wr, i + 1);
|
||||
free(data_wr);
|
||||
unity_wait_for_signal("ready to delete");
|
||||
TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
|
||||
}
|
||||
|
||||
static void i2c_slave_read_test()
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int size_rd = 0;
|
||||
int len = 0;
|
||||
|
||||
i2c_config_t conf_slave = i2c_slave_init();
|
||||
TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
|
||||
unity_wait_for_signal("master write");
|
||||
while (1) {
|
||||
len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
size_rd += len;
|
||||
}
|
||||
disp_buf(data_rd, size_rd);
|
||||
for (int i = 0; i < size_rd; i++) {
|
||||
TEST_ASSERT(data_rd[i] == i);
|
||||
}
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
|
||||
|
||||
static void master_read_slave_test()
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
memset(data_rd, 0, DATA_LENGTH);
|
||||
i2c_config_t conf_master = i2c_master_init();
|
||||
TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
|
||||
|
||||
unity_send_signal("slave write");
|
||||
unity_wait_for_signal("master read");
|
||||
i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
|
||||
i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
|
||||
i2c_master_stop(cmd);
|
||||
i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
for (int i = 0; i < RW_TEST_LENGTH; i++) {
|
||||
printf("%d\n", data_rd[i]);
|
||||
TEST_ASSERT(data_rd[i]==i);
|
||||
}
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
i2c_driver_delete(I2C_MASTER_NUM);
|
||||
}
|
||||
|
||||
static void slave_write_buffer_test()
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int size_rd;
|
||||
|
||||
i2c_config_t conf_slave = i2c_slave_init();
|
||||
TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
|
||||
unity_wait_for_signal("slave write");
|
||||
for (int i = 0; i < DATA_LENGTH / 2; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
|
||||
disp_buf(data_wr, size_rd);
|
||||
unity_send_signal("master read");
|
||||
unity_wait_for_signal("ready to delete");
|
||||
free(data_wr);
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
|
||||
|
||||
static void i2c_master_write_read_test()
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
memset(data_rd, 0, DATA_LENGTH);
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
|
||||
i2c_config_t conf_master = i2c_master_init();
|
||||
TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
|
||||
|
||||
unity_send_signal("slave write");
|
||||
unity_wait_for_signal("master read and write");
|
||||
i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
|
||||
i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
|
||||
i2c_master_stop(cmd);
|
||||
i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
disp_buf(data_rd, RW_TEST_LENGTH);
|
||||
for (int i = 0; i < RW_TEST_LENGTH; i++) {
|
||||
TEST_ASSERT(data_rd[i] == i/2);
|
||||
}
|
||||
|
||||
for (int i = 0; i < DATA_LENGTH; i++) {
|
||||
data_wr[i] = i % 3;
|
||||
}
|
||||
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
|
||||
free(data_wr);
|
||||
free(data_rd);
|
||||
unity_send_signal("slave read");
|
||||
unity_wait_for_signal("ready to delete");
|
||||
i2c_driver_delete(I2C_MASTER_NUM);
|
||||
}
|
||||
|
||||
static void i2c_slave_read_write_test()
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
memset(data_rd, 0, DATA_LENGTH);
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int size_rd;
|
||||
|
||||
i2c_config_t conf_slave = i2c_slave_init();
|
||||
TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
unity_wait_for_signal("slave write");
|
||||
|
||||
for (int i = 0; i < DATA_LENGTH / 2; i++) {
|
||||
data_wr[i] = i/2;
|
||||
}
|
||||
size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
|
||||
disp_buf(data_wr, size_rd);
|
||||
unity_send_signal("master read and write");
|
||||
unity_wait_for_signal("slave read");
|
||||
size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
|
||||
printf("slave read data is:\n");
|
||||
disp_buf(data_rd, size_rd);
|
||||
for (int i = 0; i < RW_TEST_LENGTH; i++) {
|
||||
TEST_ASSERT(data_rd[i] == i % 3);
|
||||
}
|
||||
free(data_wr);
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
|
||||
|
||||
static void i2c_master_repeat_write()
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int times = 3;
|
||||
|
||||
i2c_config_t conf_master = i2c_master_init();
|
||||
TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
|
||||
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE, 0));
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
|
||||
for (int j = 0; j < times; j++) {
|
||||
for (int i = 0; i < DATA_LENGTH; i++) {
|
||||
data_wr[i] = j + i;
|
||||
}
|
||||
i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
|
||||
disp_buf(data_wr, RW_TEST_LENGTH);
|
||||
}
|
||||
free(data_wr);
|
||||
unity_send_signal("master write");
|
||||
unity_wait_for_signal("ready to delete");
|
||||
i2c_driver_delete(I2C_MASTER_NUM);
|
||||
}
|
||||
|
||||
static void i2c_slave_repeat_read()
|
||||
{
|
||||
int size_rd = 0;
|
||||
int times = 3;
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
|
||||
|
||||
i2c_config_t conf_slave = i2c_slave_init();
|
||||
TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
unity_wait_for_signal("master write");
|
||||
|
||||
while (1) {
|
||||
int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
size_rd += len;
|
||||
}
|
||||
disp_buf(data_rd, size_rd);
|
||||
for (int j = 0; j < times; j++) {
|
||||
for (int i = 0; i < RW_TEST_LENGTH; i++) {
|
||||
printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
|
||||
TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
|
||||
}
|
||||
}
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
|
Loading…
Reference in New Issue
Block a user