mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'feat/sdmmc_spi_no_crc_v5.3' into 'release/v5.3'
feat(sdmmc_io): support sending CMD53 with fixed address, bypass sdspi crc check (v5.3) See merge request espressif/esp-idf!31075
This commit is contained in:
commit
ed7dd46687
@ -14,6 +14,7 @@
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#include "freertos/task.h"
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#include "esp_timer.h"
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#include "ccomp_timer.h"
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#include "string.h"
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#include "sdmmc_cmd.h"
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#include "driver/sdmmc_host.h"
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@ -43,7 +44,7 @@ typedef struct {
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---------------------------------------------------------------*/
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static sdmmc_card_t s_card;
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static void s_master_init(test_sdio_param_t *host_param, essl_handle_t *out_handle)
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static void s_master_init(test_sdio_param_t *host_param, essl_handle_t *out_handle, sdmmc_card_t** out_card)
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{
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sdmmc_host_t host_config = (sdmmc_host_t)SDMMC_HOST_DEFAULT();
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host_config.flags = host_param->host_flags;
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@ -81,6 +82,10 @@ static void s_master_init(test_sdio_param_t *host_param, essl_handle_t *out_hand
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TEST_ESP_OK(essl_sdio_init_dev(out_handle, &essl_sdio_config));
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TEST_ESP_OK(essl_init(*out_handle, TEST_TIMEOUT_MAX));
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if (out_card) {
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*out_card = card;
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}
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}
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static void s_master_deinit(void)
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@ -114,7 +119,7 @@ TEST_CASE("SDIO_SDMMC: test interrupt", "[sdio]")
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.max_freq_khz = SDMMC_FREQ_HIGHSPEED,
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};
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//essl init and sdmmc init
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s_master_init(&test_param, &handle);
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s_master_init(&test_param, &handle, NULL);
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TEST_ESP_OK(essl_set_intr_ena(handle, TEST_INT_MASK_ALL, TEST_TIMEOUT_MAX));
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ret = essl_wait_int(handle, 0);
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@ -149,7 +154,7 @@ TEST_CASE("SDIO_SDMMC: test register", "[sdio]")
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.max_freq_khz = SDMMC_FREQ_HIGHSPEED,
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};
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//essl init and sdmmc init
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s_master_init(&test_param, &handle);
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s_master_init(&test_param, &handle, NULL);
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uint32_t init_val = 30;
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srand(850);
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@ -183,7 +188,7 @@ TEST_CASE("SDIO_SDMMC: test reset", "[sdio]")
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.max_freq_khz = SDMMC_FREQ_HIGHSPEED,
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};
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//essl init and sdmmc init
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s_master_init(&test_param, &handle);
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s_master_init(&test_param, &handle, NULL);
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//wait for the slave to stop, reset and start again
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vTaskDelay(10);
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@ -215,6 +220,66 @@ TEST_CASE("SDIO_SDMMC: test reset", "[sdio]")
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s_master_deinit();
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}
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/*---------------------------------------------------------------
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SDMMC_SDIO: test fixed addr
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---------------------------------------------------------------*/
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#include "soc/soc.h"
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#define HOST_SLCHOST_CONF_W0_REG (DR_REG_SLCHOST_BASE + 0x6C)
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TEST_CASE("SDIO_SDMMC: test fixed addr", "[sdio]")
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{
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essl_handle_t handle = NULL;
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sdmmc_card_t* card;
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test_sdio_param_t test_param = {
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.host_flags = SDMMC_HOST_FLAG_4BIT | SDMMC_HOST_FLAG_ALLOC_ALIGNED_BUF,
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.max_freq_khz = SDMMC_FREQ_HIGHSPEED,
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};
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//essl init and sdmmc init
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s_master_init(&test_param, &handle, &card);
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vTaskDelay(10);
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const int test_size = 128;
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const int write_addr = 6;
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uint8_t buf[test_size] = {};
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srand(850);
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for (int i = 0; i < test_size; i++) {
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buf[i] = rand();
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}
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ESP_LOG_BUFFER_HEX("write_val", buf, test_size);
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TEST_ESP_OK(sdmmc_io_write_bytes(card, 1, ((HOST_SLCHOST_CONF_W0_REG + write_addr) & 0x3FF) | SDMMC_IO_FIXED_ADDR, buf, test_size));
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const int max_size = 64;
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uint8_t read_buf[max_size] = {};
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TEST_ESP_OK(sdmmc_io_read_bytes(card, 1, HOST_SLCHOST_CONF_W0_REG & 0x3FF, read_buf, max_size));
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ESP_LOG_BUFFER_HEX("read_all", read_buf, max_size);
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for (int i = 0; i < max_size; i++) {
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if (i >= 24 && i < 28) {
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continue;
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}
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if (i >= 32 && i < 48) {
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continue;
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}
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if (i == write_addr) {
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TEST_ASSERT_EQUAL_HEX8(buf[test_size - 1], read_buf[i]);
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} else {
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TEST_ASSERT_EQUAL_HEX8(0xcc, read_buf[i]);
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}
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}
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const int read_size = (test_size > max_size ? max_size : test_size);
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memset(read_buf, 0, read_size);
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TEST_ESP_OK(sdmmc_io_read_bytes(card, 1, ((HOST_SLCHOST_CONF_W0_REG + write_addr) & 0x3FF) | SDMMC_IO_FIXED_ADDR, read_buf, read_size));
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ESP_LOG_BUFFER_HEX("read_fixed", read_buf, read_size);
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for (int i = 0; i < read_size; i++) {
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TEST_ASSERT_EQUAL_HEX8(buf[test_size - 1], read_buf[i]);
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}
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s_send_finish_test(handle);
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s_master_deinit();
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}
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/*---------------------------------------------------------------
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Transaction Tests
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---------------------------------------------------------------*/
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@ -241,7 +306,7 @@ static void test_from_host(bool check_data)
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ESP_LOGI(TAG, "host speed: %"PRIu32" kHz", test_param_lists[i].max_freq_khz);
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essl_handle_t handle = NULL;
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s_master_init(&test_param_lists[i], &handle);
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s_master_init(&test_param_lists[i], &handle, NULL);
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// Two counters are used. The `esp_timer_get_time()` is for the typical time, and the
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// `ccomp_timer` is for performance test to reduce influence caused by cache miss.
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@ -298,7 +363,7 @@ static void test_to_host(bool check_data)
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ESP_LOGI(TAG, "host speed: %"PRIu32" kHz", test_param_lists[i].max_freq_khz);
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essl_handle_t handle = NULL;
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s_master_init(&test_param_lists[i], &handle);
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s_master_init(&test_param_lists[i], &handle, NULL);
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esp_err_t ret;
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int offset = 0;
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@ -155,6 +155,24 @@ TEST_CASE("SDIO_Slave: test reset", "[sdio]")
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sdio_slave_deinit();
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}
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/*---------------------------------------------------------------
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SDMMC_SDIO: test fixed addr
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---------------------------------------------------------------*/
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TEST_CASE("SDIO_Slave: test fixed addr", "[sdio]")
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{
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s_slave_init(SDIO_SLAVE_SEND_PACKET);
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TEST_ESP_OK(sdio_slave_start());
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ESP_LOGI(TAG, "slave ready");
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for (int i = 0; i < 64; i++) {
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sdio_slave_write_reg(i, 0xcc);
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}
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wait_for_finish(&s_test_slv_ctx);
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sdio_slave_stop();
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sdio_slave_deinit();
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}
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/*---------------------------------------------------------------
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Transaction Tests
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---------------------------------------------------------------*/
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -14,6 +14,10 @@
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extern "C" {
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#endif
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/** Call `sdmmc_io_read_bytes`, `sdmmc_io_write_bytes`, `sdmmc_io_read_blocks` or `sdmmc_io_write_bocks` APIs with
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* address ORed by this flag to send CMD53 with OP Code clear (fixed address) */
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#define SDMMC_IO_FIXED_ADDR BIT(31)
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/**
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* Probe and initialize SD/MMC card using given host
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*
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@ -196,6 +200,9 @@ esp_err_t sdmmc_io_write_byte(sdmmc_card_t* card, uint32_t function,
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* This function performs read operation using CMD53 in byte mode.
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* For block mode, see sdmmc_io_read_blocks.
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*
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* By default OP Code is set (incrementing address). To send CMD53 without this bit, OR the argument `addr` with
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* `SDMMC_IO_FIXED_ADDR`.
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*
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* @param card pointer to card information structure previously initialized
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* using sdmmc_card_init
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* @param function IO function number
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@ -218,6 +225,9 @@ esp_err_t sdmmc_io_read_bytes(sdmmc_card_t* card, uint32_t function,
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* This function performs write operation using CMD53 in byte mode.
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* For block mode, see sdmmc_io_write_blocks.
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*
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* By default OP Code is set (incrementing address). To send CMD53 without this bit, OR the argument `addr` with
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* `SDMMC_IO_FIXED_ADDR`.
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*
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* @param card pointer to card information structure previously initialized
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* using sdmmc_card_init
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* @param function IO function number
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@ -239,6 +249,9 @@ esp_err_t sdmmc_io_write_bytes(sdmmc_card_t* card, uint32_t function,
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* This function performs read operation using CMD53 in block mode.
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* For byte mode, see sdmmc_io_read_bytes.
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*
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* By default OP Code is set (incrementing address). To send CMD53 without this bit, OR the argument `addr` with
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* `SDMMC_IO_FIXED_ADDR`.
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*
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* @param card pointer to card information structure previously initialized
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* using sdmmc_card_init
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* @param function IO function number
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@ -261,6 +274,9 @@ esp_err_t sdmmc_io_read_blocks(sdmmc_card_t* card, uint32_t function,
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* This function performs write operation using CMD53 in block mode.
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* For byte mode, see sdmmc_io_write_bytes.
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*
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* By default OP Code is set (incrementing address). To send CMD53 without this bit, OR the argument `addr` with
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* `SDMMC_IO_FIXED_ADDR`.
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*
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* @param card pointer to card information structure previously initialized
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* using sdmmc_card_init
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* @param function IO function number
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@ -336,6 +336,17 @@ esp_err_t sdmmc_io_rw_extended(sdmmc_card_t* card, int func,
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esp_err_t sdmmc_io_read_bytes(sdmmc_card_t* card, uint32_t function,
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uint32_t addr, void* dst, size_t size)
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{
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uint32_t arg = SD_ARG_CMD53_READ;
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bool incr_addr = true;
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//Extract and unset the bit used to indicate the OP Code
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if (addr & SDMMC_IO_FIXED_ADDR) {
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addr &= ~SDMMC_IO_FIXED_ADDR;
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incr_addr = false;
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}
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if (incr_addr) {
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arg |= SD_ARG_CMD53_INCREMENT;
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}
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/* host quirk: SDIO transfer with length not divisible by 4 bytes
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* has to be split into two transfers: one with aligned length,
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* the other one for the remaining 1-3 bytes.
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@ -347,15 +358,15 @@ esp_err_t sdmmc_io_read_bytes(sdmmc_card_t* card, uint32_t function,
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// Note: sdmmc_io_rw_extended has an internal timeout,
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// typically SDMMC_DEFAULT_CMD_TIMEOUT_MS
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esp_err_t err = sdmmc_io_rw_extended(card, function, addr,
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SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT,
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pc_dst, will_transfer);
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esp_err_t err = sdmmc_io_rw_extended(card, function, addr, arg, pc_dst, will_transfer);
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if (unlikely(err != ESP_OK)) {
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return err;
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}
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pc_dst += will_transfer;
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size -= will_transfer;
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addr += will_transfer;
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if (incr_addr) {
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addr += will_transfer;
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}
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}
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return ESP_OK;
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}
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@ -363,24 +374,34 @@ esp_err_t sdmmc_io_read_bytes(sdmmc_card_t* card, uint32_t function,
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esp_err_t sdmmc_io_write_bytes(sdmmc_card_t* card, uint32_t function,
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uint32_t addr, const void* src, size_t size)
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{
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uint32_t arg = SD_ARG_CMD53_WRITE;
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bool incr_addr = true;
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//Extract and unset the bit used to indicate the OP Code
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if (addr & SDMMC_IO_FIXED_ADDR) {
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addr &= ~SDMMC_IO_FIXED_ADDR;
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incr_addr = false;
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}
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if (incr_addr) {
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arg |= SD_ARG_CMD53_INCREMENT;
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}
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/* same host quirk as in sdmmc_io_read_bytes */
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const uint8_t *pc_src = (const uint8_t*) src;
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while (size > 0) {
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size_t size_aligned = size & (~3);
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size_t will_transfer = size_aligned > 0 ? size_aligned : size;
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// Note: sdmmc_io_rw_extended has an internal timeout,
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// typically SDMMC_DEFAULT_CMD_TIMEOUT_MS
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esp_err_t err = sdmmc_io_rw_extended(card, function, addr,
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SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT,
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(void*) pc_src, will_transfer);
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esp_err_t err = sdmmc_io_rw_extended(card, function, addr, arg, (void*) pc_src, will_transfer);
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if (unlikely(err != ESP_OK)) {
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return err;
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}
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pc_src += will_transfer;
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size -= will_transfer;
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addr += will_transfer;
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if (incr_addr) {
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addr += will_transfer;
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}
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}
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return ESP_OK;
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}
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@ -388,27 +409,37 @@ esp_err_t sdmmc_io_write_bytes(sdmmc_card_t* card, uint32_t function,
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esp_err_t sdmmc_io_read_blocks(sdmmc_card_t* card, uint32_t function,
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uint32_t addr, void* dst, size_t size)
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{
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uint32_t arg = SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT | SD_ARG_CMD53_BLOCK_MODE;
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//Extract and unset the bit used to indicate the OP Code (inverted logic)
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if (addr & SDMMC_IO_FIXED_ADDR) {
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arg &= ~SD_ARG_CMD53_INCREMENT;
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addr &= ~SDMMC_IO_FIXED_ADDR;
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}
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esp_dma_mem_info_t dma_mem_info;
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card->host.get_dma_info(card->host.slot, &dma_mem_info);
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if (unlikely(!esp_dma_is_buffer_alignment_satisfied(dst, size, dma_mem_info))) {
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return ESP_ERR_INVALID_ARG;
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}
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return sdmmc_io_rw_extended(card, function, addr,
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SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT | SD_ARG_CMD53_BLOCK_MODE,
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dst, size);
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return sdmmc_io_rw_extended(card, function, addr, arg, dst, size);
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}
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esp_err_t sdmmc_io_write_blocks(sdmmc_card_t* card, uint32_t function,
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uint32_t addr, const void* src, size_t size)
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{
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uint32_t arg = SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT | SD_ARG_CMD53_BLOCK_MODE;
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//Extract and unset the bit used to indicate the OP Code (inverted logic)
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if (addr & SDMMC_IO_FIXED_ADDR) {
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arg &= ~SD_ARG_CMD53_INCREMENT;
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addr &= ~SDMMC_IO_FIXED_ADDR;
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}
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esp_dma_mem_info_t dma_mem_info;
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card->host.get_dma_info(card->host.slot, &dma_mem_info);
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if (unlikely(!esp_dma_is_buffer_alignment_satisfied(src, size, dma_mem_info))) {
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return ESP_ERR_INVALID_ARG;
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}
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return sdmmc_io_rw_extended(card, function, addr,
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SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT | SD_ARG_CMD53_BLOCK_MODE,
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(void*) src, size);
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return sdmmc_io_rw_extended(card, function, addr, arg, (void*) src, size);
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}
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esp_err_t sdmmc_io_enable_int(sdmmc_card_t* card)
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