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https://github.com/espressif/esp-idf.git
synced 2024-09-19 14:26:01 -04:00
fix(wifi): fix code review comments
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9783bddde1
commit
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@ -25,7 +25,9 @@
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#include "esp_task.h"
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#include "esp_intr_alloc.h"
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#include "esp_attr.h"
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#ifdef CONFIG_ESP_PHY_ENABLED
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#include "esp_phy_init.h"
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#endif
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#include "esp_bt.h"
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#include "esp_err.h"
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#include "esp_log.h"
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@ -23,7 +23,7 @@
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#include "esp_log.h"
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#endif
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#if CONFIG_SW_COEXIST_ENABLE
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#ifdef CONFIG_ESP_COEX_ENABLED
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#include "private/esp_coexist_internal.h"
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#endif
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@ -35,7 +35,9 @@
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#include "esp_intr_alloc.h"
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#include "esp_sleep.h"
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#include "esp_pm.h"
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#ifdef CONFIG_ESP_PHY_ENABLED
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#include "esp_phy_init.h"
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#endif
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#include "soc/syscon_reg.h"
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#include "soc/modem_clkrst_reg.h"
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#include "esp_private/periph_ctrl.h"
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@ -22,8 +22,10 @@
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#include "esp_random.h"
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#include "esp_task.h"
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#include "esp_attr.h"
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#ifdef CONFIG_ESP_PHY_ENABLED
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#include "esp_phy_init.h"
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#include "esp_private/phy.h"
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#endif
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#include "esp_bt.h"
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#include "esp_err.h"
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#include "esp_log.h"
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@ -23,9 +23,9 @@
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#include "esp_log.h"
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#endif // ESP_PLATFORM
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#if CONFIG_SW_COEXIST_ENABLE
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#ifdef CONFIG_ESP_COEX_ENABLED
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#include "private/esp_coexist_internal.h"
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#endif // CONFIG_SW_COEXIST_ENABLE
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#endif // CONFIG_ESP_COEX_ENABLED
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#include "nimble/nimble_npl_os.h"
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#include "nimble/ble_hci_trans.h"
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@ -35,7 +35,9 @@
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#include "esp_intr_alloc.h"
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#include "esp_sleep.h"
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#include "esp_pm.h"
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#ifdef CONFIG_ESP_PHY_ENABLED
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#include "esp_phy_init.h"
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#endif
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#include "esp_private/periph_ctrl.h"
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#include "hci_uart.h"
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#include "bt_osi_mem.h"
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@ -23,9 +23,9 @@
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#include "esp_log.h"
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#endif // ESP_PLATFORM
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#if CONFIG_SW_COEXIST_ENABLE
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#ifdef CONFIG_ESP_COEX_ENABLED
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#include "private/esp_coexist_internal.h"
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#endif // CONFIG_SW_COEXIST_ENABLE
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#endif // CONFIG_ESP_COEX_ENABLED
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#include "nimble/nimble_npl_os.h"
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#include "nimble/ble_hci_trans.h"
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@ -76,9 +76,6 @@ if(CONFIG_ESP_PHY_ENABLED)
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target_link_libraries(${COMPONENT_LIB} PUBLIC rtc)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a librtc.a
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$<TARGET_FILE:${esp_phy_lib}>)
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elseif(CONFIG_IDF_TARGET_ESP32S2)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a
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$<TARGET_FILE:${esp_phy_lib}>)
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elseif(CONFIG_SOC_BT_SUPPORTED OR CONFIG_SOC_IEEE802154_SUPPORTED)
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target_link_libraries(${COMPONENT_LIB} PUBLIC btbb)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a
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@ -608,7 +608,7 @@ esp_err_t esp_wifi_get_ps(wifi_ps_type_t *type);
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* if CONFIG_SOC_WIFI_HE_SUPPORT and band is 5G, the default protocol is (WIFI_PROTOCOL_11A|WIFI_PROTOCOL_11N|WIFI_PROTOCOL_11AC|WIFI_PROTOCOL_11AX).
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*
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* @attention 2.4G: Support 802.11b or 802.11bg or 802.11bgn or 802.11bgnax or LR mode
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* 5G: Support 802.11a or 802.11an or 802.11anac or 802.11anacax or LR mode
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* 5G: Support 802.11a or 802.11an or 802.11anac or 802.11anacax
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*
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* @param ifx interfaces
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* @param protocol_bitmap WiFi protocol bitmap
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@ -281,13 +281,13 @@ typedef enum {
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#define WIFI_PROTOCOL_11AX 0x40
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typedef enum {
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WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */
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WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */
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WIFI_BW20 = WIFI_BW_HT20, /* Bandwidth is 20 MHz */
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WIFI_BW_HT40, /* Bandwidth is HT40 */
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WIFI_BW_HT40 = 2, /* Bandwidth is HT40 */
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WIFI_BW40 = WIFI_BW_HT40, /* Bandwidth is 40 MHz */
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WIFI_BW80, /* Bandwidth is 80 MHz */
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WIFI_BW160, /* Bandwidth is 160 MHz */
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WIFI_BW80_BW80, /* Bandwidth is 80+80 MHz */
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WIFI_BW80 = 3, /* Bandwidth is 80 MHz */
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WIFI_BW160 = 4, /* Bandwidth is 160 MHz */
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WIFI_BW80_BW80 = 5, /* Bandwidth is 80+80 MHz */
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} wifi_bandwidth_t;
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/** Configuration structure for Protected Management Frame */
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@ -127,6 +127,7 @@ typedef struct wifi_csi_info_t {
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uint8_t *hdr; /**< header of the wifi packet */
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uint8_t *payload; /**< payload of the wifi packet */
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uint16_t payload_len; /**< payload len of the wifi packet */
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uint16_t rx_seq; /**< rx sequence number of the wifi packet */
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} wifi_csi_info_t;
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#ifdef __cplusplus
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@ -1 +1 @@
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Subproject commit 1c9b6ea78fb9d4e47825808719543f101935bcc0
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Subproject commit a5af5288b1c45bd386e0772ce8b3029876f65841
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@ -123,10 +123,6 @@ config SOC_BT_SUPPORTED
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bool
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default y
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config SOC_PHY_SUPPORTED
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bool
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default y
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config SOC_XTAL_SUPPORT_40M
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bool
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default y
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@ -671,6 +667,38 @@ config SOC_RCC_IS_INDEPENDENT
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bool
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default y
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config SOC_WIFI_HW_TSF
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bool
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default y
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config SOC_WIFI_FTM_SUPPORT
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bool
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default n
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config SOC_WIFI_GCMP_SUPPORT
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bool
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default y
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config SOC_WIFI_WAPI_SUPPORT
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bool
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default y
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config SOC_WIFI_CSI_SUPPORT
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bool
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default y
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config SOC_WIFI_MESH_SUPPORT
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bool
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default y
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config SOC_WIFI_HE_SUPPORT
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bool
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default y
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config SOC_WIFI_HE_SUPPORT_5G
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bool
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default y
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config SOC_BLE_SUPPORTED
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bool
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default y
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@ -706,35 +734,3 @@ config SOC_BLUFI_SUPPORTED
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config SOC_BLE_MULTI_CONN_OPTIMIZATION
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bool
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default y
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config SOC_WIFI_HW_TSF
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bool
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default y
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config SOC_WIFI_FTM_SUPPORT
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bool
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default n
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config SOC_WIFI_GCMP_SUPPORT
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bool
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default y
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config SOC_WIFI_WAPI_SUPPORT
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bool
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default y
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config SOC_WIFI_CSI_SUPPORT
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bool
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default y
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config SOC_WIFI_MESH_SUPPORT
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bool
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default y
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config SOC_WIFI_HE_SUPPORT
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bool
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default y
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config SOC_WIFI_HE_SUPPORT_5G
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bool
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default y
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@ -2,4 +2,6 @@ idf_component_register(SRCS "cmd_system.c" "cmd_system_common.c"
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INCLUDE_DIRS .
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REQUIRES console spi_flash driver esp_driver_gpio)
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target_sources(${COMPONENT_LIB} PRIVATE cmd_system_sleep.c)
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if(CONFIG_SOC_DEEP_SLEEP_SUPPORTED OR CONFIG_SOC_LIGHT_SLEEP_SUPPORTED)
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target_sources(${COMPONENT_LIB} PRIVATE cmd_system_sleep.c)
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endif()
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@ -29,8 +29,8 @@
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static const char *TAG = "cmd_system_sleep";
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#if SOC_DEEP_SLEEP_SUPPORTED
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/** 'deep_sleep' command puts the chip into deep sleep mode */
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static struct {
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struct arg_int *wakeup_time;
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#if SOC_PM_SUPPORT_EXT0_WAKEUP || SOC_PM_SUPPORT_EXT1_WAKEUP
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@ -51,9 +51,7 @@ static int deep_sleep(int argc, char **argv)
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if (deep_sleep_args.wakeup_time->count) {
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uint64_t timeout = 1000ULL * deep_sleep_args.wakeup_time->ival[0];
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ESP_LOGI(TAG, "Enabling timer wakeup, timeout=%lluus", timeout);
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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ESP_ERROR_CHECK( esp_sleep_enable_timer_wakeup(timeout) );
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#endif
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}
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#if SOC_PM_SUPPORT_EXT1_WAKEUP
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@ -82,9 +80,7 @@ static int deep_sleep(int argc, char **argv)
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#if CONFIG_IDF_TARGET_ESP32
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rtc_gpio_isolate(GPIO_NUM_12);
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#endif //CONFIG_IDF_TARGET_ESP32
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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esp_deep_sleep_start();
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#endif
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return 1;
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}
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@ -118,9 +114,10 @@ void register_system_deep_sleep(void)
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};
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ESP_ERROR_CHECK( esp_console_cmd_register(&cmd) );
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}
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#endif // SOC_DEEP_SLEEP_SUPPORTED
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#if SOC_LIGHT_SLEEP_SUPPORTED
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/** 'light_sleep' command puts the chip into light sleep mode */
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static struct {
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struct arg_int *wakeup_time;
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struct arg_int *wakeup_gpio_num;
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@ -135,15 +132,11 @@ static int light_sleep(int argc, char **argv)
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arg_print_errors(stderr, light_sleep_args.end, argv[0]);
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return 1;
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}
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL);
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#endif
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if (light_sleep_args.wakeup_time->count) {
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uint64_t timeout = 1000ULL * light_sleep_args.wakeup_time->ival[0];
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ESP_LOGI(TAG, "Enabling timer wakeup, timeout=%lluus", timeout);
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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ESP_ERROR_CHECK( esp_sleep_enable_timer_wakeup(timeout) );
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#endif
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}
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int io_count = light_sleep_args.wakeup_gpio_num->count;
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if (io_count != light_sleep_args.wakeup_gpio_level->count) {
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@ -163,25 +156,17 @@ static int light_sleep(int argc, char **argv)
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ESP_ERROR_CHECK( gpio_wakeup_enable(io_num, level ? GPIO_INTR_HIGH_LEVEL : GPIO_INTR_LOW_LEVEL) );
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}
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if (io_count > 0) {
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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ESP_ERROR_CHECK( esp_sleep_enable_gpio_wakeup() );
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#endif
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}
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if (CONFIG_ESP_CONSOLE_UART_NUM >= 0 && CONFIG_ESP_CONSOLE_UART_NUM <= UART_NUM_1) {
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ESP_LOGI(TAG, "Enabling UART wakeup (press ENTER to exit light sleep)");
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ESP_ERROR_CHECK( uart_set_wakeup_threshold(CONFIG_ESP_CONSOLE_UART_NUM, 3) );
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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ESP_ERROR_CHECK( esp_sleep_enable_uart_wakeup(CONFIG_ESP_CONSOLE_UART_NUM) );
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#endif
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}
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fflush(stdout);
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fsync(fileno(stdout));
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#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
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esp_light_sleep_start();
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esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
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#else
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esp_sleep_wakeup_cause_t cause = ESP_SLEEP_WAKEUP_TIMER;
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#endif
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const char *cause_str;
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switch (cause) {
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@ -226,3 +211,4 @@ void register_system_light_sleep(void)
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};
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ESP_ERROR_CHECK( esp_console_cmd_register(&cmd) );
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}
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#endif // SOC_LIGHT_SLEEP_SUPPORTED
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@ -4,6 +4,6 @@ dependencies:
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espressif/iperf-cmd:
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version: "~0.1.1"
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esp-qa/wifi-cmd:
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version: "~0.0.3"
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version: "~0.1.0"
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esp-qa/ping-cmd:
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version: "~0.0.1"
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@ -28,9 +28,9 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
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#
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# Wi-Fi
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#
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CONFIG_ESP_WIFI_ENABLE_WIFI_TX_STATS=y
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CONFIG_ESP_WIFI_ENABLE_WIFI_RX_STATS=y
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CONFIG_ESP_WIFI_ENABLE_WIFI_RX_MU_STATS=y
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CONFIG_ESP_WIFI_ENABLE_WIFI_TX_STATS=n
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CONFIG_ESP_WIFI_ENABLE_WIFI_RX_STATS=n
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CONFIG_ESP_WIFI_ENABLE_WIFI_RX_MU_STATS=n
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CONFIG_ESP_WIFI_ENABLE_DUMP_HESIGB=n
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CONFIG_ESP_WIFI_ENABLE_DUMP_MU_CFO=n
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CONFIG_ESP_WIFI_ENABLE_DUMP_CTRL_NDPA=n
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@ -40,3 +40,5 @@ CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION=y
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CONFIG_LWIP_TCPIP_CORE_LOCKING=y
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CONFIG_LWIP_TCPIP_CORE_LOCKING_INPUT=y
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CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION=y
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