feat(spi_master): p4 enable test and examples

This commit is contained in:
wanlei 2023-08-31 19:16:48 +08:00
parent 00fcdce725
commit eb75aa462e
20 changed files with 128 additions and 181 deletions

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@ -146,10 +146,21 @@ components/driver/test_apps/spi/master:
components/driver/test_apps/spi/param: components/driver/test_apps/spi/param:
disable: disable:
- if: SOC_GPSPI_SUPPORTED != 1 - if: SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: target(s) is not supported yet # TODO: IDF-7503
components/driver/test_apps/spi/slave: components/driver/test_apps/spi/slave:
disable: disable:
- if: SOC_GPSPI_SUPPORTED != 1 - if: SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: target(s) is not supported yet # TODO: IDF-7503 slave support
components/driver/test_apps/spi/slave_hd:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
- if: SOC_SPI_SUPPORT_SLAVE_HD_VER2 != 1
components/driver/test_apps/temperature_sensor: components/driver/test_apps/temperature_sensor:
disable: disable:

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@ -76,7 +76,7 @@
#define ESP_SPI_SLAVE_TV (12.5*3.5) #define ESP_SPI_SLAVE_TV (12.5*3.5)
#define WIRE_DELAY 12.5 #define WIRE_DELAY 12.5
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
#define SLAVE_IOMUX_PIN_MISO -1 #define SLAVE_IOMUX_PIN_MISO -1
#define SLAVE_IOMUX_PIN_MOSI -1 #define SLAVE_IOMUX_PIN_MOSI -1
#define SLAVE_IOMUX_PIN_SCLK -1 #define SLAVE_IOMUX_PIN_SCLK -1

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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -11,23 +11,15 @@
// iterator to load partition tables in `test spi bus lock, with flash` will lead memory not free // iterator to load partition tables in `test spi bus lock, with flash` will lead memory not free
#define TEST_MEMORY_LEAK_THRESHOLD (350) #define TEST_MEMORY_LEAK_THRESHOLD (350)
static size_t before_free_8bit;
static size_t before_free_32bit;
void setUp(void) void setUp(void)
{ {
before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); unity_utils_record_free_mem();
before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
} }
void tearDown(void) void tearDown(void)
{ {
esp_reent_cleanup(); //clean up some of the newlib's lazy allocations esp_reent_cleanup(); //clean up some of the newlib's lazy allocations
size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); unity_utils_evaluate_leaks_direct(TEST_MEMORY_LEAK_THRESHOLD);
size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
printf("\n");
unity_utils_check_leak(before_free_8bit, after_free_8bit, "8BIT", TEST_MEMORY_LEAK_THRESHOLD);
unity_utils_check_leak(before_free_32bit, after_free_32bit, "32BIT", TEST_MEMORY_LEAK_THRESHOLD);
} }
void app_main(void) void app_main(void)

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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -287,8 +287,8 @@ TEST_CASE("SPI Master test", "[spi]")
success &= spi_test(handle, 4096 - 2); //multiple descs, edge case 1 success &= spi_test(handle, 4096 - 2); //multiple descs, edge case 1
success &= spi_test(handle, 4096 - 1); //multiple descs, edge case 2 success &= spi_test(handle, 4096 - 1); //multiple descs, edge case 2
success &= spi_test(handle, 4096 * 3); //multiple descs success &= spi_test(handle, 4096 * 3); //multiple descs
master_free_device_bus(handle); master_free_device_bus(handle);
TEST_ASSERT(success);
printf("Testing bus at 80KHz, non-DMA\n"); printf("Testing bus at 80KHz, non-DMA\n");
handle = setup_spi_bus_loopback(80000, false); handle = setup_spi_bus_loopback(80000, false);
@ -299,19 +299,18 @@ TEST_CASE("SPI Master test", "[spi]")
success &= spi_test(handle, 47); //small, unaligned success &= spi_test(handle, 47); //small, unaligned
success &= spi_test(handle, 63); //small success &= spi_test(handle, 63); //small
success &= spi_test(handle, 64); //small, unaligned success &= spi_test(handle, 64); //small, unaligned
master_free_device_bus(handle); master_free_device_bus(handle);
TEST_ASSERT(success);
printf("Testing bus at 26MHz\n"); printf("Testing bus at 20MHz\n");
handle = setup_spi_bus_loopback(20000000, true); handle = setup_spi_bus_loopback(20000000, true);
success &= spi_test(handle, 128); //DMA, aligned success &= spi_test(handle, 128); //DMA, aligned
success &= spi_test(handle, 4096 * 3); //DMA, multiple descs success &= spi_test(handle, 4096 * 3); //DMA, multiple descs
master_free_device_bus(handle); master_free_device_bus(handle);
TEST_ASSERT(success);
printf("Testing bus at 900KHz\n"); printf("Testing bus at 900KHz\n");
handle = setup_spi_bus_loopback(9000000, true); handle = setup_spi_bus_loopback(9000000, true);
success &= spi_test(handle, 128); //DMA, aligned success &= spi_test(handle, 128); //DMA, aligned
success &= spi_test(handle, 4096 * 3); //DMA, multiple descs success &= spi_test(handle, 4096 * 3); //DMA, multiple descs
master_free_device_bus(handle); master_free_device_bus(handle);
@ -790,11 +789,8 @@ TEST_CASE("SPI Master DMA test: length, start, not aligned", "[spi]")
//connect MOSI to two devices breaks the output, fix it. //connect MOSI to two devices breaks the output, fix it.
spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out); spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
memset(rx_buf, 0x66, 320);
for ( int i = 0; i < 8; i ++ ) { for ( int i = 0; i < 8; i ++ ) {
memset( rx_buf, 0x66, sizeof(rx_buf)); memset( rx_buf, 0x66, sizeof(rx_buf));
spi_transaction_t t = {}; spi_transaction_t t = {};
t.length = 8 * (i + 1); t.length = 8 * (i + 1);
t.rxlength = 0; t.rxlength = 0;
@ -881,12 +877,12 @@ void test_cmd_addr(spi_slave_task_context_t *slave_context, bool lsb_first)
vTaskDelay(50); vTaskDelay(50);
//prepare master tx data //prepare master tx data
int cmd_bits = (i + 1) * 2; int cmd_bits = (i + 1) * 2;
int addr_bits = int addr_bits = 0;
#ifdef CONFIG_IDF_TARGET_ESP32 #ifdef CONFIG_IDF_TARGET_ESP32
56 - 8 * i; addr_bits = 56 - 8 * i;
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
//ESP32S2 only supportes up to 32 bits address //ESP32S2 only supportes up to 32 bits address
28 - 4 * i; addr_bits = 28 - 4 * i;
#endif #endif
int round_up = (cmd_bits + addr_bits + 7) / 8 * 8; int round_up = (cmd_bits + addr_bits + 7) / 8 * 8;
addr_bits = round_up - cmd_bits; addr_bits = round_up - cmd_bits;
@ -1073,6 +1069,7 @@ TEST_CASE("SPI master variable dummy test", "[spi]")
master_free_device_bus(spi); master_free_device_bus(spi);
} }
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) //IDF-7503 slave support
/** /**
* This test is to check when the first transaction of the HD master is to send data without receiving data via DMA, * This test is to check when the first transaction of the HD master is to send data without receiving data via DMA,
* then if the master could receive data correctly. * then if the master could receive data correctly.
@ -1161,8 +1158,10 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
spi_slave_free(TEST_SLAVE_HOST); spi_slave_free(TEST_SLAVE_HOST);
master_free_device_bus(spi); master_free_device_bus(spi);
} }
#endif
#endif //#if (TEST_SPI_PERIPH_NUM >= 2) #endif //#if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) //IDF-7503 slave support
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494
#define FD_TEST_BUF_SIZE 32 #define FD_TEST_BUF_SIZE 32
#define TEST_NUM 4 #define TEST_NUM 4
@ -1338,6 +1337,7 @@ static void fd_slave(void)
TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test", "[spi_ms][test_env=generic_multi_device]", fd_master, fd_slave); TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test", "[spi_ms][test_env=generic_multi_device]", fd_master, fd_slave);
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494 #endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494
#endif //p4 slave support
//NOTE: Explained in IDF-1445 | MR !14996 //NOTE: Explained in IDF-1445 | MR !14996
@ -1491,6 +1491,7 @@ TEST_CASE("spi_speed", "[spi]")
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE #endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) //IDF-7503 slave support
//****************************************spi master add device test************************************// //****************************************spi master add device test************************************//
//add dummy devices first //add dummy devices first
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
@ -1601,7 +1602,7 @@ void test_add_device_slave(void)
} }
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test multiple devices", "[spi_ms]", test_add_device_master, test_add_device_slave); TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test multiple devices", "[spi_ms]", test_add_device_master, test_add_device_slave);
#endif //p4 slave support
#if (SOC_CPU_CORES_NUM > 1) && (!CONFIG_FREERTOS_UNICORE) #if (SOC_CPU_CORES_NUM > 1) && (!CONFIG_FREERTOS_UNICORE)
@ -1661,8 +1662,8 @@ TEST_CASE("test_master_isr_pin_to_core","[spi]")
} }
#endif #endif
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) //IDF-7503 slave support
#if CONFIG_SPI_MASTER_IN_IRAM #if CONFIG_SPI_MASTER_IN_IRAM
#define TEST_MASTER_IRAM_TRANS_LEN 120 #define TEST_MASTER_IRAM_TRANS_LEN 120
static IRAM_ATTR void test_master_iram_post_trans_cbk(spi_transaction_t *trans) static IRAM_ATTR void test_master_iram_post_trans_cbk(spi_transaction_t *trans)
{ {
@ -1767,3 +1768,4 @@ static void test_iram_slave_normal(void)
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:IRAM_safe", "[spi_ms]", test_master_iram, test_iram_slave_normal); TEST_CASE_MULTIPLE_DEVICES("SPI_Master:IRAM_safe", "[spi_ms]", test_master_iram, test_iram_slave_normal);
#endif #endif
#endif //p4 slave support

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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -37,6 +37,8 @@
********************************************************************************/ ********************************************************************************/
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
#define MASTER_DIN_SIGNAL HSPID_IN_IDX #define MASTER_DIN_SIGNAL HSPID_IN_IDX
#elif CONFIG_IDF_TARGET_ESP32P4
#define MASTER_DIN_SIGNAL SPI2_D_PAD_IN_IDX
#else #else
#define MASTER_DIN_SIGNAL FSPID_IN_IDX #define MASTER_DIN_SIGNAL FSPID_IN_IDX
#endif #endif
@ -142,7 +144,7 @@ TEST_CASE("SPI Single Board Test SIO", "[spi]")
} }
#endif //#if (TEST_SPI_PERIPH_NUM >= 2) #endif //#if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) //IDF-7503 slave support
/******************************************************************************** /********************************************************************************
* Test SIO Master * Test SIO Master
* SIO Slave is not suported, and one unit test is limited to one feature, so,,, * SIO Slave is not suported, and one unit test is limited to one feature, so,,,
@ -326,3 +328,4 @@ void test_slave_run(void)
} }
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test_SIO_Mode_Multi_Board", "[spi_ms][test_env=generic_multi_device]", test_master_run, test_slave_run); TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test_SIO_Mode_Multi_Board", "[spi_ms][test_env=generic_multi_device]", test_master_run, test_slave_run);
#endif //p4 slave support

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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -5,7 +5,11 @@ import pytest
# If `test_env` is define, should not run on generic runner # If `test_env` is define, should not run on generic runner
@pytest.mark.supported_targets @pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c2
@pytest.mark.esp32c3
@pytest.mark.esp32c6
@pytest.mark.esp32h2 @pytest.mark.esp32h2
@pytest.mark.generic @pytest.mark.generic
def test_slave_hd_single_dev(case_tester) -> None: # type: ignore def test_slave_hd_single_dev(case_tester) -> None: # type: ignore
@ -16,7 +20,11 @@ def test_slave_hd_single_dev(case_tester) -> None: # type: ignore
# if `test_env` not defined, will run on `generic_multi_device` by default # if `test_env` not defined, will run on `generic_multi_device` by default
@pytest.mark.supported_targets @pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c2
@pytest.mark.esp32c3
@pytest.mark.esp32c6
@pytest.mark.esp32h2 @pytest.mark.esp32h2
@pytest.mark.generic_multi_device @pytest.mark.generic_multi_device
@pytest.mark.parametrize('count', [2,], indirect=True) @pytest.mark.parametrize('count', [2,], indirect=True)

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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -127,7 +127,11 @@ void static test_isr(void*arg)
TEST_CASE("Allocate previously freed interrupt, with different flags", "[intr_alloc]") TEST_CASE("Allocate previously freed interrupt, with different flags", "[intr_alloc]")
{ {
intr_handle_t intr; intr_handle_t intr;
#if CONFIG_IDF_TARGET_ESP32P4
int test_intr_source = ETS_GPIO_INTR0_SOURCE;
#else
int test_intr_source = ETS_GPIO_INTR_SOURCE; int test_intr_source = ETS_GPIO_INTR_SOURCE;
#endif
int isr_flags = ESP_INTR_FLAG_LEVEL2; int isr_flags = ESP_INTR_FLAG_LEVEL2;
TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr)); TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
@ -179,7 +183,15 @@ TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[in
intr_handle_t handle1, handle2; intr_handle_t handle1, handle2;
// enable SPI2 // enable SPI2
#if CONFIG_IDF_TARGET_ESP32P4 //deprecate clk_gate_ll start from p4, others in TODO: IDF-8159
PERIPH_RCC_ATOMIC() {
spi_ll_enable_bus_clock(1, true);
spi_ll_reset_register(1);
spi_ll_enable_clock(1, true);
}
#else
periph_module_enable(spi_periph_signal[1].module); periph_module_enable(spi_periph_signal[1].module);
#endif
esp_err_t r; esp_err_t r;
r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1); r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);

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@ -1,4 +1,4 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
This test app is used to test LCDs with SPI interface. This test app is used to test LCDs with SPI interface.

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@ -15,7 +15,6 @@
#include "esp_lcd_panel_vendor.h" #include "esp_lcd_panel_vendor.h"
#include "esp_lcd_panel_ops.h" #include "esp_lcd_panel_ops.h"
#include "esp_lcd_panel_commands.h" #include "esp_lcd_panel_commands.h"
#include "esp_random.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "test_spi_board.h" #include "test_spi_board.h"
@ -92,9 +91,9 @@ static void lcd_panel_test(esp_lcd_panel_io_handle_t io_handle, esp_lcd_panel_ha
gpio_set_level(TEST_LCD_BK_LIGHT_GPIO, 1); gpio_set_level(TEST_LCD_BK_LIGHT_GPIO, 1);
for (int i = 0; i < 200; i++) { for (int i = 0; i < 200; i++) {
uint8_t color_byte = esp_random() & 0xFF; uint8_t color_byte = rand() & 0xFF;
int x_start = esp_random() % (TEST_LCD_H_RES - 200); int x_start = rand() % (TEST_LCD_H_RES - 200);
int y_start = esp_random() % (TEST_LCD_V_RES - 200); int y_start = rand() % (TEST_LCD_V_RES - 200);
memset(img, color_byte, TEST_IMG_SIZE); memset(img, color_byte, TEST_IMG_SIZE);
esp_lcd_panel_draw_bitmap(panel_handle, x_start, y_start, x_start + 200, y_start + 200, img); esp_lcd_panel_draw_bitmap(panel_handle, x_start, y_start, x_start + 200, y_start + 200, img);
} }
@ -202,7 +201,7 @@ TEST_CASE("spi_lcd_send_colors_to_fixed_region", "[lcd]")
size_t color_size = (x_end - x_start) * (y_end - y_start) * 2; size_t color_size = (x_end - x_start) * (y_end - y_start) * 2;
void *color_data = malloc(color_size); void *color_data = malloc(color_size);
TEST_ASSERT_NOT_NULL(color_data); TEST_ASSERT_NOT_NULL(color_data);
uint8_t color_byte = esp_random() & 0xFF; uint8_t color_byte = rand() & 0xFF;
memset(color_data, color_byte, color_size); memset(color_data, color_byte, color_size);
esp_lcd_panel_io_handle_t io_handle = NULL; esp_lcd_panel_io_handle_t io_handle = NULL;
@ -249,7 +248,7 @@ TEST_CASE("spi_lcd_send_colors_to_fixed_region", "[lcd]")
} }
vTaskDelay(pdMS_TO_TICKS(1000)); vTaskDelay(pdMS_TO_TICKS(1000));
// change to another color // change to another color
color_byte = esp_random() & 0xFF; color_byte = rand() & 0xFF;
memset(color_data, color_byte, color_size); memset(color_data, color_byte, color_size);
for (int i = 0; i < steps; i++) { for (int i = 0; i < steps; i++) {
TEST_ESP_OK(esp_lcd_panel_io_tx_color(io_handle, -1, color_data + i * color_size_per_step, color_size_per_step)); TEST_ESP_OK(esp_lcd_panel_io_tx_color(io_handle, -1, color_data + i * color_size_per_step, color_size_per_step));

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@ -232,13 +232,12 @@ examples/peripherals/spi_master/lcd:
disable: disable:
- if: SOC_GPSPI_SUPPORTED != 1 - if: SOC_GPSPI_SUPPORTED != 1
examples/peripherals/spi_slave/receiver: examples/peripherals/spi_slave:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
examples/peripherals/spi_slave/sender:
disable: disable:
- if: SOC_GPSPI_SUPPORTED != 1 - if: SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: target(s) is not supported yet # TODO: IDF-7503 slave support
examples/peripherals/spi_slave_hd/append_mode/master: examples/peripherals/spi_slave_hd/append_mode/master:
disable: disable:
@ -255,10 +254,16 @@ examples/peripherals/spi_slave_hd/append_mode/slave:
examples/peripherals/spi_slave_hd/segment_mode/seg_master: examples/peripherals/spi_slave_hd/segment_mode/seg_master:
disable: disable:
- if: SOC_GPSPI_SUPPORTED != 1 - if: SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: target(s) is not supported yet # TODO: IDF-7505 slave hd support
examples/peripherals/spi_slave_hd/segment_mode/seg_slave: examples/peripherals/spi_slave_hd/segment_mode/seg_slave:
disable: disable:
- if: IDF_TARGET == "esp32" or SOC_GPSPI_SUPPORTED != 1 - if: IDF_TARGET == "esp32" or SOC_GPSPI_SUPPORTED != 1
- if: IDF_TARGET in ["esp32p4"]
temporary: true
reason: target(s) is not supported yet # TODO: IDF-7505 slave hd support
examples/peripherals/temperature_sensor/temp_sensor: examples/peripherals/temperature_sensor/temp_sensor:
disable: disable:

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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# SPI LCD and Touch Panel Example # SPI LCD and Touch Panel Example

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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
## LCD tjpgd example ## LCD tjpgd example

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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
## SPI master half duplex EEPROM example ## SPI master half duplex EEPROM example

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@ -22,51 +22,29 @@
This code demonstrates how to use the SPI master half duplex mode to read/write a AT932C46D EEPROM (8-bit mode). This code demonstrates how to use the SPI master half duplex mode to read/write a AT932C46D EEPROM (8-bit mode).
*/ */
#ifdef CONFIG_IDF_TARGET_ESP32 //////////////////////////////////////////////////////////////////////////////////////////////////////////
# ifdef CONFIG_EXAMPLE_USE_SPI1_PINS ////////////// Please update the following configuration according to your HardWare spec /////////////////
# define EEPROM_HOST SPI1_HOST //////////////////////////////////////////////////////////////////////////////////////////////////////////
#if CONFIG_IDF_TARGET_ESP32
# if CONFIG_EXAMPLE_USE_SPI1_PINS
# define EEPROM_HOST SPI1_HOST
// Use default pins, same as the flash chip. // Use default pins, same as the flash chip.
# define PIN_NUM_MISO 7 # define PIN_NUM_MISO 7
# define PIN_NUM_MOSI 8 # define PIN_NUM_MOSI 8
# define PIN_NUM_CLK 6 # define PIN_NUM_CLK 6
# else # else
# define EEPROM_HOST HSPI_HOST # define EEPROM_HOST HSPI_HOST
# define PIN_NUM_MISO 18 # define PIN_NUM_MISO 18
# define PIN_NUM_MOSI 23 # define PIN_NUM_MOSI 23
# define PIN_NUM_CLK 19 # define PIN_NUM_CLK 19
# endif # endif
# define PIN_NUM_CS 13
# define PIN_NUM_CS 13 #else
#elif defined CONFIG_IDF_TARGET_ESP32S2 # define EEPROM_HOST SPI2_HOST
# define EEPROM_HOST SPI2_HOST # define PIN_NUM_MISO 13
# define PIN_NUM_MOSI 12
# define PIN_NUM_MISO 37 # define PIN_NUM_CLK 11
# define PIN_NUM_MOSI 35 # define PIN_NUM_CS 10
# define PIN_NUM_CLK 36
# define PIN_NUM_CS 34
#elif defined CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
# define EEPROM_HOST SPI2_HOST
# define PIN_NUM_MISO 2
# define PIN_NUM_MOSI 7
# define PIN_NUM_CLK 6
# define PIN_NUM_CS 10
#elif CONFIG_IDF_TARGET_ESP32S3
# define EEPROM_HOST SPI2_HOST
# define PIN_NUM_MISO 13
# define PIN_NUM_MOSI 11
# define PIN_NUM_CLK 12
# define PIN_NUM_CS 10
#elif CONFIG_IDF_TARGET_ESP32H2
# define EEPROM_HOST SPI2_HOST
# define PIN_NUM_MISO 0
# define PIN_NUM_MOSI 5
# define PIN_NUM_CLK 4
# define PIN_NUM_CS 1
#endif #endif
static const char TAG[] = "main"; static const char TAG[] = "main";
@ -124,11 +102,10 @@ void app_main(void)
ESP_ERROR_CHECK(ret); ESP_ERROR_CHECK(ret);
} }
ESP_LOGI(TAG, "Read: %s", test_buf); ESP_LOGI(TAG, "Read: %s", test_buf);
ESP_LOGI(TAG, "Example finished."); ESP_LOGI(TAG, "Example finished.");
while (1) { while (1) {
// Add your main loop handling code here. // Add your main loop handling code here.
vTaskDelay(1); vTaskDelay(100);
} }
} }

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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# SPI Host Driver Example # SPI Host Driver Example
@ -15,9 +15,11 @@ If you are looking for code to drive LCDs in general, rather than code that uses
* An ESP development board, with SPI LCD * An ESP development board, with SPI LCD
Connection : **Connection** :
Depends on boards. Refer to `spi_master_example_main.c` No wiring is required on ESP-WROVER-KIT Depends on boards. The GPIO number used by this example can be changed in `spi_master_example_main.c` No wiring is required on ESP-WROVER-KIT
Especially, please pay attention to the level used to turn on the LCD backlight, some LCD module needs a low level to turn it on, while others take a high level. You can change the backlight level macro LCD_BK_LIGHT_ON_LEVEL in `spi_master_example_main.c`.
### Build and Flash ### Build and Flash

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@ -29,8 +29,10 @@
before the transaction is sent, the callback will set this line to the correct state. before the transaction is sent, the callback will set this line to the correct state.
*/ */
#ifdef CONFIG_IDF_TARGET_ESP32 //////////////////////////////////////////////////////////////////////////////////////////////////////////
#define LCD_HOST HSPI_HOST ////////////// Please update the following configuration according to your HardWare spec /////////////////
//////////////////////////////////////////////////////////////////////////////////////////////////////////
#define LCD_HOST SPI2_HOST
#define PIN_NUM_MISO 25 #define PIN_NUM_MISO 25
#define PIN_NUM_MOSI 23 #define PIN_NUM_MOSI 23
@ -40,41 +42,8 @@
#define PIN_NUM_DC 21 #define PIN_NUM_DC 21
#define PIN_NUM_RST 18 #define PIN_NUM_RST 18
#define PIN_NUM_BCKL 5 #define PIN_NUM_BCKL 5
#elif defined CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#define LCD_HOST SPI2_HOST
#define PIN_NUM_MISO 37 #define LCD_BK_LIGHT_ON_LEVEL 0
#define PIN_NUM_MOSI 35
#define PIN_NUM_CLK 36
#define PIN_NUM_CS 45
#define PIN_NUM_DC 4
#define PIN_NUM_RST 5
#define PIN_NUM_BCKL 6
#elif defined CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
#define LCD_HOST SPI2_HOST
#define PIN_NUM_MISO 2
#define PIN_NUM_MOSI 7
#define PIN_NUM_CLK 6
#define PIN_NUM_CS 10
#define PIN_NUM_DC 9
#define PIN_NUM_RST 4
#define PIN_NUM_BCKL 5
#elif defined CONFIG_IDF_TARGET_ESP32H2
#define LCD_HOST SPI2_HOST
#define PIN_NUM_MISO 0
#define PIN_NUM_MOSI 5
#define PIN_NUM_CLK 4
#define PIN_NUM_CS 1
#define PIN_NUM_DC 10
#define PIN_NUM_RST 11
#define PIN_NUM_BCKL 12
#endif
//To speed up transfers, every SPI transfer sends a bunch of lines. This define specifies how many. More means more memory use, //To speed up transfers, every SPI transfer sends a bunch of lines. This define specifies how many. More means more memory use,
//but less overhead for setting up / finishing transfers. Make sure 240 is dividable by this. //but less overhead for setting up / finishing transfers. Make sure 240 is dividable by this.
@ -328,7 +297,7 @@ void lcd_init(spi_device_handle_t spi)
} }
///Enable backlight ///Enable backlight
gpio_set_level(PIN_NUM_BCKL, 0); gpio_set_level(PIN_NUM_BCKL, LCD_BK_LIGHT_ON_LEVEL);
} }
/* To send a set of lines we have to send a command, 2 data bytes, another command, 2 more data bytes and another command /* To send a set of lines we have to send a command, 2 data bytes, another command, 2 more data bytes and another command

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@ -31,52 +31,19 @@ ready to receive/send data. This code connects this line to a GPIO interrupt whi
task waits for this semaphore to be given before queueing a transmission. task waits for this semaphore to be given before queueing a transmission.
*/ */
/* //////////////////////////////////////////////////////////////////////////////////////////////////////////
Pins in use. The SPI Master can use the GPIO mux, so feel free to change these if needed. ////////////// Please update the following configuration according to your HardWare spec /////////////////
*/ //////////////////////////////////////////////////////////////////////////////////////////////////////////
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 #define GPIO_HANDSHAKE 2
#define GPIO_HANDSHAKE 2 #define GPIO_MOSI 12
#define GPIO_MOSI 12 #define GPIO_MISO 13
#define GPIO_MISO 13 #define GPIO_SCLK 15
#define GPIO_SCLK 15 #define GPIO_CS 14
#define GPIO_CS 14
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
#define GPIO_HANDSHAKE 3
#define GPIO_MOSI 7
#define GPIO_MISO 2
#define GPIO_SCLK 6
#define GPIO_CS 10
#elif CONFIG_IDF_TARGET_ESP32C6
#define GPIO_HANDSHAKE 15
#define GPIO_MOSI 19
#define GPIO_MISO 20
#define GPIO_SCLK 18
#define GPIO_CS 9
#elif CONFIG_IDF_TARGET_ESP32H2
#define GPIO_HANDSHAKE 2
#define GPIO_MOSI 5
#define GPIO_MISO 0
#define GPIO_SCLK 4
#define GPIO_CS 1
#elif CONFIG_IDF_TARGET_ESP32S3
#define GPIO_HANDSHAKE 2
#define GPIO_MOSI 11
#define GPIO_MISO 13
#define GPIO_SCLK 12
#define GPIO_CS 10
#endif //CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
#ifdef CONFIG_IDF_TARGET_ESP32 #ifdef CONFIG_IDF_TARGET_ESP32
#define SENDER_HOST HSPI_HOST #define SENDER_HOST HSPI_HOST
#else #else
#define SENDER_HOST SPI2_HOST #define SENDER_HOST SPI2_HOST
#endif #endif
//The semaphore indicating the slave is ready to receive stuff. //The semaphore indicating the slave is ready to receive stuff.