diff --git a/components/driver/gpio/gpio.c b/components/driver/gpio/gpio.c index 2a45dc356b..4846c5995e 100644 --- a/components/driver/gpio/gpio.c +++ b/components/driver/gpio/gpio.c @@ -360,7 +360,7 @@ esp_err_t gpio_config(const gpio_config_t *pGPIOConfig) if (((gpio_pin_mask >> io_num) & BIT(0))) { assert(io_reg != (intptr_t)NULL); -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_PIN_COUNT > 0 if (rtc_gpio_is_valid_gpio(io_num)) { rtc_gpio_deinit(io_num); } diff --git a/components/driver/gpio/include/driver/rtc_io.h b/components/driver/gpio/include/driver/rtc_io.h index 3b17696f01..381ed0e24e 100644 --- a/components/driver/gpio/include/driver/rtc_io.h +++ b/components/driver/gpio/include/driver/rtc_io.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -28,7 +28,7 @@ bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num); #define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num) -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_PIN_COUNT > 0 /** * @brief Get RTC IO index number by gpio number. * @@ -63,6 +63,7 @@ esp_err_t rtc_gpio_init(gpio_num_t gpio_num); */ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num); +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED /** * @brief Get the RTC IO input level * @@ -243,24 +244,6 @@ esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num); */ esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num); -/** - * @brief Helper function to disconnect internal circuits from an RTC IO - * This function disables input, output, pullup, pulldown, and enables - * hold feature for an RTC IO. - * Use this function if an RTC IO needs to be disconnected from internal - * circuits in deep sleep, to minimize leakage current. - * - * In particular, for ESP32-WROVER module, call - * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce - * deep sleep current. - * - * @param gpio_num GPIO number (e.g. GPIO_NUM_12). - * @return - * - ESP_OK on success - * - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO - */ -esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num); - /** * @brief Enable force hold signal for all RTC IOs * @@ -279,6 +262,26 @@ esp_err_t rtc_gpio_force_hold_dis_all(void); #endif // SOC_RTCIO_HOLD_SUPPORTED +#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +/** + * @brief Helper function to disconnect internal circuits from an RTC IO + * This function disables input, output, pullup, pulldown, and enables + * hold feature for an RTC IO. + * Use this function if an RTC IO needs to be disconnected from internal + * circuits in deep sleep, to minimize leakage current. + * + * In particular, for ESP32-WROVER module, call + * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce + * deep sleep current. + * + * @param gpio_num GPIO number (e.g. GPIO_NUM_12). + * @return + * - ESP_OK on success + * - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO + */ +esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num); +#endif // SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED + #if SOC_RTCIO_WAKE_SUPPORTED /** @@ -304,6 +307,8 @@ esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num); #endif // SOC_RTCIO_WAKE_SUPPORTED +#endif // SOC_RTCIO_PIN_COUNT > 0 + #ifdef __cplusplus } #endif diff --git a/components/driver/gpio/rtc_io.c b/components/driver/gpio/rtc_io.c index ab53aefbfa..ce25da7140 100644 --- a/components/driver/gpio/rtc_io.c +++ b/components/driver/gpio/rtc_io.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,6 +13,7 @@ #include "freertos/timers.h" #include "driver/rtc_io.h" #include "hal/rtc_io_hal.h" +#include "soc/rtc_io_periph.h" #include "soc/soc_caps.h" static const char __attribute__((__unused__)) *RTCIO_TAG = "RTCIO"; @@ -21,11 +22,24 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi #define RTCIO_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock) #define RTCIO_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock) -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num) +{ +#if SOC_RTCIO_PIN_COUNT > 0 + return (gpio_num < GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0); +#else + return false; +#endif +} +#if SOC_RTCIO_PIN_COUNT > 0 /*--------------------------------------------------------------- RTC IO ---------------------------------------------------------------*/ +int rtc_io_number_get(gpio_num_t gpio_num) +{ + return rtc_io_num_map[gpio_num]; +} + esp_err_t rtc_gpio_init(gpio_num_t gpio_num) { ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error"); @@ -47,6 +61,7 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num) return ESP_OK; } +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level) { ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error"); @@ -177,16 +192,6 @@ esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num) return ESP_OK; } -esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num) -{ - ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error"); - RTCIO_ENTER_CRITICAL(); - rtcio_hal_isolate(rtc_io_number_get(gpio_num)); - RTCIO_EXIT_CRITICAL(); - - return ESP_OK; -} - esp_err_t rtc_gpio_force_hold_en_all(void) { RTCIO_ENTER_CRITICAL(); @@ -206,6 +211,18 @@ esp_err_t rtc_gpio_force_hold_dis_all(void) } #endif // SOC_RTCIO_HOLD_SUPPORTED +#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num) +{ + ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error"); + RTCIO_ENTER_CRITICAL(); + rtcio_hal_isolate(rtc_io_number_get(gpio_num)); + RTCIO_EXIT_CRITICAL(); + + return ESP_OK; +} +#endif // SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED + #if SOC_RTCIO_WAKE_SUPPORTED esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) @@ -231,19 +248,4 @@ esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num) #endif // SOC_RTCIO_WAKE_SUPPORTED -bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num) -{ -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED - return (gpio_num < GPIO_PIN_COUNT && rtc_io_num_map[gpio_num] >= 0); -#else - return false; -#endif -} - -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED -int rtc_io_number_get(gpio_num_t gpio_num) -{ - return rtc_io_num_map[gpio_num]; -} - -#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#endif // SOC_RTCIO_PIN_COUNT > 0 diff --git a/components/driver/test_apps/gpio/main/CMakeLists.txt b/components/driver/test_apps/gpio/main/CMakeLists.txt index 8e1c0d8274..de29a112f9 100644 --- a/components/driver/test_apps/gpio/main/CMakeLists.txt +++ b/components/driver/test_apps/gpio/main/CMakeLists.txt @@ -5,7 +5,7 @@ if(CONFIG_SOC_SDM_SUPPORTED) list(APPEND srcs "test_sigma_delta_legacy.c") endif() -if(CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED) +if(CONFIG_SOC_RTCIO_PIN_COUNT GREATER 0) list(APPEND srcs "test_rtcio.c") endif() diff --git a/components/driver/test_apps/gpio/main/test_rtcio.c b/components/driver/test_apps/gpio/main/test_rtcio.c index a74ecdaaec..32666bba0e 100644 --- a/components/driver/test_apps/gpio/main/test_rtcio.c +++ b/components/driver/test_apps/gpio/main/test_rtcio.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -17,12 +17,6 @@ #include "esp_log.h" #include "soc/rtc_io_periph.h" -#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK") -#define RTCIO_VERIFY(condition, msg) TEST_ASSERT_MESSAGE((condition), msg) - -#define TEST_COUNT 10 -static const char *TAG = "rtcio_test"; - #ifdef CONFIG_IDF_TARGET_ESP32 // The input-only rtcio pins do not have pull-up/down resistors (not support pull-up/down) #define RTCIO_SUPPORT_PU_PD(num) (rtc_io_desc[num].pullup != 0) @@ -117,8 +111,27 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = { GPIO_NUM_6, //GPIO6 GPIO_NUM_7, //GPIO7 }; +#elif CONFIG_IDF_TARGET_ESP32H2 +#define TEST_GPIO_PIN_COUNT 8 +const int s_test_map[TEST_GPIO_PIN_COUNT] = { + GPIO_NUM_7, //GPIO7 + GPIO_NUM_8, //GPIO8 + GPIO_NUM_9, //GPIO9 + GPIO_NUM_10, //GPIO10 + GPIO_NUM_11, //GPIO11 + GPIO_NUM_12, //GPIO12 + GPIO_NUM_13, //GPIO13 + GPIO_NUM_14, //GPIO14 +}; #endif +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +static const char *TAG = "rtcio_test"; + +#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK") + +#define TEST_COUNT 10 + /* * Test output/input function. */ @@ -325,10 +338,13 @@ TEST_CASE("RTCIO_output_hold_test", "[rtcio]") } ESP_LOGI(TAG, "RTCIO hold test over"); } +#endif //SOC_RTCIO_HOLD_SUPPORTED +#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6268 // It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep // Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin -// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5) these pads' default configuration is low level +// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5, H2: IO12) these pads' default configuration is low level #define TEST_RTCIO_DEEP_SLEEP_PIN_INDEX 5 static void rtcio_deep_sleep_hold_test_first_stage(void) @@ -374,4 +390,4 @@ static void rtcio_deep_sleep_hold_test_second_stage(void) TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]", rtcio_deep_sleep_hold_test_first_stage, rtcio_deep_sleep_hold_test_second_stage) -#endif //SOC_RTCIO_HOLD_SUPPORTED +#endif diff --git a/components/driver/test_apps/gpio/pytest_gpio.py b/components/driver/test_apps/gpio/pytest_gpio.py index 085bf61537..1ab39405f9 100644 --- a/components/driver/test_apps/gpio/pytest_gpio.py +++ b/components/driver/test_apps/gpio/pytest_gpio.py @@ -33,6 +33,7 @@ def test_legacy_sigma_delta(dut: IdfDut) -> None: @pytest.mark.esp32s2 @pytest.mark.esp32s3 @pytest.mark.esp32c6 +@pytest.mark.esp32h2 @pytest.mark.generic @pytest.mark.parametrize('config', CONFIGS, indirect=True) def test_rtc_io(dut: IdfDut) -> None: diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index e7950d5e5d..de0ae7203b 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -1293,11 +1293,11 @@ touch_pad_t esp_sleep_get_touchpad_wakeup_status(void) bool esp_sleep_is_valid_wakeup_gpio(gpio_num_t gpio_num) { -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_PIN_COUNT > 0 return RTC_GPIO_IS_VALID_GPIO(gpio_num); #else return GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num); -#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#endif } #if SOC_PM_SUPPORT_EXT0_WAKEUP diff --git a/components/hal/esp32h2/include/hal/rtc_io_ll.h b/components/hal/esp32h2/include/hal/rtc_io_ll.h new file mode 100644 index 0000000000..1205098a85 --- /dev/null +++ b/components/hal/esp32h2/include/hal/rtc_io_ll.h @@ -0,0 +1,104 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/******************************************************************************* + * NOTICE + * The ll is not public api, don't use in application code. + * See readme.md in hal/readme.md + ******************************************************************************/ + +#pragma once + +#include "soc/lp_aon_struct.h" +#include "soc/pmu_struct.h" +#include "hal/misc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define RTCIO_LL_GPIO_NUM_OFFSET 7 // rtcio 0-7 correspond to gpio 7-14 + +typedef enum { + RTCIO_FUNC_RTC = 0x0, /*!< The pin controlled by RTC module. */ + RTCIO_FUNC_DIGITAL = 0x1, /*!< The pin controlled by DIGITAL module. */ +} rtcio_ll_func_t; + +/** + * @brief Select the rtcio function. + * + * @note The RTC function must be selected before the pad analog function is enabled. + * + * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio). + * @param func Select pin function. + */ +static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func) +{ + if (func == RTCIO_FUNC_RTC) { + // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module. + uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel); + sel_mask |= BIT(rtcio_num); + HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel, sel_mask); + } else if (func == RTCIO_FUNC_DIGITAL) { + // Clear the bit to use digital GPIO module + uint32_t sel_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel); + sel_mask &= ~BIT(rtcio_num); + HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.gpio_mux, gpio_mux_sel, sel_mask); + } +} + +/** + * Enable force hold function for an RTC IO pad. + * + * Enabling HOLD function will cause the pad to lock current status, such as, + * input/output enable, input/output value, function, drive strength values. + * This function is useful when going into light or deep sleep mode to prevent + * the pin configuration from changing. + * + * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio). + */ +static inline void rtcio_ll_force_hold_enable(int rtcio_num) +{ + LP_AON.gpio_hold0.gpio_hold0 |= BIT(rtcio_num + RTCIO_LL_GPIO_NUM_OFFSET); +} + +/** + * Disable hold function on an RTC IO pad + * + * @note If disable the pad hold, the status of pad maybe changed in sleep mode. + * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio). + */ +static inline void rtcio_ll_force_hold_disable(int rtcio_num) +{ + LP_AON.gpio_hold0.gpio_hold0 &= ~BIT(rtcio_num + RTCIO_LL_GPIO_NUM_OFFSET); +} + +/** + * Enable force hold function for all RTC IO pads + * + * Enabling HOLD function will cause the pad to lock current status, such as, + * input/output enable, input/output value, function, drive strength values. + * This function is useful when going into light or deep sleep mode to prevent + * the pin configuration from changing. + */ +static inline void rtcio_ll_force_hold_all(void) +{ + PMU.imm.pad_hold_all.tie_high_lp_pad_hold_all = 1; +} + +/** + * Disable hold function fon all RTC IO pads + * + * @note If disable the pad hold, the status of pad maybe changed in sleep mode. + */ +static inline void rtcio_ll_force_unhold_all(void) +{ + PMU.imm.pad_hold_all.tie_low_lp_pad_hold_all = 1; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/include/hal/rtc_io_hal.h b/components/hal/include/hal/rtc_io_hal.h index cb6a9d7928..6f186e520c 100644 --- a/components/hal/include/hal/rtc_io_hal.h +++ b/components/hal/include/hal/rtc_io_hal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,16 +18,18 @@ #include "sdkconfig.h" #include "soc/soc_caps.h" -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_PIN_COUNT > 0 #include "hal/rtc_io_ll.h" +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED #include "hal/rtc_io_types.h" #endif +#endif //SOC_RTCIO_PIN_COUNT > 0 #ifdef __cplusplus extern "C" { #endif -#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_PIN_COUNT > 0 /** * Select the rtcio function. * @@ -37,6 +39,7 @@ extern "C" { */ #define rtcio_hal_function_select(rtcio_num, func) rtcio_ll_function_select(rtcio_num, func) +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED /** * Enable rtcio output. * @@ -243,7 +246,7 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode); #endif -#if SOC_RTCIO_HOLD_SUPPORTED || SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED /** * Helper function to disconnect internal circuits from an RTC IO @@ -262,6 +265,8 @@ void rtcio_hal_isolate(int rtc_num); #endif +#endif //SOC_RTCIO_PIN_COUNT > 0 + #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT > 0) #define gpio_hal_deepsleep_wakeup_enable(hal, gpio_num, intr_type) rtcio_hal_wakeup_enable(gpio_num, intr_type) @@ -291,7 +296,8 @@ void rtcio_hal_isolate(int rtc_num); */ #define rtcio_hal_clear_interrupt_status() rtcio_ll_clear_interrupt_status() -#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT > 0) + #ifdef __cplusplus } #endif diff --git a/components/hal/rtc_io_hal.c b/components/hal/rtc_io_hal.c index ef59c9ac25..586a3c8f51 100644 --- a/components/hal/rtc_io_hal.c +++ b/components/hal/rtc_io_hal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -49,15 +49,6 @@ void rtcio_hal_set_direction(int rtcio_num, rtc_gpio_mode_t mode) } } -void rtcio_hal_isolate(int rtcio_num) -{ - rtcio_ll_pullup_disable(rtcio_num); - rtcio_ll_pulldown_disable(rtcio_num); - rtcio_ll_output_disable(rtcio_num); - rtcio_ll_input_disable(rtcio_num); - rtcio_ll_force_hold_enable(rtcio_num); -} - void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode) { switch (mode) { @@ -86,4 +77,15 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode) } } +#if SOC_RTCIO_HOLD_SUPPORTED +void rtcio_hal_isolate(int rtcio_num) +{ + rtcio_ll_pullup_disable(rtcio_num); + rtcio_ll_pulldown_disable(rtcio_num); + rtcio_ll_output_disable(rtcio_num); + rtcio_ll_input_disable(rtcio_num); + rtcio_ll_force_hold_enable(rtcio_num); +} #endif + +#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index e93e64db8b..7311face16 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -201,7 +201,7 @@ /*-------------------------- RTCIO CAPS --------------------------------------*/ #define SOC_RTCIO_PIN_COUNT 8 -#define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 +#define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 // The target has separate LP(RTC) IOMUX #define SOC_RTCIO_HOLD_SUPPORTED 1 #define SOC_RTCIO_WAKE_SUPPORTED 1 diff --git a/components/soc/esp32c6/rtc_io_periph.c b/components/soc/esp32c6/rtc_io_periph.c index 0e4b8127c9..a55e1f5303 100644 --- a/components/soc/esp32c6/rtc_io_periph.c +++ b/components/soc/esp32c6/rtc_io_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/rtc_periph.h" +#include "soc/rtc_io_periph.h" const int rtc_io_num_map[SOC_GPIO_PIN_COUNT] = { RTCIO_GPIO0_CHANNEL, //GPIO0 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 3dade6c325..91ff7709bb 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -419,14 +419,10 @@ config SOC_GPIO_ETM_TASKS_PER_GROUP int default 8 -config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP +config SOC_GPIO_SUPPORT_RTC_INDEPENDENT bool default y -config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK - int - default 0 - config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x000000000FFF807F @@ -439,6 +435,14 @@ config SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP bool default y +config SOC_RTCIO_PIN_COUNT + int + default 8 + +config SOC_RTCIO_HOLD_SUPPORTED + bool + default y + config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM int default 8 @@ -735,10 +739,6 @@ config SOC_PARLIO_TRANS_BIT_ALIGN bool default y -config SOC_RTCIO_PIN_COUNT - int - default 0 - config SOC_MPI_MEM_BLOCKS_NUM int default 4 diff --git a/components/soc/esp32h2/include/soc/rtc_io_channel.h b/components/soc/esp32h2/include/soc/rtc_io_channel.h new file mode 100644 index 0000000000..81435c63b4 --- /dev/null +++ b/components/soc/esp32h2/include/soc/rtc_io_channel.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +//RTC GPIO channels +#define RTCIO_GPIO7_CHANNEL 0 //RTCIO_CHANNEL_0 +#define RTCIO_CHANNEL_0_GPIO_NUM 7 + +#define RTCIO_GPIO8_CHANNEL 1 //RTCIO_CHANNEL_1 +#define RTCIO_CHANNEL_1_GPIO_NUM 8 + +#define RTCIO_GPIO9_CHANNEL 2 //RTCIO_CHANNEL_2 +#define RTCIO_CHANNEL_2_GPIO_NUM 9 + +#define RTCIO_GPIO10_CHANNEL 3 //RTCIO_CHANNEL_3 +#define RTCIO_CHANNEL_3_GPIO_NUM 10 + +#define RTCIO_GPIO11_CHANNEL 4 //RTCIO_CHANNEL_4 +#define RTCIO_CHANNEL_4_GPIO_NUM 11 + +#define RTCIO_GPIO12_CHANNEL 5 //RTCIO_CHANNEL_5 +#define RTCIO_CHANNEL_5_GPIO_NUM 12 + +#define RTCIO_GPIO13_CHANNEL 6 //RTCIO_CHANNEL_6 +#define RTCIO_CHANNEL_6_GPIO_NUM 13 + +#define RTCIO_GPIO14_CHANNEL 7 //RTCIO_CHANNEL_7 +#define RTCIO_CHANNEL_7_GPIO_NUM 14 diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 16e3c617cb..15add792cb 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -182,14 +182,15 @@ #define SOC_GPIO_ETM_EVENTS_PER_GROUP 8 #define SOC_GPIO_ETM_TASKS_PER_GROUP 8 -// Target has no full LP IO subsystem, GPIO7~14 remain LP function (powered by VDD3V3_LP, and can be used as deep-sleep wakeup pins) +// Target has no full LP IO subsystem, GPIO7~14 remain LP function (powered by VDD3V3_LP, and can be used as ext1 wakeup pins) +// Digital IOs have their own registers to control pullup/down/capability +// However, there is no way to control pullup/down/capability for IOs under LP function since there is no LP_IOMUX registers +#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1) -// GPIO7~14 on ESP32H2 can support chip deep sleep wakeup -#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) +// GPIO7~14 on ESP32H2 can support chip deep sleep wakeup through EXT1 wake up -#define SOC_GPIO_VALID_GPIO_MASK ((1U< 0 #include "soc/rtc_io_channel.h" +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED #include "soc/rtc_io_reg.h" #include "soc/rtc_io_struct.h" #endif +#endif #if SOC_ADC_RTC_CTRL_SUPPORTED #include "soc/sens_struct.h" @@ -26,8 +28,8 @@ extern "C" { #endif +#if SOC_RTCIO_PIN_COUNT > 0 #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED - /** * @brief Pin function information for a single RTCIO pad's. * @@ -60,6 +62,7 @@ typedef struct { * for external use. */ extern const rtc_io_desc_t rtc_io_desc[SOC_RTCIO_PIN_COUNT]; +#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED /** * @brief Provides a constant table to get rtc io number with gpio number @@ -68,8 +71,7 @@ extern const rtc_io_desc_t rtc_io_desc[SOC_RTCIO_PIN_COUNT]; * for external use. */ extern const int rtc_io_num_map[SOC_GPIO_PIN_COUNT]; - -#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED +#endif //SOC_RTCIO_PIN_COUNT > 0 #ifdef __cplusplus } diff --git a/docs/en/api-reference/system/sleep_modes.rst b/docs/en/api-reference/system/sleep_modes.rst index e21940c7a7..22ea139bef 100644 --- a/docs/en/api-reference/system/sleep_modes.rst +++ b/docs/en/api-reference/system/sleep_modes.rst @@ -237,7 +237,7 @@ Configuring IOs (Deep-sleep only) Some {IDF_TARGET_NAME} IOs have internal pullups or pulldowns, which are enabled by default. If an external circuit drives this pin in Deep-sleep mode, current consumption may increase due to current flowing through these pullups and pulldowns. -.. only:: SOC_RTCIO_HOLD_SUPPORTED +.. only:: SOC_RTCIO_HOLD_SUPPORTED and SOC_RTCIO_INPUT_OUTPUT_SUPPORTED To isolate a pin to prevent extra current draw, call :cpp:func:`rtc_gpio_isolate` function. diff --git a/docs/zh_CN/api-reference/system/sleep_modes.rst b/docs/zh_CN/api-reference/system/sleep_modes.rst index a40d61be7b..7ddc88653a 100644 --- a/docs/zh_CN/api-reference/system/sleep_modes.rst +++ b/docs/zh_CN/api-reference/system/sleep_modes.rst @@ -237,7 +237,7 @@ Flash 断电 一些 {IDF_TARGET_NAME} IO 在默认情况下启用内部上拉或下拉电阻。如果这些管脚在 Deep-sleep 模式下中受外部电路驱动，电流流经这些上下拉电阻时，可能会增加电流消耗。 -.. only:: SOC_RTCIO_HOLD_SUPPORTED +.. only:: SOC_RTCIO_HOLD_SUPPORTED and SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 想要隔离这些管脚以避免额外的电流消耗，请调用 :cpp:func:`rtc_gpio_isolate` 函数。 diff --git a/examples/bluetooth/nimble/throughput_app/blecent_throughput/components/cmd_system/cmd_system.c b/examples/bluetooth/nimble/throughput_app/blecent_throughput/components/cmd_system/cmd_system.c index 3878a51fa2..43b3ca3d33 100644 --- a/examples/bluetooth/nimble/throughput_app/blecent_throughput/components/cmd_system/cmd_system.c +++ b/examples/bluetooth/nimble/throughput_app/blecent_throughput/components/cmd_system/cmd_system.c @@ -221,7 +221,7 @@ static int deep_sleep(int argc, char **argv) #endif } -#if SOC_RTCIO_HOLD_SUPPORTED +#if CONFIG_IDF_TARGET_ESP32 rtc_gpio_isolate(GPIO_NUM_12); #endif esp_deep_sleep_start();