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refactor(dac): remove redundant ll config for dac mode
Closes https://github.com/espressif/esp-idf/issues/12741
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@ -885,6 +885,7 @@ static void i2s_adc_set_slot_legacy(void)
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i2s_ll_rx_set_ws_width(dev, slot_cfg->slot_bit_width);
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i2s_ll_rx_enable_msb_right(dev, false);
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i2s_ll_rx_enable_right_first(dev, false);
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i2s_ll_rx_select_std_slot(dev, I2S_STD_SLOT_LEFT, false);
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/* Should always enable fifo */
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i2s_ll_rx_force_enable_fifo_mod(dev, true);
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}
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@ -1473,15 +1474,14 @@ static esp_err_t i2s_init_legacy(i2s_port_t i2s_num, int intr_alloc_flag)
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if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {
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sar_periph_ctrl_adc_continuous_power_acquire();
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adc_set_i2s_data_source(ADC_I2S_DATA_SRC_ADC);
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i2s_ll_enable_builtin_adc(p_i2s[i2s_num]->hal.dev, true);
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i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);
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}
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if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {
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i2s_ll_enable_builtin_dac(p_i2s[i2s_num]->hal.dev, true);
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i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);
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}
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} else {
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adc_set_i2s_data_source(ADC_I2S_DATA_SRC_IO_SIG);
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i2s_ll_enable_builtin_adc(p_i2s[i2s_num]->hal.dev, false);
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i2s_ll_enable_builtin_dac(p_i2s[i2s_num]->hal.dev, false);
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i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, false);
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}
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#endif
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@ -125,7 +125,7 @@ esp_err_t dac_dma_periph_init(uint32_t freq_hz, bool is_alternate, bool is_apll)
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}
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ESP_GOTO_ON_ERROR(s_dac_dma_periph_set_clock(freq_hz, is_apll), err, TAG, "Failed to set clock of DMA peripheral");
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i2s_ll_enable_builtin_dac(s_ddp->periph_dev, true);
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i2s_ll_enable_builtin_adc_dac(s_ddp->periph_dev, true);
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i2s_ll_tx_reset(s_ddp->periph_dev);
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i2s_ll_tx_set_slave_mod(s_ddp->periph_dev, false);
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i2s_ll_tx_set_sample_bit(s_ddp->periph_dev, DAC_DMA_PERIPH_I2S_BIT_WIDTH, DAC_DMA_PERIPH_I2S_BIT_WIDTH);
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@ -120,7 +120,11 @@ void adc_hal_digi_init(adc_hal_dma_ctx_t *hal)
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i2s_ll_rx_set_sample_bit(hal->dev, SAMPLE_BITS, SAMPLE_BITS);
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i2s_ll_rx_enable_mono_mode(hal->dev, 1);
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i2s_ll_rx_force_enable_fifo_mod(hal->dev, 1);
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i2s_ll_enable_builtin_adc(hal->dev, 1);
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i2s_ll_rx_enable_right_first(hal->dev, false);
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i2s_ll_rx_enable_msb_shift(hal->dev, false);
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i2s_ll_rx_set_ws_width(hal->dev, 16);
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i2s_ll_rx_select_std_slot(hal->dev, I2S_STD_SLOT_LEFT, false);
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i2s_ll_enable_builtin_adc_dac(hal->dev, 1);
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#endif
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adc_oneshot_ll_disable_all_unit();
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@ -1131,36 +1131,15 @@ static inline void i2s_ll_enable_camera(i2s_dev_t *hw, bool enable)
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}
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/**
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* @brief Enable I2S build in ADC mode
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* @brief Enable I2S built-in ADC/DAC mode
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param enable Set true to enable build in ADC
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* @param enable Set true to enable built-in ADC/DAC
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*/
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static inline void i2s_ll_enable_builtin_adc(i2s_dev_t *hw, bool enable)
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static inline void i2s_ll_enable_builtin_adc_dac(i2s_dev_t *hw, bool enable)
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{
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hw->conf2.lcd_en = enable;
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hw->conf2.camera_en = 0;
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hw->conf.rx_right_first = 0;
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hw->conf.rx_msb_shift = 0;
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hw->conf.rx_mono = 0;
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hw->conf.rx_short_sync = 0;
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hw->fifo_conf.rx_fifo_mod = enable;
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hw->conf_chan.rx_chan_mod = enable;
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}
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/**
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* @brief Enable I2S build in DAC mode
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*
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* @param hw Peripheral I2S hardware instance address.
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* * @param enable Set true to enable build in DAC
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*/
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static inline void i2s_ll_enable_builtin_dac(i2s_dev_t *hw, bool enable)
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{
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hw->conf2.lcd_en = enable;
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hw->conf2.camera_en = 0;
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hw->conf.tx_right_first = enable;
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hw->conf.tx_msb_shift = 0;
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hw->conf.tx_short_sync = 0;
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}
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#ifdef __cplusplus
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