fix ULP FSM reg ops with addr > 0xFF

This commit is contained in:
boarchuz 2023-06-12 18:59:25 +10:00 committed by Sudeep Mohanty
parent 4bc762621d
commit e707ad166d
3 changed files with 6 additions and 6 deletions

View File

@ -331,7 +331,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.data = val, \
.low = low_bit, \
@ -345,7 +345,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.unused = 0, \
.low = low_bit, \

View File

@ -319,7 +319,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg)
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.data = val, \
.low = low_bit, \
@ -333,7 +333,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg)
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.unused = 0, \
.low = low_bit, \

View File

@ -319,7 +319,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg)
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.data = val, \
.low = low_bit, \
@ -333,7 +333,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg)
* This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
*/
#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.addr = ((reg) / sizeof(uint32_t)) & 0xff, \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.unused = 0, \
.low = low_bit, \