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fix(parlio_tx): fix wrong dma descriptor setup

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This commit is contained in:
morris 2023-09-27 14:33:44 +08:00
parent 28e62166a0
commit e5c8434c6e
4 changed files with 9 additions and 4 deletions
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4
components/driver/parlio/parlio_tx.c
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@ -296,6 +296,10 @@ esp_err_t parlio_new_tx_unit(const parlio_tx_unit_config_t *config, parlio_tx_un
// DMA descriptors must be placed in internal SRAM
unit->dma_nodes = heap_caps_calloc(dma_nodes_num, sizeof(dma_descriptor_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA);
ESP_GOTO_ON_FALSE(unit->dma_nodes, ESP_ERR_NO_MEM, err, TAG, "no memory for DMA nodes");
// Link the descriptors
for (int i = 0; i < dma_nodes_num; i++) {
unit->dma_nodes[i].next = (i == dma_nodes_num - 1) ? NULL : &(unit->dma_nodes[i + 1]);
}
unit->max_transfer_bits = config->max_transfer_size * 8;
unit->data_width = data_width;

4
components/hal/esp32c6/include/hal/parlio_ll.h
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@ -87,7 +87,7 @@ static inline void parlio_ll_rx_set_clock_div(parl_io_dev_t *dev, uint32_t div)
{
(void)dev;
HAL_ASSERT(div > 0 && div <= PARLIO_LL_RX_MAX_CLOCK_DIV);
PCR.parl_clk_rx_conf.parl_clk_rx_div_num = div - 1;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.parl_clk_rx_conf, parl_clk_rx_div_num, div - 1);
}
/**
@ -369,7 +369,7 @@ static inline void parlio_ll_tx_set_clock_div(parl_io_dev_t *dev, uint32_t div)
{
(void)dev;
HAL_ASSERT(div > 0 && div <= PARLIO_LL_TX_MAX_CLOCK_DIV);
PCR.parl_clk_tx_conf.parl_clk_tx_div_num = div - 1;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.parl_clk_tx_conf, parl_clk_tx_div_num, div - 1);
}
/**

4
components/hal/esp32h2/include/hal/parlio_ll.h
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@ -87,7 +87,7 @@ static inline void parlio_ll_rx_set_clock_div(parl_io_dev_t *dev, uint32_t div)
{
(void)dev;
HAL_ASSERT(div > 0 && div <= PARLIO_LL_RX_MAX_CLOCK_DIV);
PCR.parl_clk_rx_conf.parl_clk_rx_div_num = div - 1;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.parl_clk_rx_conf, parl_clk_rx_div_num, div - 1);
}
/**
@ -373,7 +373,7 @@ static inline void parlio_ll_tx_set_clock_div(parl_io_dev_t *dev, uint32_t div)
{
(void)dev;
HAL_ASSERT(div > 0 && div <= PARLIO_LL_TX_MAX_CLOCK_DIV);
PCR.parl_clk_tx_conf.parl_clk_tx_div_num = div - 1;
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.parl_clk_tx_conf, parl_clk_tx_div_num, div - 1);
}
/**

1
components/hal/parlio_hal.c
View File

@ -4,6 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdlib.h>
#include <stddef.h>
#include "hal/parlio_hal.h"
#include "hal/parlio_ll.h"