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https://github.com/espressif/esp-idf.git
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Merge branch 'feature/esp32h2_enable_rsa_support' into 'master'
mbedtls: enable RSA support for esp32h2 Closes IDF-6284 and IDF-6415 See merge request espressif/esp-idf!22498
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commit
e364e1c102
@ -19,6 +19,7 @@
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#include "soc/rtc.h"
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#include "soc/rtc_periph.h"
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#include "soc/i2s_reg.h"
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#include "soc/pcr_reg.h"
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#include "hal/wdt_hal.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/esp_clk.h"
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@ -104,6 +105,9 @@ static const char *TAG = "clk";
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// Re calculate the ccount to make time calculation correct.
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esp_cpu_set_cycle_count( (uint64_t)esp_cpu_get_cycle_count() * new_freq_mhz / old_freq_mhz );
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// Set crypto clock (`clk_sec`) to use 96M PLL clock
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REG_SET_FIELD(PCR_SEC_CONF_REG, PCR_SEC_CLK_SEL, 0x3);
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}
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static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
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230
components/mbedtls/port/esp32h2/bignum.c
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230
components/mbedtls/port/esp32h2/bignum.c
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@ -0,0 +1,230 @@
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/*
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* Multi-precision integer library
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* ESP32 H2 hardware accelerated parts based on mbedTLS implementation
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*
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* SPDX-FileCopyrightText: The Mbed TLS Contributors
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
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*/
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#include <string.h>
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#include <sys/param.h>
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#include "soc/hwcrypto_periph.h"
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#include "esp_private/periph_ctrl.h"
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#include "mbedtls/bignum.h"
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#include "bignum_impl.h"
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#include "soc/pcr_reg.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "esp_crypto_lock.h"
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size_t esp_mpi_hardware_words(size_t words)
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{
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return words;
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}
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void esp_mpi_enable_hardware_hw_op( void )
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{
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esp_crypto_mpi_lock_acquire();
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/* Enable RSA hardware */
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periph_module_enable(PERIPH_RSA_MODULE);
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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while (REG_READ(RSA_QUERY_CLEAN_REG) != 1) {
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}
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// Note: from enabling RSA clock to here takes about 1.3us
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REG_WRITE(RSA_INT_ENA_REG, 0);
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}
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void esp_mpi_disable_hardware_hw_op( void )
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{
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REG_SET_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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/* Disable RSA hardware */
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periph_module_disable(PERIPH_RSA_MODULE);
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esp_crypto_mpi_lock_release();
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}
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void esp_mpi_interrupt_enable( bool enable )
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{
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REG_WRITE(RSA_INT_ENA_REG, enable);
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}
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void esp_mpi_interrupt_clear( void )
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{
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REG_WRITE(RSA_INT_CLR_REG, 1);
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}
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/* Copy mbedTLS MPI bignum 'mpi' to hardware memory block at 'mem_base'.
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If num_words is higher than the number of words in the bignum then
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these additional words will be zeroed in the memory buffer.
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*/
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static inline void mpi_to_mem_block(uint32_t mem_base, const mbedtls_mpi *mpi, size_t num_words)
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{
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uint32_t *pbase = (uint32_t *)mem_base;
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uint32_t copy_words = MIN(num_words, mpi->MBEDTLS_PRIVATE(n));
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/* Copy MPI data to memory block registers */
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for (int i = 0; i < copy_words; i++) {
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pbase[i] = mpi->MBEDTLS_PRIVATE(p)[i];
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}
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/* Zero any remaining memory block data */
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for (int i = copy_words; i < num_words; i++) {
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pbase[i] = 0;
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}
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}
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/* Read mbedTLS MPI bignum back from hardware memory block.
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Reads num_words words from block.
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*/
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static inline void mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, int num_words)
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{
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/* Copy data from memory block registers */
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const size_t REG_WIDTH = sizeof(uint32_t);
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for (size_t i = 0; i < num_words; i++) {
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x->MBEDTLS_PRIVATE(p)[i] = REG_READ(mem_base + (i * REG_WIDTH));
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}
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/* Zero any remaining limbs in the bignum, if the buffer is bigger
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than num_words */
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for (size_t i = num_words; i < x->MBEDTLS_PRIVATE(n); i++) {
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x->MBEDTLS_PRIVATE(p)[i] = 0;
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}
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}
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/* Begin an RSA operation. op_reg specifies which 'START' register
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to write to.
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*/
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static inline void start_op(uint32_t op_reg)
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{
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/* Clear interrupt status */
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REG_WRITE(RSA_INT_CLR_REG, 1);
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/* Note: above REG_WRITE includes a memw, so we know any writes
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to the memory blocks are also complete. */
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REG_WRITE(op_reg, 1);
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}
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/* Wait for an RSA operation to complete.
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*/
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static inline void wait_op_complete(void)
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{
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while (REG_READ(RSA_QUERY_IDLE_REG) != 1)
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{ }
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/* clear the interrupt */
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REG_WRITE(RSA_INT_CLR_REG, 1);
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}
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/* Read result from last MPI operation */
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void esp_mpi_read_result_hw_op(mbedtls_mpi *Z, size_t z_words)
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{
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wait_op_complete();
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mem_block_to_mpi(Z, RSA_Z_MEM_REG, z_words);
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}
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/* Z = (X * Y) mod M
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Not an mbedTLS function
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*/
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void esp_mpi_mul_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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REG_WRITE(RSA_MODE_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_X_MEM_REG, X, num_words);
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mpi_to_mem_block(RSA_Y_MEM_REG, Y, num_words);
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mpi_to_mem_block(RSA_M_MEM_REG, M, num_words);
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mpi_to_mem_block(RSA_Z_MEM_REG, Rinv, num_words);
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REG_WRITE(RSA_M_PRIME_REG, Mprime);
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start_op(RSA_SET_START_MODMULT_REG);
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}
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/* Z = (X ^ Y) mod M
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*/
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void esp_mpi_exp_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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size_t y_bits = mbedtls_mpi_bitlen(Y);
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REG_WRITE(RSA_MODE_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_X_MEM_REG, X, num_words);
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mpi_to_mem_block(RSA_Y_MEM_REG, Y, num_words);
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mpi_to_mem_block(RSA_M_MEM_REG, M, num_words);
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mpi_to_mem_block(RSA_Z_MEM_REG, Rinv, num_words);
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REG_WRITE(RSA_M_PRIME_REG, Mprime);
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/* Enable acceleration options */
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REG_WRITE(RSA_CONSTANT_TIME_REG, 0);
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REG_WRITE(RSA_SEARCH_ENABLE_REG, 1);
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REG_WRITE(RSA_SEARCH_POS_REG, y_bits - 1);
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/* Execute first stage montgomery multiplication */
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start_op(RSA_SET_START_MODEXP_REG);
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REG_WRITE(RSA_SEARCH_ENABLE_REG, 0);
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}
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/* Z = X * Y */
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void esp_mpi_mul_mpi_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
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{
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/* Copy X (right-extended) & Y (left-extended) to memory block */
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mpi_to_mem_block(RSA_X_MEM_REG, X, num_words);
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mpi_to_mem_block(RSA_Z_MEM_REG + num_words * 4, Y, num_words);
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/* NB: as Y is left-exte, we don't zero the bottom words_mult words of Y block.
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This is OK for now bec zeroing is done by hardware when we do esp_mpi_acquire_hardware().
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*/
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REG_WRITE(RSA_MODE_REG, (num_words * 2 - 1));
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start_op(RSA_SET_START_MULT_REG);
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}
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/**
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* @brief Special-case of (X * Y), where we use hardware montgomery mod
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multiplication to calculate result where either A or B are >2048 bits so
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can't use the standard multiplication method.
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*
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*/
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void esp_mpi_mult_mpi_failover_mod_mult_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
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{
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/* M = 2^num_words - 1, so block is entirely FF */
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for (int i = 0; i < num_words; i++) {
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REG_WRITE(RSA_M_MEM_REG + i * 4, UINT32_MAX);
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}
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/* Mprime = 1 */
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REG_WRITE(RSA_M_PRIME_REG, 1);
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REG_WRITE(RSA_MODE_REG, num_words - 1);
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/* Load X & Y */
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mpi_to_mem_block(RSA_X_MEM_REG, X, num_words);
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mpi_to_mem_block(RSA_Y_MEM_REG, Y, num_words);
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/* Rinv = 1, write first word */
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REG_WRITE(RSA_Z_MEM_REG, 1);
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/* Zero out rest of the Rinv words */
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for (int i = 1; i < num_words; i++) {
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REG_WRITE(RSA_Z_MEM_REG + i * 4, 0);
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}
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start_op(RSA_SET_START_MODMULT_REG);
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}
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@ -107,6 +107,10 @@ config SOC_AES_SUPPORTED
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bool
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default y
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config SOC_MPI_SUPPORTED
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bool
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default y
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config SOC_SHA_SUPPORTED
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bool
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default y
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@ -55,7 +55,7 @@
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#define SOC_SYSTIMER_SUPPORTED 1
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// #define SOC_SUPPORT_COEXISTENCE 1 // TODO: IDF-6416
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#define SOC_AES_SUPPORTED 1
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// #define SOC_MPI_SUPPORTED 1 // TODO: IDF-6415
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#define SOC_MPI_SUPPORTED 1
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#define SOC_SHA_SUPPORTED 1
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#define SOC_HMAC_SUPPORTED 1
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#define SOC_DIG_SIGN_SUPPORTED 1
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@ -292,7 +292,6 @@
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* for hold, wake & 32kHz crystal functions - via LP_AON registers */
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#define SOC_RTCIO_PIN_COUNT (0U)
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// TODO: IDF-6284 (Copy from esp32c6, need check)
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/*--------------------------- RSA CAPS ---------------------------------------*/
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#define SOC_RSA_MAX_BIT_LEN (3072)
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