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Merge branch 'fix/fix_p4_psram_20m_wrong_clk_div_v5.3' into 'release/v5.3'

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fix(psram): fixed p4 psram 20M wrong clk div (v5.3)

See merge request espressif/esp-idf!32255
This commit is contained in:
morris 2024-07-25 16:42:29 +08:00
commit e296941d36
1 changed files with 2 additions and 2 deletions
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4
components/esp_psram/device/esp_psram_impl_ap_hex.c
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@ -384,8 +384,8 @@ esp_err_t esp_psram_impl_enable(void)
s_configure_psram_ecc(); s_configure_psram_ecc();
#endif #endif
//enter MSPI slow mode to init PSRAM device registers //enter MSPI slow mode to init PSRAM device registers
psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_2, 40); psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_2, AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ / CONFIG_SPIRAM_SPEED);
psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_3, 40); psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_3, AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ / CONFIG_SPIRAM_SPEED);
psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_2, true); psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_2, true);
psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_3, true); psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_3, true);