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esp_hw_support: Update memory ptr location/property checks

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- to acknowledge the unused DCACHE added to DRAM for ESP32-S3

- For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is added to
  the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB (from 0x3C000000).
- But, if we try allocating memory from the 16 kB block and run an `esp_ptr_internal`
  check on that memory pointer, it fails as the address block from 0x3C000000
  corresponds to the external memory symbols SOC_DROM_LOW and SOC_EXTRAM_DATA_LOW.
  (E.g. freertos - If the IDLE task stack buffer gets allocated from this region,
  the firmware will abort due to this failure).
- Thus, the checks `esp_ptr_internal`, `esp_ptr_in_drom` and `esp_ptr_byte_accessible`
  have been updated to acknowledge this memory as a part of the DRAM.

Co-authored-by: Mahavir Jain <mahavir@espressif.com>
This commit is contained in:
Laukik Hase 2023-04-13 14:17:15 +05:30
parent f00c78b020
commit e0bedd19ab
No known key found for this signature in database
GPG Key ID: 11C571361F51A199
2 changed files with 31 additions and 1 deletions
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9
components/esp_hw_support/esp_memory_utils.c
View File

@ -42,6 +42,15 @@ bool esp_ptr_byte_accessible(const void *p)
#endif
#if CONFIG_SPIRAM
r |= esp_psram_check_ptr_addr(p);
#endif
#if CONFIG_ESP32S3_DATA_CACHE_16KB
/* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
* added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
* (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
* Though this memory lies in the external memory vaddr, it is no different
* from the internal RAM in terms of hardware attributes. It is a part of
* the internal RAM when added to the heap and is byte-accessible .*/
r |= (ip >= SOC_DROM_LOW && ip < (SOC_DROM_LOW + 0x4000));
#endif
return r;
}

23
components/esp_hw_support/include/esp_memory_utils.h
View File

@ -241,6 +241,17 @@ inline static bool esp_ptr_internal(const void *p) {
* additional check is required */
r |= ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH);
#endif
#if CONFIG_ESP32S3_DATA_CACHE_16KB
/* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
* added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
* (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
* Though this memory lies in the external memory vaddr, it is no different
* from the internal RAM in terms of hardware attributes and it is a part of
* the internal RAM when added to the heap.*/
r |= ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < (SOC_DROM_LOW + 0x4000));
#endif
return r;
}
@ -262,7 +273,17 @@ bool esp_ptr_external_ram(const void *p);
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_drom(const void *p) {
return ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < SOC_DROM_HIGH);
uint32_t drom_start_addr = SOC_DROM_LOW;
#if CONFIG_ESP32S3_DATA_CACHE_16KB
/* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is
* added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB
* (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000).
* The drom_start_addr has to be moved by 0x4000 (16kB) to accomodate
* this addition. */
drom_start_addr += 0x4000;
#endif
return ((intptr_t)p >= drom_start_addr && (intptr_t)p < SOC_DROM_HIGH);
}
/**