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fix(esp_hw_support): fix cache safe check function
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@ -173,6 +173,7 @@ menu "Hardware Settings"
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config ESP_SLEEP_CACHE_SAFE_ASSERTION
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config ESP_SLEEP_CACHE_SAFE_ASSERTION
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bool "Check the cache safety of the sleep wakeup code in sleep process"
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bool "Check the cache safety of the sleep wakeup code in sleep process"
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default n
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default n
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select ESP_PANIC_HANDLER_IRAM
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help
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help
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Enabling it will check the cache safety of the code before the flash power is ready after
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Enabling it will check the cache safety of the code before the flash power is ready after
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light sleep wakeup, and check PM_SLP_IRAM_OPT related code cache safety. This option is
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light sleep wakeup, and check PM_SLP_IRAM_OPT related code cache safety. This option is
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@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -507,7 +507,12 @@ FORCE_INLINE_ATTR bool light_sleep_uart_prepare(uint32_t pd_flags, int64_t sleep
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#if !SOC_PM_SUPPORT_TOP_PD || !CONFIG_ESP_CONSOLE_UART
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#if !SOC_PM_SUPPORT_TOP_PD || !CONFIG_ESP_CONSOLE_UART
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suspend_uarts();
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suspend_uarts();
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#else
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#else
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if (pd_flags & PMU_SLEEP_PD_TOP) {
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#ifdef CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
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#define FORCE_FLUSH_CONSOLE_UART 1
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#else
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#define FORCE_FLUSH_CONSOLE_UART 0
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#endif
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if (FORCE_FLUSH_CONSOLE_UART || (pd_flags & PMU_SLEEP_PD_TOP)) {
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if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) &&
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if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) &&
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// +1 is for cover the last character flush time
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// +1 is for cover the last character flush time
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(sleep_duration < (int64_t)((UART_LL_FIFO_DEF_LEN - uart_ll_get_txfifo_len(CONSOLE_UART_DEV) + 1) * UART_FLUSH_US_PER_CHAR) + SLEEP_UART_FLUSH_DONE_TO_SLEEP_US)) {
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(sleep_duration < (int64_t)((UART_LL_FIFO_DEF_LEN - uart_ll_get_txfifo_len(CONSOLE_UART_DEV) + 1) * UART_FLUSH_US_PER_CHAR) + SLEEP_UART_FLUSH_DONE_TO_SLEEP_US)) {
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