diff --git a/components/esp32/include/soc/rtc_cntl_reg.h b/components/esp32/include/soc/rtc_cntl_reg.h
index d99cec1864..40d65f21f6 100644
--- a/components/esp32/include/soc/rtc_cntl_reg.h
+++ b/components/esp32/include/soc/rtc_cntl_reg.h
@@ -240,7 +240,7 @@
 #define RTC_CNTL_TIME_VALID_S  30
 
 /* frequency of RTC slow clock, Hz */
-#define RTC_CTNL_SLOWCLK_FREQ   150000
+#define RTC_CNTL_SLOWCLK_FREQ   150000
 
 #define RTC_CNTL_TIME0_REG          (DR_REG_RTCCNTL_BASE + 0x10)
 /* RTC_CNTL_TIME_LO : RO ;bitpos:[31:0] ;default: 32'h0 ; */
diff --git a/components/newlib/time.c b/components/newlib/time.c
index 7595ab82b8..fc7dec6450 100644
--- a/components/newlib/time.c
+++ b/components/newlib/time.c
@@ -52,7 +52,7 @@ static uint64_t get_rtc_time_us()
     uint64_t low = READ_PERI_REG(RTC_CNTL_TIME0_REG);
     uint64_t high = READ_PERI_REG(RTC_CNTL_TIME1_REG);
     uint64_t ticks = (high << 32) | low;
-    return ticks * 100 / (RTC_CTNL_SLOWCLK_FREQ / 10000);    // scale RTC_CTNL_SLOWCLK_FREQ to avoid overflow
+    return ticks * 100 / (RTC_CNTL_SLOWCLK_FREQ / 10000);    // scale RTC_CNTL_SLOWCLK_FREQ to avoid overflow
 }
 #endif // WITH_RTC