ulp/lp-core: added gpio API for lp core as well as an example showcasing it.

components/ulp/lp_core/lp_core/include/ulp_lp_core_gpio.h

@@ -0,0 +1,155 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "hal/gpio_types.h"
+#include "hal/rtc_io_ll.h"
+
+typedef enum {
+    LP_IO_NUM_0 = 0,     /*!< GPIO0, input and output */
+    LP_IO_NUM_1 = 1,     /*!< GPIO1, input and output */
+    LP_IO_NUM_2 = 2,     /*!< GPIO2, input and output */
+    LP_IO_NUM_3 = 3,     /*!< GPIO3, input and output */
+    LP_IO_NUM_4 = 4,     /*!< GPIO4, input and output */
+    LP_IO_NUM_5 = 5,     /*!< GPIO5, input and output */
+    LP_IO_NUM_6 = 6,     /*!< GPIO6, input and output */
+    LP_IO_NUM_7 = 7,     /*!< GPIO7, input and output */
+} lp_io_num_t;
+
+/**
+ * @brief Initialize a rtcio pin
+ *
+ * @param lp_io_num The rtc io pin to initialize
+ */
+static inline void ulp_lp_core_gpio_init(lp_io_num_t lp_io_num)
+{
+    rtcio_ll_function_select(lp_io_num, RTCIO_FUNC_RTC);
+}
+
+/**
+ * @brief Enable output
+ *
+ * @param lp_io_num The rtc io pin to enable output for
+ */
+static inline void ulp_lp_core_gpio_output_enable(lp_io_num_t lp_io_num)
+{
+    rtcio_ll_output_enable(lp_io_num);
+}
+
+/**
+ * @brief Disable output
+ *
+ * @param lp_io_num The rtc io pin to disable output for
+ */
+static inline void ulp_lp_core_gpio_output_disable(lp_io_num_t lp_io_num)
+{
+    rtcio_ll_output_disable(lp_io_num);
+}
+
+/**
+ * @brief Enable input
+ *
+ * @param lp_io_num The rtc io pin to enable input for
+ */
+static inline void ulp_lp_core_gpio_input_enable(lp_io_num_t lp_io_num)
+{
+    rtcio_ll_input_enable(lp_io_num);
+}
+
+/**
+ * @brief Disable input
+ *
+ * @param lp_io_num The rtc io pin to disable input for
+ */
+static inline void ulp_lp_core_gpio_input_disable(lp_io_num_t lp_io_num)
+{
+    rtcio_ll_input_disable(lp_io_num);
+}
+
+/**
+ * @brief Set rtcio output level
+ *
+ * @param lp_io_num The rtc io pin to set the output level for
+ * @param level 0: output low; 1: output high.
+ */
+static inline void ulp_lp_core_gpio_set_level(lp_io_num_t lp_io_num, uint8_t level)
+{
+    rtcio_ll_set_level(lp_io_num, level);
+}
+
+/**
+ * @brief Get rtcio output level
+ *
+ * @param lp_io_num The rtc io pin to get the output level for
+ */
+static inline uint32_t ulp_lp_core_gpio_get_level(lp_io_num_t lp_io_num)
+{
+    return rtcio_ll_get_level(lp_io_num);
+}
+
+/**
+ * @brief Set rtcio output mode
+ *
+ * @param lp_io_num The rtc io pin to set the output mode for
+ * @param mode RTCIO_OUTPUT_NORMAL: normal, RTCIO_OUTPUT_OD: open drain
+ */
+static inline void ulp_lp_core_gpio_set_output_mode(lp_io_num_t lp_io_num, rtcio_ll_out_mode_t mode)
+{
+    rtcio_ll_output_mode_set(lp_io_num, mode);
+}
+
+/**
+ * @brief Enable internal pull-up resistor
+ *
+ * @param lp_io_num The rtc io pin to enable pull-up for
+ */
+static inline void ulp_lp_core_gpio_pullup_enable(lp_io_num_t lp_io_num)
+{
+    /* Enable internal weak pull-up */
+   rtcio_ll_pullup_enable(lp_io_num);
+}
+
+/**
+ * @brief Disable internal pull-up resistor
+ *
+ * @param lp_io_num The rtc io pin to disable pull-up for
+ */
+static inline void ulp_lp_core_gpio_pullup_disable(lp_io_num_t lp_io_num)
+{
+    /* Disable internal weak pull-up */
+    rtcio_ll_pullup_disable(lp_io_num);
+}
+
+/**
+ * @brief Enable internal pull-down resistor
+ *
+ * @param lp_io_num The rtc io pin to enable pull-down for
+ */
+static inline void ulp_lp_core_gpio_pulldown_enable(lp_io_num_t lp_io_num)
+{
+    /* Enable internal weak pull-down */
+    rtcio_ll_pulldown_enable(lp_io_num);
+}
+
+/**
+ * @brief Disable internal pull-down resistor
+ *
+ * @param lp_io_num The rtc io pin to disable pull-down for
+ */
+static inline void ulp_lp_core_gpio_pulldown_disable(lp_io_num_t lp_io_num)
+{
+    /* Enable internal weak pull-down */
+    rtcio_ll_pulldown_disable(lp_io_num);
+}
+
+#ifdef __cplusplus
+}
+#endif

components/ulp/test_apps/lp_core/main/CMakeLists.txt

@@ -2,6 +2,7 @@ set(app_sources "test_app_main.c" "test_lp_core.c")
 set(lp_core_sources         "lp_core/test_main.c")
 set(lp_core_sources_counter "lp_core/test_main_counter.c")
 set(lp_core_sources_set_timer_wakeup "lp_core/test_main_set_timer_wakeup.c")
+set(lp_core_sources_gpio "lp_core/test_main_gpio.c")
 
 idf_component_register(SRCS ${app_sources}
                        INCLUDE_DIRS "lp_core"
@@ -12,3 +13,4 @@ set(lp_core_exp_dep_srcs ${app_sources})
 ulp_embed_binary(lp_core_test_app "${lp_core_sources}" "${lp_core_exp_dep_srcs}")
 ulp_embed_binary(lp_core_test_app_counter "${lp_core_sources_counter}" "${lp_core_exp_dep_srcs}")
 ulp_embed_binary(lp_core_test_app_set_timer_wakeup "${lp_core_sources_set_timer_wakeup}" "${lp_core_exp_dep_srcs}")
+ulp_embed_binary(lp_core_test_app_gpio "${lp_core_sources_gpio}" "${lp_core_exp_dep_srcs}")

components/ulp/test_apps/lp_core/main/lp_core/test_main_gpio.c

@@ -0,0 +1,35 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "ulp_lp_core_utils.h"
+#include "ulp_lp_core_gpio.h"
+
+volatile uint32_t gpio_test_finished;
+volatile uint32_t gpio_test_succeeded;
+
+
+int main (void)
+{
+    ulp_lp_core_gpio_init(LP_IO_NUM_0);
+
+    ulp_lp_core_gpio_input_enable(LP_IO_NUM_0);
+    ulp_lp_core_gpio_output_enable(LP_IO_NUM_0);
+
+    ulp_lp_core_gpio_set_level(LP_IO_NUM_0, 0);
+    gpio_test_succeeded = (ulp_lp_core_gpio_get_level(LP_IO_NUM_0) == 0);
+
+    ulp_lp_core_gpio_set_level(LP_IO_NUM_0, 1);
+    gpio_test_succeeded &= (ulp_lp_core_gpio_get_level(LP_IO_NUM_0) == 1);
+
+    ulp_lp_core_gpio_set_level(LP_IO_NUM_0, 0);
+    gpio_test_succeeded &= (ulp_lp_core_gpio_get_level(LP_IO_NUM_0) == 0);
+
+    gpio_test_finished = 1;
+
+    return 0;
+}

components/ulp/test_apps/lp_core/main/test_lp_core.c

@@ -10,6 +10,7 @@
 #include "lp_core_test_app.h"
 #include "lp_core_test_app_counter.h"
 #include "lp_core_test_app_set_timer_wakeup.h"
+#include "lp_core_test_app_gpio.h"
 #include "ulp_lp_core.h"
 #include "ulp_lp_core_lp_timer_shared.h"
 #include "test_shared.h"
@@ -28,6 +29,9 @@ extern const uint8_t lp_core_main_counter_bin_end[]   asm("_binary_lp_core_test_
 extern const uint8_t lp_core_main_set_timer_wakeup_bin_start[] asm("_binary_lp_core_test_app_set_timer_wakeup_bin_start");
 extern const uint8_t lp_core_main_set_timer_wakeup_bin_end[]   asm("_binary_lp_core_test_app_set_timer_wakeup_bin_end");
 
+extern const uint8_t lp_core_main_gpio_bin_start[] asm("_binary_lp_core_test_app_gpio_bin_start");
+extern const uint8_t lp_core_main_gpio_bin_end[]   asm("_binary_lp_core_test_app_gpio_bin_end");
+
 static void load_and_start_lp_core_firmware(ulp_lp_core_cfg_t* cfg, const uint8_t* firmware_start, const uint8_t* firmware_end)
 {
     TEST_ASSERT(ulp_lp_core_load_binary(firmware_start,
@@ -284,3 +288,19 @@ TEST_CASE("LP core can schedule next wake-up time by itself", "[ulp]")
 
     TEST_ASSERT_INT_WITHIN_MESSAGE(5, expected_run_count, ulp_set_timer_wakeup_counter, "LP Core did not wake up the expected number of times");
 }
+
+TEST_CASE("LP core gpio tests", "[ulp]")
+{
+    /* Load ULP firmware and start the coprocessor */
+    ulp_lp_core_cfg_t cfg = {
+        .wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_LP_TIMER,
+        .lp_timer_sleep_duration_us = LP_TIMER_TEST_SLEEP_DURATION_US,
+    };
+
+    load_and_start_lp_core_firmware(&cfg, lp_core_main_gpio_bin_start, lp_core_main_gpio_bin_end);
+
+    while(!ulp_gpio_test_finished) {
+    }
+
+    TEST_ASSERT_TRUE(ulp_gpio_test_succeeded);
+}

docs/en/api-reference/system/ulp-risc-v.rst

@@ -191,17 +191,17 @@ Keeping this in mind, here are some ways that may help you debug you ULP RISC-V
 
  * Share program state through shared variables: as described in :ref:`ulp-riscv-access-variables`, both the main CPU and the ULP core can easily access global variables in RTC memory. Writing state information to such a variable from the ULP and reading it from the main CPU can help you discern what is happening on the ULP core. The downside of this approach is that it requires the main CPU to be awake, which will not always be the case. Keeping the main CPU awake might even, in some cases, mask problems, as some issues may only occur when certain power domains are powered down.
 
- * Use the bit-banged UART driver to print: the ULP RISC-V component comes with a low-speed bit-banged UART TX driver that can be used for printing information independently of the main CPU state. See :example:`system/ulp_riscv/uart_print` for an example of how to use this driver.
+ * Use the bit-banged UART driver to print: the ULP RISC-V component comes with a low-speed bit-banged UART TX driver that can be used for printing information independently of the main CPU state. See :example:`system/ulp/ulp_riscv/uart_print` for an example of how to use this driver.
 
  * Trap signal: the ULP RISC-V has a hardware trap that will trigger under certain conditions, e.g., illegal instruction. This will cause the main CPU to be woken up with the wake-up cause :cpp:enumerator:`ESP_SLEEP_WAKEUP_COCPU_TRAP_TRIG`.
 
 Application Examples
 --------------------
 
-* ULP RISC-V Coprocessor polls GPIO while main CPU is in deep sleep: :example:`system/ulp_riscv/gpio`.
-* ULP RISC-V Coprocessor uses bit-banged UART driver to print: :example:`system/ulp_riscv/uart_print`.
-* ULP RISC-V Coprocessor reads external temperature sensor while main CPU is in deep sleep: :example:`system/ulp_riscv/ds18b20_onewire`.
-* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in Deep-sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp_riscv/i2c`.
+* ULP RISC-V Coprocessor polls GPIO while main CPU is in deep sleep: :example:`system/ulp/ulp_riscv/gpio`.
+* ULP RISC-V Coprocessor uses bit-banged UART driver to print: :example:`system/ulp/ulp_riscv/uart_print`.
+* ULP RISC-V Coprocessor reads external temperature sensor while main CPU is in deep sleep: :example:`system/ulp/ulp_riscv/ds18b20_onewire`.
+* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in Deep-sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp/ulp_riscv/i2c`.
 
 API Reference
 -------------

docs/en/api-reference/system/ulp.rst

@@ -174,8 +174,8 @@ Declaration of the entry point symbol comes from the generated header file menti
 Application Examples
 --------------------
 
-* ULP FSM Coprocessor counts pulses on an IO while main CPU is in deep sleep: :example:`system/ulp_fsm/ulp`.
-* ULP FSM Coprocessor polls ADC in while main CPU is in deep sleep: :example:`system/ulp_fsm/ulp_adc`.
+* ULP FSM Coprocessor counts pulses on an IO while main CPU is in deep sleep: :example:`system/ulp/ulp_fsm/ulp`.
+* ULP FSM Coprocessor polls ADC in while main CPU is in deep sleep: :example:`system/ulp/ulp_fsm/ulp_adc`.
 
 API Reference
 -------------

docs/zh_CN/api-reference/system/ulp-risc-v.rst

@@ -191,17 +191,17 @@ RTC I2C 控制器提供了在 RTC 电源域中作为 I2C 主机的功能。ULP R
 
  * 通过共享变量查看程序状态：如 :ref:`ulp-riscv-access-variables` 中所述，主 CPU 以及 ULP 内核都可以轻松访问 RTC 内存中的全局变量。通过 ULP 向该变量中写入状态信息，然后通过主 CPU 读取状态信息，可帮助您了解 ULP 内核的状态。该方法的缺点在于它要求主 CPU 一直处于唤醒状态，但现实情况可能并非如此。有时，保持主 CPU 处于唤醒状态还可能会掩盖一些问题，因为某些问题可能仅在特定电源域断电时才会出现。
 
- * 使用 bit-banged UART 驱动程序打印：ULP RISC-V 组件中有一个低速 bit-banged UART TX 驱动程序，可用于打印独立于主 CPU 状态的信息。有关如何使用此驱动程序的示例，请参阅 :example:`system/ulp_riscv/uart_print`。
+ * 使用 bit-banged UART 驱动程序打印：ULP RISC-V 组件中有一个低速 bit-banged UART TX 驱动程序，可用于打印独立于主 CPU 状态的信息。有关如何使用此驱动程序的示例，请参阅 :example:`system/ulp/ulp_riscv/uart_print`。
 
  * 陷阱信号：ULP RISC-V 有一个硬件陷阱，将在特定条件下触发，例如非法指令。这将导致主 CPU 被 :cpp:enumerator:`ESP_SLEEP_WAKEUP_COCPU_TRAP_TRIG` 唤醒。
 
 应用示例
 --------------------
 
-* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器轮询 GPIO：:example:`system/ulp_riscv/gpio`。
-* ULP RISC-V 协处理器使用 bit-banged UART 驱动程序打印：:example:`system/ulp_riscv/uart_print`.
-* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部温度传感器：:example:`system/ulp_riscv/ds18b20_onewire`。
-* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部 I2C 温度和湿度传感器 (BMP180)，达到阈值时唤醒主 CPU：:example:`system/ulp_riscv/i2c`.
+* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器轮询 GPIO：:example:`system/ulp/ulp_riscv/gpio`。
+* ULP RISC-V 协处理器使用 bit-banged UART 驱动程序打印：:example:`system/ulp/ulp_riscv/uart_print`.
+* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部温度传感器：:example:`system/ulp/ulp_riscv/ds18b20_onewire`。
+* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部 I2C 温度和湿度传感器 (BMP180)，达到阈值时唤醒主 CPU：:example:`system/ulp/ulp_riscv/i2c`.
 
 API 参考
 -------------

docs/zh_CN/api-reference/system/ulp.rst

@@ -174,8 +174,8 @@ ULP FSM 协处理器代码由汇编语言编写，使用 `binutils-esp32ulp 工
 应用示例
 --------------------
 
-* 主处理器处于 Deep-sleep 状态时，ULP FSM 协处理器对 IO 脉冲进行计数：:example:`system/ulp_fsm/ulp`。
-* 主处理器处于 Deep-sleep 状态时，ULP FSM 协处理器轮询 ADC：:example:`system/ulp_fsm/ulp_adc`。
+* 主处理器处于 Deep-sleep 状态时，ULP FSM 协处理器对 IO 脉冲进行计数：:example:`system/ulp/ulp_fsm/ulp`。
+* 主处理器处于 Deep-sleep 状态时，ULP FSM 协处理器轮询 ADC：:example:`system/ulp/ulp_fsm/ulp_adc`。
 
 API 参考
 -------------

examples/system/.build-test-rules.yml

@@ -84,10 +84,6 @@ examples/system/light_sleep:
       temporary: true
       reason: target(s) not supported yet
 
-examples/system/lp_core/lp_i2c:
-  enable:
-    - if: SOC_LP_I2C_SUPPORTED == 1
-
 examples/system/ota/advanced_https_ota:
   disable:
     - if: IDF_TARGET == "esp32h2"
@@ -175,45 +171,53 @@ examples/system/task_watchdog:
       temporary: true
       reason: target esp32c2 is not supported yet
 
-examples/system/ulp_fsm/ulp:
+examples/system/ulp/lp_core/gpio:
+  enable:
+    - if: SOC_LP_CORE_SUPPORTED == 1
+
+examples/system/ulp/lp_core/lp_i2c:
+  enable:
+    - if: SOC_LP_I2C_SUPPORTED == 1
+
+examples/system/ulp/ulp_fsm/ulp:
   disable:
     - if: SOC_ULP_FSM_SUPPORTED != 1
 
-examples/system/ulp_fsm/ulp_adc:
+examples/system/ulp/ulp_fsm/ulp_adc:
   enable:
     - if: IDF_TARGET in ["esp32", "esp32s3"]
       temporary: true
       reason: the other targets are not tested yet
 
-examples/system/ulp_riscv/adc:
+examples/system/ulp/ulp_riscv/adc:
   enable:
-    - if: IDF_TARGET in ["esp32s2", "esp32s3"]
+    - if: SOC_RISCV_COPROC_SUPPORTED == 1
       temporary: true
       reason: the other targets are not tested yet
 
-examples/system/ulp_riscv/ds18b20_onewire:
+examples/system/ulp/ulp_riscv/ds18b20_onewire:
   enable:
     - if: IDF_TARGET == "esp32s2"
       temporary: true
       reason: the other targets are not tested yet
 
-examples/system/ulp_riscv/gpio:
+examples/system/ulp/ulp_riscv/gpio:
   enable:
-    - if: IDF_TARGET in ["esp32s2", "esp32s3"]
+    - if: SOC_RISCV_COPROC_SUPPORTED == 1
       temporary: true
       reason: the other targets are not tested yet
 
-examples/system/ulp_riscv/gpio_interrupt:
+examples/system/ulp/ulp_riscv/gpio_interrupt:
   enable:
-    - if: IDF_TARGET in ["esp32s2", "esp32s3"]
+    - if: SOC_RISCV_COPROC_SUPPORTED == 1
       temporary: true
       reason: the other targets are not tested yet
 
-examples/system/ulp_riscv/i2c:
+examples/system/ulp/ulp_riscv/i2c:
   enable:
     - if: SOC_RISCV_COPROC_SUPPORTED == 1
 
-examples/system/ulp_riscv/uart_print:
+examples/system/ulp/ulp_riscv/uart_print:
   enable:
     - if: SOC_RISCV_COPROC_SUPPORTED == 1
 

examples/system/ulp/lp_core/gpio/CMakeLists.txt

@@ -0,0 +1,6 @@
+# The following lines of boilerplate have to be in your project's CMakeLists
+# in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.16)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(lp_core_gpio_example)

examples/system/ulp/lp_core/gpio/README.md

@@ -0,0 +1,31 @@
+| Supported Targets | ESP32-C6 |
+| ----------------- | -------- |
+
+# LP Core simple example with GPIO Polling:
+
+This example demonstrates how to program the ULP coprocessor to poll a gpio and wakeup the main CPU when it changes its state;
+
+ULP program written in C can be found across `ulp/main.c`. The build system compiles and links this program, converts it into binary format, and embeds it into the .rodata section of the ESP-IDF application.
+
+At runtime, the application running inside the main CPU loads ULP program into the `RTC_SLOW_MEM` memory region using `ulp_lp_core_load_binary` function. The main code then configures the ULP wakeup period and starts the coprocessor by using `ulp_lp_core_run`. Once the ULP program is started, it runs periodically, with the period set by the main program. The main program enables ULP wakeup source and puts the chip into deep sleep mode.
+
+When the ULP program finds an state changing in the pin, it saves the current state and sends a wakeup signal to the main CPU.
+
+Upon wakeup, the main program prints the current level of the measured gpio and go back to the deep sleep.
+
+In this example the input signal is connected to GPIO0. Note that this pin was chosen because most development boards have a button connected to it, so the pulses to be counted can be generated by pressing the button. For real world applications this is not a good choice of a pin, because GPIO0 also acts as a bootstrapping pin. To change the pin number, check the chip pin list document and adjust `WAKEUP_PIN`  macros in main.c and lp_core_gpio_example_main.c.
+
+
+## Example output
+
+```
+Not a ULP wakeup, initializing it!
+Entering in deep sleep
+
+...
+
+ULP woke up the main CPU!
+ULP read changes in GPIO_0 current is: High
+Entering in deep sleep
+
+```

examples/system/ulp/lp_core/gpio/main/CMakeLists.txt

@@ -0,0 +1,27 @@
+# Set usual component variables
+set(app_sources "lp_core_gpio_example_main.c")
+
+idf_component_register(SRCS ${app_sources}
+                       REQUIRES ulp
+                       WHOLE_ARCHIVE)
+
+#
+# ULP support additions to component CMakeLists.txt.
+#
+# 1. The ULP app name must be unique (if multiple components use ULP).
+set(ulp_app_name ulp_${COMPONENT_NAME})
+#
+# 2. Specify all C and Assembly source files.
+#    Files should be placed into a separate directory (in this case, ulp/),
+#    which should not be added to COMPONENT_SRCS.
+set(ulp_sources "ulp/main.c")
+
+#
+# 3. List all the component source files which include automatically
+#    generated ULP export file, ${ulp_app_name}.h:
+set(ulp_exp_dep_srcs ${app_sources})
+
+#
+# 4. Call function to build ULP binary and embed in project using the argument
+#    values above.
+ulp_embed_binary(${ulp_app_name} "${ulp_sources}" "${ulp_exp_dep_srcs}")

examples/system/ulp/lp_core/gpio/main/lp_core_gpio_example_main.c

@@ -0,0 +1,76 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
+/* LP core gpio example
+
+   This example code is in the Public Domain (or CC0 licensed, at your option.)
+
+   Unless required by applicable law or agreed to in writing, this
+   software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+   CONDITIONS OF ANY KIND, either express or implied.
+*/
+
+#include <stdio.h>
+#include "esp_sleep.h"
+#include "driver/gpio.h"
+#include "driver/rtc_io.h"
+#include "ulp_lp_core.h"
+#include "ulp_main.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+extern const uint8_t ulp_main_bin_start[] asm("_binary_ulp_main_bin_start");
+extern const uint8_t ulp_main_bin_end[]   asm("_binary_ulp_main_bin_end");
+
+static void init_ulp_program(void);
+
+#define WAKEUP_PIN GPIO_NUM_0
+
+void app_main(void)
+{
+    /* Initialize selected GPIO as RTC IO, enable input, disable pullup and pulldown */
+    rtc_gpio_init(WAKEUP_PIN);
+    rtc_gpio_set_direction(WAKEUP_PIN, RTC_GPIO_MODE_INPUT_ONLY);
+    rtc_gpio_pulldown_dis(WAKEUP_PIN);
+    rtc_gpio_pullup_dis(WAKEUP_PIN);
+
+    esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
+    /* not a wakeup from ULP, load the firmware */
+    if (cause != ESP_SLEEP_WAKEUP_ULP) {
+        printf("Not a ULP wakeup, initializing it! \n");
+        init_ulp_program();
+    }
+
+    /* ULP read and detected a change in GPIO_0, prints */
+    if (cause == ESP_SLEEP_WAKEUP_ULP) {
+        printf("ULP woke up the main CPU! \n");
+        printf("ULP read changes in GPIO_0 current is: %s \n",
+            (bool)(ulp_gpio_level_previous == 0) ? "Low" : "High" );
+    }
+
+    /* Go back to sleep, only the ULP will run */
+    printf("Entering in deep sleep\n\n");
+
+    /* Small delay to ensure the messages are printed */
+
+    ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup());
+
+    esp_deep_sleep_start();
+}
+
+static void init_ulp_program(void)
+{
+    esp_err_t err = ulp_lp_core_load_binary(ulp_main_bin_start, (ulp_main_bin_end - ulp_main_bin_start));
+    ESP_ERROR_CHECK(err);
+
+    /* Start the program */
+    ulp_lp_core_cfg_t cfg = {
+        .wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_LP_TIMER,
+        .lp_timer_sleep_duration_us = 10000,
+    };
+
+    err = ulp_lp_core_run(&cfg);
+    ESP_ERROR_CHECK(err);
+}

examples/system/ulp/lp_core/gpio/main/ulp/main.c

@@ -0,0 +1,39 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
+#include <stdint.h>
+#include <stdbool.h>
+#include "ulp_lp_core.h"
+#include "ulp_lp_core_utils.h"
+#include "ulp_lp_core_gpio.h"
+
+#define DEBOUNCE_SAMPLES 5
+#define WAKEUP_PIN LP_IO_NUM_0
+
+static int debounce_count;
+
+/* this variable will be exported as a public symbol, visible from main CPU: */
+bool gpio_level_previous = false;
+
+
+int main (void)
+{
+    bool gpio_level = (bool)ulp_lp_core_gpio_get_level(WAKEUP_PIN);
+    /* Debounce the input, only trigger a wakeup if the changed value is stable for DEBOUNCE_SAMPLES samples */
+    if (gpio_level != gpio_level_previous) {
+        debounce_count++;
+    } else {
+        debounce_count = 0;
+    }
+
+    /* Wakes up the main CPU if pin changed its state */
+    if(debounce_count >= DEBOUNCE_SAMPLES) {
+        gpio_level_previous = gpio_level;
+        ulp_lp_core_wakeup_main_processor();
+    }
+
+    /* ulp_lp_core_halt() is called automatically when main exits */
+    return 0;
+}

examples/system/ulp/lp_core/gpio/sdkconfig.defaults

@@ -1,6 +1,6 @@
 # Enable ULP
 CONFIG_ULP_COPROC_ENABLED=y
-CONFIG_ULP_COPROC_TYPE_RISCV=y
+CONFIG_ULP_COPROC_LP_CORE=y
 CONFIG_ULP_COPROC_RESERVE_MEM=4096
 # Set log level to Warning to produce clean output
 CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

examples/system/ulp/ulp_fsm/ulp/main/ulp/pulse_cnt.S

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */

examples/system/ulp/ulp_fsm/ulp/main/ulp/wake_up.S

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_fsm/ulp/main/ulp_example_main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP Example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_fsm/ulp/pytest_ulp_fsm.py

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
 
 import logging

examples/system/ulp/ulp_fsm/ulp_adc/main/ulp/adc.S

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_fsm/ulp_adc/main/ulp/example_config.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_fsm/ulp_adc/main/ulp_adc_example_main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP Example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_fsm/ulp_adc/pytest_ulp_fsm_adc.py

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
 
 import logging

examples/system/ulp/ulp_riscv/adc/main/ulp/example_config.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/adc/main/ulp/main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/adc/main/ulp_riscv_adc_example_main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/ds18b20_onewire/main/ulp/main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP-RISC-V example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_riscv/ds18b20_onewire/main/ulp_riscv_ds18b20_example_main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP riscv example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_riscv/gpio/main/ulp/main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP-RISC-V example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_riscv/gpio/main/ulp_riscv_example_main.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
 /* ULP riscv DS18B20 1wire temperature sensor example
 
    This example code is in the Public Domain (or CC0 licensed, at your option.)

examples/system/ulp/ulp_riscv/gpio/pytest_ulp_riscv_gpio.py

@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
 
 import time

examples/system/ulp/ulp_riscv/gpio_interrupt/main/ulp/main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/gpio_interrupt/main/ulp_riscv_gpio_intr_example_main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/i2c/main/bmp180_defs.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/i2c/main/ulp/main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/uart_print/main/ulp/main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/uart_print/main/ulp_riscv_example_main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */

examples/system/ulp/ulp_riscv/uart_print/sdkconfig.defaults

@@ -0,0 +1,9 @@
+# Enable ULP
+CONFIG_ULP_COPROC_ENABLED=y
+CONFIG_ULP_COPROC_RISCV=y
+CONFIG_ULP_COPROC_RESERVE_MEM=4096
+# Set log level to Warning to produce clean output
+CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
+CONFIG_BOOTLOADER_LOG_LEVEL=2
+CONFIG_LOG_DEFAULT_LEVEL_WARN=y
+CONFIG_LOG_DEFAULT_LEVEL=2

tools/ci/check_copyright_ignore.txt

@@ -1571,15 +1571,6 @@ examples/system/sysview_tracing_heap_log/example_test.py
 examples/system/sysview_tracing_heap_log/main/sysview_heap_log.c
 examples/system/task_watchdog/example_test.py
 examples/system/task_watchdog/main/task_watchdog_example_main.c
-examples/system/ulp_fsm/ulp/example_test.py
-examples/system/ulp_fsm/ulp/main/ulp_example_main.c
-examples/system/ulp_fsm/ulp_adc/example_test.py
-examples/system/ulp_fsm/ulp_adc/main/ulp_adc_example_main.c
-examples/system/ulp_riscv/ds18b20_onewire/main/ulp/main.c
-examples/system/ulp_riscv/ds18b20_onewire/main/ulp_riscv_ds18b20_example_main.c
-examples/system/ulp_riscv/gpio/example_test.py
-examples/system/ulp_riscv/gpio/main/ulp/main.c
-examples/system/ulp_riscv/gpio/main/ulp_riscv_example_main.c
 examples/system/unit_test/components/testable/include/testable.h
 examples/system/unit_test/components/testable/mean.c
 examples/system/unit_test/components/testable/test/test_mean.c

tools/ci/mypy_ignore_list.txt

@@ -131,8 +131,8 @@ examples/system/startup_time/example_test.py
 examples/system/sysview_tracing/example_test.py
 examples/system/sysview_tracing_heap_log/example_test.py
 examples/system/task_watchdog/example_test.py
-examples/system/ulp_fsm/ulp/example_test.py
-examples/system/ulp_fsm/ulp_adc/example_test.py
+examples/system/ulp/ulp_fsm/ulp/example_test.py
+examples/system/ulp/ulp_fsm/ulp_adc/example_test.py
 examples/system/unit_test/example_test.py
 examples/wifi/iperf/iperf_test.py
 tools/ble/lib_ble_client.py

tools/ci/test_build_system_spaces.py

@@ -166,11 +166,11 @@ class PathsWithSpaces(unittest.TestCase):
         idf_py('build', env_vars=self.ENV, idf_path=self.IDF_PATH_WITH_SPACES, workdir=build_path)
 
     def test_build_ulp_fsm(self) -> None:
-        build_path = self._copy_app_to(os.path.join('examples', 'system', 'ulp_fsm', 'ulp'), 'test app')
+        build_path = self._copy_app_to(os.path.join('examples', 'system', 'ulp', 'ulp_fsm', 'ulp'), 'test app')
         idf_py('build', env_vars=self.ENV, idf_path=self.IDF_PATH_WITH_SPACES, workdir=build_path)
 
     def test_build_ulp_riscv(self) -> None:
-        build_path = self._copy_app_to(os.path.join('examples', 'system', 'ulp_riscv', 'gpio'), 'test app')
+        build_path = self._copy_app_to(os.path.join('examples', 'system', 'ulp', 'ulp_riscv', 'gpio'), 'test app')
         idf_py('-DIDF_TARGET=esp32s2', 'build', env_vars=self.ENV, idf_path=self.IDF_PATH_WITH_SPACES,
                workdir=build_path)