mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
refactor(sdm): add check and error info to the clock division
This commit is contained in:
parent
d8d57e1965
commit
d9d316b97d
@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -25,6 +25,7 @@
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#include "hal/gpio_hal.h"
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#include "hal/gpio_hal.h"
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#include "hal/sdm_hal.h"
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#include "hal/sdm_hal.h"
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#include "hal/sdm_ll.h"
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#include "hal/sdm_ll.h"
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#include "hal/hal_utils.h"
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#include "soc/sdm_periph.h"
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#include "soc/sdm_periph.h"
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#include "esp_private/esp_clk.h"
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#include "esp_private/esp_clk.h"
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#include "esp_private/io_mux.h"
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#include "esp_private/io_mux.h"
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@ -242,7 +243,20 @@ esp_err_t sdm_new_channel(const sdm_config_t *config, sdm_channel_handle_t *ret_
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chan->gpio_num = config->gpio_num;
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chan->gpio_num = config->gpio_num;
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// set prescale based on sample rate
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// set prescale based on sample rate
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uint32_t prescale = src_clk_hz / config->sample_rate_hz;
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uint32_t prescale = 0;
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hal_utils_clk_info_t clk_info = {
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.src_freq_hz = src_clk_hz,
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.exp_freq_hz = config->sample_rate_hz,
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.max_integ = SDM_LL_PRESCALE_MAX + 1,
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.min_integ = 1,
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.round_opt = HAL_DIV_ROUND,
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};
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uint32_t actual_freq = hal_utils_calc_clk_div_integer(&clk_info, &prescale);
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ESP_GOTO_ON_FALSE(actual_freq, ESP_ERR_INVALID_ARG, err, TAG,
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"sample rate out of range [%"PRIu32", %"PRIu32"] Hz", src_clk_hz / SDM_LL_PRESCALE_MAX, src_clk_hz);
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if (actual_freq != config->sample_rate_hz) {
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ESP_LOGW(TAG, "precision loss, expected sample rate %"PRIu32" Hz runs at %"PRIu32" Hz", config->sample_rate_hz, actual_freq);
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}
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sdm_ll_set_prescale(group->hal.dev, chan_id, prescale);
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sdm_ll_set_prescale(group->hal.dev, chan_id, prescale);
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chan->sample_rate_hz = src_clk_hz / prescale;
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chan->sample_rate_hz = src_clk_hz / prescale;
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// preset the duty cycle to zero
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// preset the duty cycle to zero
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], sdn_prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], sdn_prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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@ -15,6 +15,8 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#define SDM_LL_PRESCALE_MAX 256
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/**
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/**
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* @brief Set Sigma-delta enable
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* @brief Set Sigma-delta enable
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*
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*
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@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
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*/
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*/
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
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{
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{
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HAL_ASSERT(prescale && prescale <= 256);
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HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
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}
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}
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