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refactor(sdm): add check and error info to the clock division

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This commit is contained in:
laokaiyao 2024-09-09 12:43:22 +08:00 committed by Kevin (Lao Kaiyao)
parent d8d57e1965
commit d9d316b97d
9 changed files with 40 additions and 10 deletions
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18
components/esp_driver_sdm/src/sdm.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -25,6 +25,7 @@
#include "hal/gpio_hal.h"
#include "hal/sdm_hal.h"
#include "hal/sdm_ll.h"
#include "hal/hal_utils.h"
#include "soc/sdm_periph.h"
#include "esp_private/esp_clk.h"
#include "esp_private/io_mux.h"
@ -242,7 +243,20 @@ esp_err_t sdm_new_channel(const sdm_config_t *config, sdm_channel_handle_t *ret_
chan->gpio_num = config->gpio_num;
// set prescale based on sample rate
uint32_t prescale = src_clk_hz / config->sample_rate_hz;
uint32_t prescale = 0;
hal_utils_clk_info_t clk_info = {
.src_freq_hz = src_clk_hz,
.exp_freq_hz = config->sample_rate_hz,
.max_integ = SDM_LL_PRESCALE_MAX + 1,
.min_integ = 1,
.round_opt = HAL_DIV_ROUND,
};
uint32_t actual_freq = hal_utils_calc_clk_div_integer(&clk_info, &prescale);
ESP_GOTO_ON_FALSE(actual_freq, ESP_ERR_INVALID_ARG, err, TAG,
"sample rate out of range [%"PRIu32", %"PRIu32"] Hz", src_clk_hz / SDM_LL_PRESCALE_MAX, src_clk_hz);
if (actual_freq != config->sample_rate_hz) {
ESP_LOGW(TAG, "precision loss, expected sample rate %"PRIu32" Hz runs at %"PRIu32" Hz", config->sample_rate_hz, actual_freq);
}
sdm_ll_set_prescale(group->hal.dev, chan_id, prescale);
chan->sample_rate_hz = src_clk_hz / prescale;
// preset the duty cycle to zero

4
components/hal/esp32/include/hal/sdm_ll.h
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@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32c3/include/hal/sdm_ll.h
View File

@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32c5/include/hal/sdm_ll.h
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@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], sdn_prescale, prescale - 1);
}

4
components/hal/esp32c6/include/hal/sdm_ll.h
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@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32h2/include/hal/sdm_ll.h
View File

@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32p4/include/hal/sdm_ll.h
View File

@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32s2/include/hal/sdm_ll.h
View File

@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}

4
components/hal/esp32s3/include/hal/sdm_ll.h
View File

@ -15,6 +15,8 @@
extern "C" {
#endif
#define SDM_LL_PRESCALE_MAX 256
/**
* @brief Set Sigma-delta enable
*
@ -49,7 +51,7 @@ static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8
*/
static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
{
HAL_ASSERT(prescale && prescale <= 256);
HAL_ASSERT(prescale && prescale <= SDM_LL_PRESCALE_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale - 1);
}