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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Flash encryption: Temporary fix for issue with stale cache reads
Seems doing certain kinds of short reads while flash encryption is enabled will return stale data. This fixes it, but is probably a little heavy-handed performance wise.
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@ -15,7 +15,8 @@
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#define __ESP32_FLASH_ENCRYPT_H
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#define __ESP32_FLASH_ENCRYPT_H
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#include <stdbool.h>
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#include <stdbool.h>
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#include <esp_err.h>
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_spi_flash.h"
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#include "esp_spi_flash.h"
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#include "soc/efuse_reg.h"
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#include "soc/efuse_reg.h"
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@ -30,9 +31,17 @@
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*
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*
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* @return true if flash encryption is enabled.
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* @return true if flash encryption is enabled.
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*/
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*/
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static inline bool esp_flash_encryption_enabled(void) {
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static inline IRAM_ATTR bool esp_flash_encryption_enabled(void) {
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uint32_t flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
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uint32_t flash_crypt_cnt = REG_GET_FIELD(EFUSE_BLK0_RDATA0_REG, EFUSE_RD_FLASH_CRYPT_CNT);
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return __builtin_parity(flash_crypt_cnt) == 1;
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/* __builtin_parity is in flash, so we calculate parity inline */
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bool enabled = false;
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while(flash_crypt_cnt) {
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if (flash_crypt_cnt & 1) {
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enabled = !enabled;
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}
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flash_crypt_cnt >>= 1;
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}
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return enabled;
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}
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}
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/* @brief Update on-device flash encryption
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/* @brief Update on-device flash encryption
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@ -28,6 +28,7 @@
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#include "esp_ipc.h"
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#include "esp_ipc.h"
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#include "esp_attr.h"
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#include "esp_attr.h"
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#include "esp_spi_flash.h"
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#include "esp_spi_flash.h"
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#include "esp_flash_encrypt.h"
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#include "esp_log.h"
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#include "esp_log.h"
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#include "cache_utils.h"
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#include "cache_utils.h"
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@ -52,8 +53,10 @@
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This ensures stale cache entries are never read after fresh calls
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This ensures stale cache entries are never read after fresh calls
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to spi_flash_mmap(), while keeping the number of cache flushes to a
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to spi_flash_mmap(), while keeping the number of cache flushes to a
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minimum.
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minimum.
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Returns true if cache was flushed.
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*/
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*/
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static void spi_flash_ensure_unmodified_region(size_t start_addr, size_t length);
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static bool spi_flash_ensure_unmodified_region(size_t start_addr, size_t length);
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typedef struct mmap_entry_{
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typedef struct mmap_entry_{
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uint32_t handle;
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uint32_t handle;
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@ -89,6 +92,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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const void** out_ptr, spi_flash_mmap_handle_t* out_handle)
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const void** out_ptr, spi_flash_mmap_handle_t* out_handle)
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{
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{
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esp_err_t ret;
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esp_err_t ret;
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bool did_flush, need_flush = false;
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mmap_entry_t* new_entry = (mmap_entry_t*) malloc(sizeof(mmap_entry_t));
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mmap_entry_t* new_entry = (mmap_entry_t*) malloc(sizeof(mmap_entry_t));
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if (new_entry == 0) {
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if (new_entry == 0) {
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return ESP_ERR_NO_MEM;
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return ESP_ERR_NO_MEM;
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@ -102,7 +106,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_disable_interrupts_caches_and_other_cpu();
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spi_flash_ensure_unmodified_region(src_addr, size);
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did_flush = spi_flash_ensure_unmodified_region(src_addr, size);
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if (s_mmap_page_refcnt[0] == 0) {
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if (s_mmap_page_refcnt[0] == 0) {
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spi_flash_mmap_init();
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spi_flash_mmap_init();
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@ -159,8 +163,11 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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(DPORT_PRO_FLASH_MMU_TABLE[i] == entry_val &&
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(DPORT_PRO_FLASH_MMU_TABLE[i] == entry_val &&
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DPORT_APP_FLASH_MMU_TABLE[i] == entry_val));
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DPORT_APP_FLASH_MMU_TABLE[i] == entry_val));
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if (s_mmap_page_refcnt[i] == 0) {
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if (s_mmap_page_refcnt[i] == 0) {
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DPORT_PRO_FLASH_MMU_TABLE[i] = entry_val;
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if (DPORT_PRO_FLASH_MMU_TABLE[i] != entry_val || DPORT_APP_FLASH_MMU_TABLE[i] != entry_val) {
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DPORT_APP_FLASH_MMU_TABLE[i] = entry_val;
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DPORT_PRO_FLASH_MMU_TABLE[i] = entry_val;
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DPORT_APP_FLASH_MMU_TABLE[i] = entry_val;
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need_flush = true;
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}
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}
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}
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++s_mmap_page_refcnt[i];
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++s_mmap_page_refcnt[i];
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}
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}
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@ -173,6 +180,18 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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*out_ptr = (void*) (region_addr + start * SPI_FLASH_MMU_PAGE_SIZE);
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*out_ptr = (void*) (region_addr + start * SPI_FLASH_MMU_PAGE_SIZE);
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ret = ESP_OK;
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ret = ESP_OK;
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}
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}
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/* This is a temporary fix for an issue where some
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encrypted cache reads may see stale data.
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Working on a long term fix that doesn't require invalidating
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entire cache.
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*/
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if (esp_flash_encryption_enabled() && !did_flush && need_flush) {
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Cache_Flush(0);
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Cache_Flush(1);
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}
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spi_flash_enable_interrupts_caches_and_other_cpu();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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if (*out_ptr == NULL) {
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if (*out_ptr == NULL) {
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free(new_entry);
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free(new_entry);
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@ -240,25 +259,29 @@ void spi_flash_mmap_dump()
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*/
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*/
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static uint32_t written_pages[256/32];
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static uint32_t written_pages[256/32];
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static void update_written_pages(size_t start_addr, size_t length, bool mark);
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static bool update_written_pages(size_t start_addr, size_t length, bool mark);
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void IRAM_ATTR spi_flash_mark_modified_region(size_t start_addr, size_t length)
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void IRAM_ATTR spi_flash_mark_modified_region(size_t start_addr, size_t length)
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{
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{
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update_written_pages(start_addr, length, true);
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update_written_pages(start_addr, length, true);
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}
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}
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static void IRAM_ATTR spi_flash_ensure_unmodified_region(size_t start_addr, size_t length)
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static IRAM_ATTR bool spi_flash_ensure_unmodified_region(size_t start_addr, size_t length)
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{
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{
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update_written_pages(start_addr, length, false);
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return update_written_pages(start_addr, length, false);
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}
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}
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/* generic implementation for the previous two functions */
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/* generic implementation for the previous two functions */
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static inline IRAM_ATTR void update_written_pages(size_t start_addr, size_t length, bool mark)
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static inline IRAM_ATTR bool update_written_pages(size_t start_addr, size_t length, bool mark)
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{
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{
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for (uint32_t addr = start_addr; addr < start_addr + length; addr += SPI_FLASH_MMU_PAGE_SIZE) {
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/* align start_addr & length to full MMU pages */
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uint32_t page_start_addr = start_addr & ~(SPI_FLASH_MMU_PAGE_SIZE-1);
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length += (start_addr - page_start_addr);
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length = (length + SPI_FLASH_MMU_PAGE_SIZE - 1) & ~(SPI_FLASH_MMU_PAGE_SIZE-1);
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for (uint32_t addr = page_start_addr; addr < page_start_addr + length; addr += SPI_FLASH_MMU_PAGE_SIZE) {
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int page = addr / SPI_FLASH_MMU_PAGE_SIZE;
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int page = addr / SPI_FLASH_MMU_PAGE_SIZE;
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if (page >= 256) {
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if (page >= 256) {
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return; /* invalid address */
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return false; /* invalid address */
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}
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}
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int idx = page / 32;
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int idx = page / 32;
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@ -277,6 +300,8 @@ static inline IRAM_ATTR void update_written_pages(size_t start_addr, size_t leng
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Cache_Flush(1);
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Cache_Flush(1);
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#endif
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#endif
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bzero(written_pages, sizeof(written_pages));
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bzero(written_pages, sizeof(written_pages));
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return true;
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}
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}
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}
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}
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return false;
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}
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}
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