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spi_master:fix error when use spi_bus_add_device more than 3 device

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update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
This commit is contained in:
wanlei 2022-09-14 12:13:06 +08:00
parent ed22f22632
commit d7e3f3fb64
4 changed files with 9 additions and 9 deletions
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2
components/soc/soc/esp32/include/soc/spi_caps.h
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@ -17,6 +17,7 @@
#define SOC_SPI_PERIPH_NUM 3
#define SOC_SPI_DMA_CHAN_NUM 2
#define SOC_SPI_PERIPH_CS_NUM(i) 3
#define SOC_SPI_MAX_CS_NUM 3
#define SPI_FUNC_NUM 1
#define SPI_IOMUX_PIN_NUM_MISO 7
@ -64,4 +65,3 @@
// Peripheral doesn't support output given level during its "dummy phase"
#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT(spi_host) ({(void)spi_host; 0;})

4
components/soc/soc/esp32s2/include/soc/spi_caps.h
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@ -16,7 +16,8 @@
#define SOC_SPI_PERIPH_NUM 3
#define SOC_SPI_DMA_CHAN_NUM 3
#define SOC_SPI_PERIPH_CS_NUM(i) 3
#define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3))
#define SOC_SPI_MAX_CS_NUM 6
#define SPI_FUNC_NUM 0
#define SPI_IOMUX_PIN_NUM_HD 27
@ -54,4 +55,3 @@
// Peripheral supports output given level during its "dummy phase"
// Only SPI1 supports this feature
#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT(host_id) ((host_id) == 0)

2
components/soc/soc/esp32s2/spi_periph.c
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@ -54,7 +54,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
.spiq_in = FSPIQ_IN_IDX,
.spiwp_in = FSPIWP_IN_IDX,
.spihd_in = FSPIHD_IN_IDX,
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX},
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
.spics_in = FSPICS0_IN_IDX,
.spiclk_iomux_pin = FSPI_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = FSPI_IOMUX_PIN_NUM_MOSI,

2
components/soc/soc/include/soc/spi_periph.h
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@ -56,7 +56,7 @@ typedef struct {
const uint8_t spiq_in;
const uint8_t spiwp_in;
const uint8_t spihd_in;
const uint8_t spics_out[3]; // /CS GPIO output mux signals
const uint8_t spics_out[SOC_SPI_MAX_CS_NUM]; // /CS GPIO output mux signals
const uint8_t spics_in;
const uint8_t spidqs_out;
const uint8_t spicd_out;