From d70f24e41458a74840d429301a663efdcdb9271a Mon Sep 17 00:00:00 2001
From: Lou Tianhao <loutianhao@espressif.com>
Date: Mon, 19 Aug 2024 14:36:16 +0800
Subject: [PATCH] feat(pm): support example deepsleep for esp32c61

---
 .../esp32c61/include/soc/Kconfig.soc_caps.in  | 20 +++++++++++++++++++
 .../soc/esp32c61/include/soc/soc_caps.h       | 11 +++++-----
 examples/system/deep_sleep/README.md          |  4 ++--
 .../system/deep_sleep/main/Kconfig.projbuild  |  3 +++
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
index 28a488130f..7587add050 100644
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -103,6 +103,10 @@ config SOC_LP_TIMER_SUPPORTED
     bool
     default y
 
+config SOC_LP_AON_SUPPORTED
+    bool
+    default y
+
 config SOC_CLK_TREE_SUPPORTED
     bool
     default y
@@ -127,6 +131,10 @@ config SOC_LIGHT_SLEEP_SUPPORTED
     bool
     default y
 
+config SOC_DEEP_SLEEP_SUPPORTED
+    bool
+    default y
+
 config SOC_PM_SUPPORTED
     bool
     default y
@@ -291,6 +299,10 @@ config SOC_GPIO_OUT_RANGE_MAX
     int
     default 21
 
+config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
+    bool
+    default y
+
 config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK
     int
     default 0
@@ -751,6 +763,14 @@ config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
     int
     default 12
 
+config SOC_PM_SUPPORT_EXT1_WAKEUP
+    bool
+    default y
+
+config SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN
+    bool
+    default y
+
 config SOC_PM_SUPPORT_CPU_PD
     bool
     default y
diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h
index 7fdb265eb9..394333449c 100644
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -48,7 +48,7 @@
 #define SOC_APM_SUPPORTED               1 /*!< Support for APM peripheral */
 #define SOC_PMU_SUPPORTED               1
 #define SOC_LP_TIMER_SUPPORTED          1
-//  \#define SOC_LP_AON_SUPPORTED            1
+#define SOC_LP_AON_SUPPORTED            1
 //  \#define SOC_LP_PERIPHERALS_SUPPORTED    1
  #define SOC_CLK_TREE_SUPPORTED          1
 //  \#define SOC_ASSIST_DEBUG_SUPPORTED      1    //TODO: [ESP32C61] IDF-9269
@@ -61,6 +61,7 @@
 //  \#define SOC_SDIO_SLAVE_SUPPORTED        0
 //  \#define SOC_PAU_SUPPORTED               0
 #define SOC_LIGHT_SLEEP_SUPPORTED       1
+#define SOC_DEEP_SLEEP_SUPPORTED        1
 #define SOC_PM_SUPPORTED                1
 #define SOC_ECDSA_SUPPORTED             1
 #define SOC_SPIRAM_SUPPORTED            1
@@ -179,7 +180,7 @@
 #define SOC_GPIO_OUT_RANGE_MAX          21
 
 // GPIO0~6 on ESP32C61 can support chip deep sleep wakeup
-//  \#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP   (1)  //TODO: IDF-9245
+#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP   (1)  //TODO: IDF-9245
 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK        (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6)
 #define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT      (7)
 
@@ -414,8 +415,8 @@
 // #define SOC_PM_SUPPORT_WIFI_WAKEUP      (1)
 // #define SOC_PM_SUPPORT_BEACON_WAKEUP    (1)
 // #define SOC_PM_SUPPORT_BT_WAKEUP        (1)
-// #define SOC_PM_SUPPORT_EXT1_WAKEUP      (1)
-// #define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN   (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
+#define SOC_PM_SUPPORT_EXT1_WAKEUP      (1)
+#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN   (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
 #define SOC_PM_SUPPORT_CPU_PD           (1)
 #define SOC_PM_SUPPORT_MODEM_PD         (1)
 #define SOC_PM_SUPPORT_XTAL32K_PD       (1)
@@ -431,8 +432,6 @@
 /* macro redefine for pass esp_wifi headers md5sum check */
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE
 
-// #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */
-
 #define SOC_PM_CPU_RETENTION_BY_SW          (1)
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA    (0)
 #define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
diff --git a/examples/system/deep_sleep/README.md b/examples/system/deep_sleep/README.md
index e82a911e8f..1ce2c93ed8 100644
--- a/examples/system/deep_sleep/README.md
+++ b/examples/system/deep_sleep/README.md
@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
 
 # Deep Sleep Example
 
diff --git a/examples/system/deep_sleep/main/Kconfig.projbuild b/examples/system/deep_sleep/main/Kconfig.projbuild
index 1a99f677d5..7c2999c857 100644
--- a/examples/system/deep_sleep/main/Kconfig.projbuild
+++ b/examples/system/deep_sleep/main/Kconfig.projbuild
@@ -41,6 +41,7 @@ menu "Example Configuration"
             default 2 if !IDF_TARGET_ESP32H2
             default 10 if IDF_TARGET_ESP32H2
             range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
             range 7 14 if IDF_TARGET_ESP32H2
             range 0 21 if IDF_TARGET_ESP32S2
             range 0 21 if IDF_TARGET_ESP32S3
@@ -116,6 +117,7 @@ menu "Example Configuration"
             default 4 if !IDF_TARGET_ESP32H2
             default 11 if IDF_TARGET_ESP32H2
             range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
             range 7 14 if IDF_TARGET_ESP32H2
             range 0 21 if IDF_TARGET_ESP32S2
             range 0 21 if IDF_TARGET_ESP32S3
@@ -270,6 +272,7 @@ menu "Example Configuration"
             int "Enable wakeup from GPIO"
             default 0
             range 0 7 if IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32C5
+            range 0 6 if IDF_TARGET_ESP32C61
             range 0 15 if IDF_TARGET_ESP32P4
             range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32C5