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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'esp32p4/deterministic_ecdsa_support_v5.2' into 'release/v5.2'
Add operation successful check and reset dependent peripherals in ECDSA (v5.2) See merge request espressif/esp-idf!30180
This commit is contained in:
commit
d23876f3e4
@ -34,6 +34,11 @@ static void configure_ecdsa_periph(ecdsa_hal_config_t *conf)
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}
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}
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bool ecdsa_hal_get_operation_result(void)
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{
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return ecdsa_ll_get_operation_result();
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}
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void ecdsa_hal_gen_signature(ecdsa_hal_config_t *conf, const uint8_t *hash,
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uint8_t *r_out, uint8_t *s_out, uint16_t len)
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{
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@ -106,7 +111,7 @@ int ecdsa_hal_verify_signature(ecdsa_hal_config_t *conf, const uint8_t *hash, co
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;
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}
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int res = ecdsa_ll_get_verification_result();
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bool res = ecdsa_hal_get_operation_result();
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return (res ? 0 : -1);
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -296,7 +296,7 @@ static inline bool ecdsa_ll_sha_is_busy(void)
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/**
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* @brief Write the ECDSA parameter
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*
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* @param param Parameter to be writen
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* @param param Parameter to be written
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* @param buf Buffer containing data
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* @param len Length of buffer
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*/
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@ -366,14 +366,12 @@ static inline void ecdsa_ll_read_param(ecdsa_ll_param_t param, uint8_t *buf, uin
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}
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/**
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* @brief Get result of ECDSA verification operation
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* @brief Check if the ECDSA operation is successful
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*
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* This is only valid for ECDSA verify mode
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*
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* @return - 1, if signature verification succeeds
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* @return - 1, if ECDSA operation succeeds
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* - 0, otherwise
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*/
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static inline int ecdsa_ll_get_verification_result(void)
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static inline int ecdsa_ll_get_operation_result(void)
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{
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return REG_GET_BIT(ECDSA_RESULT_REG, ECDSA_OPERATION_RESULT);
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -375,14 +375,12 @@ static inline void ecdsa_ll_read_param(ecdsa_ll_param_t param, uint8_t *buf, uin
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}
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/**
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* @brief Get result of ECDSA verification operation
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* @brief Check if the ECDSA operation is successful
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*
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* This is only valid for ECDSA verify mode
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*
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* @return - 1, if signature verification succeeds
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* @return - 1, if ECDSA operation succeeds
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* - 0, otherwise
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*/
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static inline int ecdsa_ll_get_verification_result(void)
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static inline int ecdsa_ll_get_operation_result(void)
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{
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return REG_GET_BIT(ECDSA_RESULT_REG, ECDSA_OPERATION_RESULT);
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -73,6 +73,14 @@ int ecdsa_hal_verify_signature(ecdsa_hal_config_t *conf, const uint8_t *hash, co
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void ecdsa_hal_export_pubkey(ecdsa_hal_config_t *conf, uint8_t *pub_x, uint8_t *pub_y, uint16_t len);
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#endif /* SOC_ECDSA_SUPPORT_EXPORT_PUBKEY */
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/**
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* @brief Check if the ECDSA operation is successful
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*
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* @return - true, if the ECDSA operation is successful
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* - false, if the ECDSA operation fails
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*/
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bool ecdsa_hal_get_operation_result(void);
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#ifdef __cplusplus
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}
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#endif
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: CC0-1.0
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*/
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@ -14,6 +14,9 @@
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#include "hal/ecdsa_hal.h"
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#include "hal/ecdsa_ll.h"
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#include "hal/ecdsa_types.h"
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#include "hal/ecc_ll.h"
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#include "hal/mpi_ll.h"
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#include "soc/soc_caps.h"
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#include "memory_checks.h"
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#include "unity_fixture.h"
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@ -26,10 +29,32 @@ static void ecdsa_enable_and_reset(void)
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ecdsa_ll_enable_bus_clock(true);
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ecdsa_ll_reset_register();
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}
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ECC_RCC_ATOMIC() {
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ecc_ll_enable_bus_clock(true);
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ecc_ll_reset_register();
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}
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#ifdef SOC_ECDSA_USES_MPI
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MPI_RCC_ATOMIC() {
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mpi_ll_enable_bus_clock(true);
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mpi_ll_reset_register();
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}
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#endif
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}
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static void ecdsa_disable(void)
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{
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#ifdef SOC_ECDSA_USES_MPI
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MPI_RCC_ATOMIC() {
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mpi_ll_enable_bus_clock(false);
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}
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#endif
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ECC_RCC_ATOMIC() {
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ecc_ll_enable_bus_clock(false);
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}
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ECDSA_RCC_ATOMIC() {
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ecdsa_ll_enable_bus_clock(false);
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}
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@ -80,7 +105,7 @@ static void test_ecdsa_corrupt_data(bool is_p256, uint8_t* sha, uint8_t* r_le, u
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len = 24;
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}
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// Randomly select a bit and corrupt its correpsonding value
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// Randomly select a bit and corrupt its corresponding value
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uint16_t r_bit = esp_random() % len * 8;
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printf("Corrupting SHA bit %d...\n", r_bit);
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@ -141,9 +166,16 @@ static void test_ecdsa_sign(bool is_p256, uint8_t* sha, uint8_t* r_le, uint8_t*
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ecdsa_enable_and_reset();
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bool process_again = false;
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do {
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ecdsa_hal_gen_signature(&conf, sha_le, r_le, s_le, len);
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} while(!memcmp(r_le, zeroes, len) || !memcmp(s_le, zeroes, len));
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process_again = !ecdsa_hal_get_operation_result()
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|| !memcmp(r_le, zeroes, len)
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|| !memcmp(s_le, zeroes, len);
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} while(process_again);
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ecdsa_disable();
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}
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@ -162,6 +194,7 @@ static void test_ecdsa_export_pubkey(bool is_p256, bool use_km_key)
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{
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uint8_t pub_x[32] = {0};
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uint8_t pub_y[32] = {0};
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uint8_t zeroes[32] = {0};
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uint16_t len;
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ecdsa_hal_config_t conf = {
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@ -184,7 +217,17 @@ static void test_ecdsa_export_pubkey(bool is_p256, bool use_km_key)
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}
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ecdsa_enable_and_reset();
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ecdsa_hal_export_pubkey(&conf, pub_x, pub_y, len);
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bool process_again = false;
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do {
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ecdsa_hal_export_pubkey(&conf, pub_x, pub_y, len);
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process_again = !ecdsa_hal_get_operation_result()
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|| !memcmp(pub_x, zeroes, len)
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|| !memcmp(pub_y, zeroes, len);
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} while (process_again);
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if (is_p256) {
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TEST_ASSERT_EQUAL_HEX8_ARRAY(ecdsa256_pub_x, pub_x, len);
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@ -1,11 +1,13 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "hal/ecdsa_ll.h"
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#include "hal/ecdsa_hal.h"
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#include "hal/ecc_ll.h"
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#include "hal/mpi_ll.h"
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#include "esp_crypto_lock.h"
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#include "esp_efuse.h"
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#include "esp_private/esp_crypto_lock_internal.h"
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@ -14,6 +16,7 @@
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#include "mbedtls/asn1write.h"
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#include "mbedtls/platform_util.h"
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#include "ecdsa/ecdsa_alt.h"
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#include "soc/soc_caps.h"
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#define ECDSA_KEY_MAGIC (short) 0xECD5A
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#define ECDSA_SHA_LEN 32
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@ -29,6 +32,21 @@ static void esp_ecdsa_acquire_hardware(void)
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ecdsa_ll_enable_bus_clock(true);
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ecdsa_ll_reset_register();
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}
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ECC_RCC_ATOMIC() {
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ecc_ll_enable_bus_clock(true);
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ecc_ll_reset_register();
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}
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#ifdef SOC_ECDSA_USES_MPI
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/* We need to reset the MPI peripheral because ECDSA peripheral
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* of some targets use the MPI peripheral as well.
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*/
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MPI_RCC_ATOMIC() {
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mpi_ll_enable_bus_clock(true);
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mpi_ll_reset_register();
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}
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#endif /* SOC_ECDSA_USES_MPI */
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}
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static void esp_ecdsa_release_hardware(void)
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@ -37,6 +55,16 @@ static void esp_ecdsa_release_hardware(void)
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ecdsa_ll_enable_bus_clock(false);
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}
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ECC_RCC_ATOMIC() {
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ecc_ll_enable_bus_clock(false);
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}
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#ifdef SOC_ECDSA_USES_MPI
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MPI_RCC_ATOMIC() {
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mpi_ll_enable_bus_clock(false);
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}
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#endif /* SOC_ECDSA_USES_MPI */
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esp_crypto_ecdsa_lock_release();
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}
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@ -91,9 +119,16 @@ int esp_ecdsa_load_pubkey(mbedtls_ecp_keypair *keypair, int efuse_blk)
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esp_ecdsa_acquire_hardware();
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bool process_again = false;
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do {
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ecdsa_hal_export_pubkey(&conf, qx_le, qy_le, len);
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} while (!memcmp(qx_le, zeroes, len) || !memcmp(qy_le, zeroes, len));
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process_again = !ecdsa_hal_get_operation_result()
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|| !memcmp(qx_le, zeroes, len)
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|| !memcmp(qy_le, zeroes, len);
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} while (process_again);
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esp_ecdsa_release_hardware();
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@ -240,6 +275,8 @@ static int esp_ecdsa_sign(mbedtls_ecp_group *grp, mbedtls_mpi* r, mbedtls_mpi* s
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esp_ecdsa_acquire_hardware();
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bool process_again = false;
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do {
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ecdsa_hal_config_t conf = {
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.mode = ECDSA_MODE_SIGN_GEN,
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@ -250,7 +287,12 @@ static int esp_ecdsa_sign(mbedtls_ecp_group *grp, mbedtls_mpi* r, mbedtls_mpi* s
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};
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ecdsa_hal_gen_signature(&conf, sha_le, r_le, s_le, len);
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} while (!memcmp(r_le, zeroes, len) || !memcmp(s_le, zeroes, len));
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process_again = !ecdsa_hal_get_operation_result()
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|| !memcmp(r_le, zeroes, len)
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|| !memcmp(s_le, zeroes, len);
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} while (process_again);
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esp_ecdsa_release_hardware();
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@ -1135,6 +1135,10 @@ config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED
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bool
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default y
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config SOC_ECDSA_USES_MPI
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bool
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default y
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config SOC_UART_NUM
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int
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default 2
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -215,7 +215,7 @@
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// Support to hold a single digital I/O when the digital domain is powered off
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#define SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP (1)
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// The Clock Out singnal is route to the pin by GPIO matrix
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// The Clock Out signal is route to the pin by GPIO matrix
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#define SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX (1)
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/*-------------------------- RTCIO CAPS --------------------------------------*/
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@ -460,6 +460,9 @@
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/*------------------------ Anti DPA (Security) CAPS --------------------------*/
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#define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1
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/*------------------------- ECDSA CAPS -------------------------*/
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#define SOC_ECDSA_USES_MPI (1)
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/*-------------------------- UART CAPS ---------------------------------------*/
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// ESP32-H2 has 2 UARTs
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#define SOC_UART_NUM (2)
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@ -489,7 +492,7 @@
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/*-------------------------- Power Management CAPS ----------------------------*/
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#define SOC_PM_SUPPORT_BT_WAKEUP (1)
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#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
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#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configue the EXT1 trigger level */
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#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
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#define SOC_PM_SUPPORT_CPU_PD (1)
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#define SOC_PM_SUPPORT_MODEM_PD (1) /*!<modem includes BLE and 15.4 */
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#define SOC_PM_SUPPORT_XTAL32K_PD (1)
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@ -859,6 +859,10 @@ config SOC_ECDSA_SUPPORT_EXPORT_PUBKEY
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bool
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default y
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config SOC_ECDSA_USES_MPI
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bool
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default y
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config SOC_SDM_GROUPS
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int
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default 1
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@ -391,6 +391,7 @@
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/*--------------------------- ECDSA CAPS ---------------------------------------*/
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#define SOC_ECDSA_SUPPORT_EXPORT_PUBKEY (1)
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#define SOC_ECDSA_USES_MPI (1)
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/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
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#define SOC_SDM_GROUPS 1U
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