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feat(sdspi): supported tuning clock duty cycle

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This commit is contained in:
Armando 2024-08-08 14:42:00 +08:00
parent ab53d300d0
commit d215fa6cdb
4 changed files with 9 additions and 3 deletions
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2
components/esp_driver_sdspi/include/driver/sdspi_host.h
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@ -71,6 +71,7 @@ typedef struct {
bool gpio_wp_polarity; /*!< GPIO write protect polarity
0 means "active low", i.e. card is protected when the GPIO is low;
1 means "active high", i.e. card is protected when GPIO is high. */
uint16_t duty_cycle_pos; ///< Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.
} sdspi_device_config_t;
#define SDSPI_SLOT_NO_CS GPIO_NUM_NC ///< indicates that card select line is not used
@ -89,6 +90,7 @@ typedef struct {
.gpio_wp = SDSPI_SLOT_NO_WP, \
.gpio_int = GPIO_NUM_NC, \
.gpio_wp_polarity = SDSPI_IO_ACTIVE_LOW, \
.duty_cycle_pos = 0,\
}
/**

3
components/esp_driver_sdspi/src/sdspi_host.c
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@ -57,6 +57,7 @@ typedef struct {
uint8_t* block_buf;
/// semaphore of gpio interrupt
SemaphoreHandle_t semphr_int;
uint16_t duty_cycle_pos; ///< Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.
} slot_info_t;
// Reserved for old API to be back-compatible
@ -215,6 +216,7 @@ static esp_err_t configure_spi_dev(slot_info_t *slot, int clock_speed_hz)
// rather than a single SPI transaction.
.spics_io_num = GPIO_NUM_NC,
.queue_size = SDSPI_TRANSACTION_COUNT,
.duty_cycle_pos = slot->duty_cycle_pos,
};
return spi_bus_add_device(slot->host_id, &devcfg, &slot->spi_handle);
}
@ -337,6 +339,7 @@ esp_err_t sdspi_host_init_device(const sdspi_device_config_t* slot_config, sdspi
*slot = (slot_info_t) {
.host_id = slot_config->host_id,
.gpio_cs = slot_config->gpio_cs,
.duty_cycle_pos = slot_config->duty_cycle_pos,
};
// Attach the SD card to the SPI bus

3
components/esp_driver_spi/src/gpspi/spi_common.c
View File

@ -802,6 +802,9 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
#ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM
SPI_CHECK((bus_config->intr_flags & ESP_INTR_FLAG_IRAM) == 0, "ESP_INTR_FLAG_IRAM should be disabled when CONFIG_SPI_MASTER_ISR_IN_IRAM is not set.", ESP_ERR_INVALID_ARG);
#endif
#if CONFIG_IDF_TARGET_ESP32
SPI_CHECK((bus_config->data_io_default_level == 0), "no support changing io default level ", ESP_ERR_INVALID_ARG);
#endif
bool spi_chan_claimed = spicommon_periph_claim(host_id, "spi master");
SPI_CHECK(spi_chan_claimed, "host_id already in use", ESP_ERR_INVALID_STATE);

4
components/hal/spi_hal.c
View File

@ -44,8 +44,6 @@ void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level)
// Config default output data line level when don't have transaction
spi_ll_set_mosi_free_level(hal->hw, level);
spi_ll_apply_config(hal->hw);
#else
HAL_LOGW(SPI_HAL_TAG, "The target don't support this config")
#endif
}
@ -63,7 +61,7 @@ void spi_hal_sct_init(spi_hal_context_t *hal)
{
spi_ll_conf_state_enable(hal->hw, true);
spi_ll_set_magic_number(hal->hw, SPI_LL_SCT_MAGIC_NUMBER);
spi_ll_disable_int(hal->hw); //trans_done intr enabled in `add device` phase, sct mode shoud use sct_trans_done only
spi_ll_disable_int(hal->hw); //trans_done intr enabled in `add device` phase, sct mode should use sct_trans_done only
spi_ll_enable_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
spi_ll_set_intr(hal->hw, SPI_LL_INTR_SEG_DONE);
}