mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'feature/esp32c2_add_trace_function_v5.0' into 'release/v5.0'
ble: supported trace function and adv report flow control on esp32c2 See merge request espressif/esp-idf!25641
This commit is contained in:
Island
commit
d1d4519f96
@ -253,6 +253,19 @@ config BT_LE_CONTROLLER_TASK_STACK_SIZE
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help
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This configures stack size of NimBLE controller task
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config BT_LE_CONTROLLER_LOG_ENABLED
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bool "Controller log enable"
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default n
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help
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Enable controller log module
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config BT_LE_CONTROLLER_LOG_DUMP_ONLY
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bool "Controller log dump mode only"
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depends on BT_LE_CONTROLLER_LOG_ENABLED
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default y
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help
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Only operate in dump mode
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config BT_LE_LL_RESOLV_LIST_SIZE
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int "BLE LL Resolving list size"
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range 1 5
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@ -379,3 +392,35 @@ config BT_LE_USE_ESP_TIMER
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default y
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help
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Set this option to use Esp Timer which has higher priority timer instead of FreeRTOS timer
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config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
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bool "BLE adv report flow control supported"
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default y
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help
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The function is mainly used to enable flow control for advertising reports. When it is enabled,
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advertising reports will be discarded by the controller if the number of unprocessed advertising
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reports exceeds the size of BLE adv report flow control.
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config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM
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int "BLE adv report flow control number"
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depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
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range 50 1000
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default 100
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help
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The number of unprocessed advertising report that bluetooth host can save.If you set
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`BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a small value, this may cause adv packets lost.
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If you set `BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` to a large value, bluetooth host may cache a
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lot of adv packets and this may cause system memory run out. For example, if you set
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it to 50, the maximum memory consumed by host is 35 * 50 bytes. Please set
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`BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM` according to your system free memory and handle adv
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packets as fast as possible, otherwise it will cause adv packets lost.
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config BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD
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int "BLE adv lost event threshold value"
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depends on BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
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range 1 1000
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default 20
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help
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When adv report flow control is enabled, The ADV lost event will be generated when the number
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of ADV packets lost in the controller reaches this threshold. It is better to set a larger value.
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If you set `BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD` to a small value or printf every adv lost event, it
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may cause adv packets lost more.
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@ -46,6 +46,10 @@
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#include "hci/hci_hal.h"
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#endif
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#include "esp_private/pm_impl.h"
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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@ -72,12 +76,12 @@
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
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#define ACL_DATA_MBUF_LEADINGSPCAE 4
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#endif
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#endif // CONFIG_BT_BLUEDROID_ENABLED
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/* Types definition
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************************************************************************
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*/
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struct osi_coex_funcs_t {
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uint32_t _magic;
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uint32_t _version;
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@ -110,14 +114,21 @@ struct ext_funcs_t {
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uint32_t magic;
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};
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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typedef void (*interface_func_t) (uint32_t len, const uint8_t*addr, bool end);
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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/* External functions or variables
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************************************************************************
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*/
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extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
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extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
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extern int ble_controller_init(esp_bt_controller_config_t *cfg);
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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extern int ble_log_init_async(interface_func_t bt_controller_log_interface, bool task_create);
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extern int ble_log_deinit_async(void);
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extern void ble_log_async_output_dump_all(bool output);
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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extern int ble_controller_deinit(void);
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extern int ble_controller_enable(uint8_t mode);
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extern int ble_controller_disable(void);
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@ -133,6 +144,9 @@ extern uint32_t r_os_cputime_get32(void);
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extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
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extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
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extern void r_ble_rtc_wake_up_state_clr(void);
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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extern void esp_ble_set_wakeup_overhead(uint32_t overhead);
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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extern int os_msys_init(void);
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extern void os_msys_buf_free(void);
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extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
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@ -168,8 +182,9 @@ static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits,
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static int hci_uart_close_wrapper(int uart_no);
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static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
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static int hci_uart_init_wrapper(int uart_no, void *cfg);
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#endif
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in);
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#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler,
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void *arg, void **ret_handle_in);
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static int esp_intr_free_wrapper(void **ret_handle);
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static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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static uint32_t osi_random_wrapper(void);
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@ -177,10 +192,12 @@ static void esp_reset_rpa_moudle(void);
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static int esp_ecc_gen_key_pair(uint8_t *pub, uint8_t *priv);
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static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
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const uint8_t *our_priv_key, uint8_t *out_dhkey);
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end);
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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/* Local variable definition
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***************************************************************************
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*/
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/* Static variable declare */
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static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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@ -189,7 +206,7 @@ static bool s_ble_active = false;
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#ifdef CONFIG_PM_ENABLE
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static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
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#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
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#endif /* #ifdef CONFIG_PM_ENABLE */
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#endif // CONFIG_PM_ENABLE
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#define BLE_RTC_DELAY_US (1800)
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@ -234,8 +251,12 @@ static void IRAM_ATTR esp_reset_rpa_moudle(void)
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
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}
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static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
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static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn,
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uint32_t param1, uint32_t param2)
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{
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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esp_ble_controller_log_dump_all(true);
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#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
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BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
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assert(0);
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}
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@ -249,17 +270,17 @@ static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_set(type, status);
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#endif
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#endif // CONFIG_SW_COEXIST_ENABLE
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}
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_clear(type, status);
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#endif
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#endif // CONFIG_SW_COEXIST_ENABLE
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}
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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bool esp_vhci_host_check_send_available(void)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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@ -323,7 +344,6 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
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assert(os_mbuf_append(om, &data[1], len - 1) == 0);
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ble_hci_trans_hs_acl_tx(om);
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}
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}
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esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
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@ -336,8 +356,7 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba
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return ESP_OK;
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}
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#endif
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#endif // CONFIG_BT_BLUEDROID_ENABLED
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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{
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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@ -382,8 +401,9 @@ static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
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}
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static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits,
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uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl)
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static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits,
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uint8_t stop_bits,uart_parity_t parity,
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uart_hw_flowcontrol_t flow_ctl)
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{
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int rc = -1;
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rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
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@ -430,6 +450,13 @@ static int esp_intr_free_wrapper(void **ret_handle)
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return rc;
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}
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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void sleep_modem_light_sleep_overhead_set(uint32_t overhead)
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{
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esp_ble_set_wakeup_overhead(overhead);
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}
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
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{
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if (!s_ble_active) {
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@ -476,32 +503,40 @@ esp_err_t controller_sleep_init(void)
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if (rc != ESP_OK) {
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goto error;
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}
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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esp_sleep_enable_bt_wakeup();
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
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rc = esp_pm_register_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
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if (rc != ESP_OK) {
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goto error;
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}
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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return rc;
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error:
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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esp_sleep_disable_bt_wakeup();
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esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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/*lock should release first and then delete*/
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if (s_pm_lock != NULL) {
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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}
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esp_sleep_disable_bt_wakeup();
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#endif //CONFIG_PM_ENABLE
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return rc;
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}
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void controller_sleep_deinit(void)
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{
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
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r_ble_rtc_wake_up_state_clr();
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esp_sleep_disable_bt_wakeup();
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esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
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esp_pm_unregister_inform_out_light_sleep_overhead_callback(sleep_modem_light_sleep_overhead_set);
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_PM_ENABLE
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/*lock should release first and then delete*/
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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@ -599,7 +634,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
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if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
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ret = ESP_ERR_INVALID_ARG;
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goto free_controller;
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goto modem_deint;
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}
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#if CONFIG_SW_COEXIST_ENABLE
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@ -608,9 +643,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
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ret = ble_controller_init(cfg);
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if (ret != ESP_OK) {
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
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goto free_controller;
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goto modem_deint;
|
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}
|
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|
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
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interface_func_t bt_controller_log_interface;
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bt_controller_log_interface = esp_bt_controller_log_interface;
|
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#if CONFIG_BT_LE_CONTROLLER_LOG_DUMP_ONLY
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ret = ble_log_init_async(bt_controller_log_interface, false);
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#else
|
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ret = ble_log_init_async(bt_controller_log_interface, true);
|
||||
#endif // CONFIG_BT_CONTROLLER_LOG_DUMP
|
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if (ret != ESP_OK) {
|
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_log_init failed %d", ret);
|
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goto controller_init_err;
|
||||
}
|
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#endif // CONFIG_BT_CONTROLLER_LOG_ENABLED
|
||||
|
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ret = controller_sleep_init();
|
||||
if (ret != ESP_OK) {
|
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
|
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@ -631,7 +680,12 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
||||
return ESP_OK;
|
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free_controller:
|
||||
controller_sleep_deinit();
|
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#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
controller_init_err:
|
||||
ble_log_deinit_async();
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
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ble_controller_deinit();
|
||||
modem_deint:
|
||||
esp_phy_modem_deinit();
|
||||
#if CONFIG_BT_NIMBLE_ENABLED
|
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ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
||||
@ -654,6 +708,9 @@ esp_err_t esp_bt_controller_deinit(void)
|
||||
|
||||
controller_sleep_deinit();
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
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ble_log_deinit_async();
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
ble_controller_deinit();
|
||||
|
||||
#if CONFIG_BT_NIMBLE_ENABLED
|
||||
@ -933,6 +990,28 @@ uint8_t esp_ble_get_chip_rev_version(void)
|
||||
return efuse_ll_get_chip_wafer_version_minor();
|
||||
}
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, bool end)
|
||||
{
|
||||
for (int i = 0; i < len; i++) {
|
||||
esp_rom_printf("%02x,", addr[i]);
|
||||
}
|
||||
if (end) {
|
||||
esp_rom_printf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
void esp_ble_controller_log_dump_all(bool output)
|
||||
{
|
||||
portMUX_TYPE spinlock;
|
||||
|
||||
portENTER_CRITICAL_SAFE(&spinlock);
|
||||
BT_ASSERT_PRINT("\r\n[DUMP_START:");
|
||||
ble_log_async_output_dump_all(output);
|
||||
BT_ASSERT_PRINT("]\r\n");
|
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portEXIT_CRITICAL_SAFE(&spinlock);
|
||||
}
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
|
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#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
|
||||
|
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|
||||
@ -1 +1 @@
|
||||
Subproject commit d17188c9f61400792a8248bf53378ee92e6f21a4
|
||||
Subproject commit 9da8ad3ebd7932ea6f92578fb1337c7df5000ac7
|
||||
@ -211,7 +211,7 @@
|
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|
||||
#endif //CONFIG_IDF_TARGET_ESP32
|
||||
|
||||
#if (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3)
|
||||
#if (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2)
|
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//BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP
|
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#ifdef CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
|
||||
#define UC_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
|
||||
@ -233,7 +233,7 @@
|
||||
#define UC_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
|
||||
#endif
|
||||
|
||||
#endif //(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3)
|
||||
#endif //(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2)
|
||||
|
||||
//BT ACL CONNECTIONS
|
||||
#ifdef CONFIG_BT_ACL_CONNECTIONS
|
||||
|
||||
@ -415,6 +415,14 @@ esp_err_t esp_bt_mem_release(esp_bt_mode_t mode);
|
||||
*/
|
||||
extern int esp_ble_hw_get_static_addr(esp_ble_addr_t *addr);
|
||||
|
||||
#if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
/**
|
||||
* @brief dump all controller log information cached in buffer
|
||||
* @param output : true for log dump, false will take no effect
|
||||
*/
|
||||
void esp_ble_controller_log_dump_all(bool output);
|
||||
#endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -874,7 +874,7 @@ void esp_pm_impl_waiti(void)
|
||||
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
}
|
||||
|
||||
#define PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO 1
|
||||
#define PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO 2
|
||||
|
||||
/* Inform peripherals of light sleep wakeup overhead time */
|
||||
static inform_out_light_sleep_overhead_cb_t s_periph_inform_out_light_sleep_overhead_cb[PERIPH_INFORM_OUT_LIGHT_SLEEP_OVERHEAD_NO];
|
||||
|
||||
@ -563,10 +563,6 @@ bt_rf_coex_dft_pti_get_default = 0x40000ab4;
|
||||
bt_rf_coex_hooks_p_set = 0x40000ab8;
|
||||
r__os_mbuf_copypkthdr = 0x40000abc;
|
||||
r_ble_controller_get_rom_compile_version = 0x40000ac4;
|
||||
r_ble_hci_ram_hs_acl_tx = 0x40000ac8;
|
||||
r_ble_hci_ram_hs_cmd_tx = 0x40000acc;
|
||||
r_ble_hci_ram_ll_acl_tx = 0x40000ad0;
|
||||
r_ble_hci_ram_ll_evt_tx = 0x40000ad4;
|
||||
r_ble_hci_ram_reset = 0x40000ad8;
|
||||
r_ble_hci_ram_set_acl_free_cb = 0x40000adc;
|
||||
r_ble_hci_trans_acl_buf_alloc = 0x40000ae0;
|
||||
@ -579,10 +575,6 @@ r_ble_hci_uart_acl_tx = 0x40000b00;
|
||||
r_ble_hci_uart_cmdevt_tx = 0x40000b04;
|
||||
r_ble_hci_uart_config = 0x40000b08;
|
||||
r_ble_hci_uart_free_pkt = 0x40000b0c;
|
||||
r_ble_hci_uart_hs_acl_tx = 0x40000b10;
|
||||
r_ble_hci_uart_hs_cmd_tx = 0x40000b14;
|
||||
r_ble_hci_uart_ll_acl_tx = 0x40000b18;
|
||||
r_ble_hci_uart_ll_evt_tx = 0x40000b1c;
|
||||
r_ble_hci_uart_rx_acl = 0x40000b20;
|
||||
r_ble_hci_uart_rx_char = 0x40000b24;
|
||||
r_ble_hci_uart_rx_cmd = 0x40000b28;
|
||||
@ -825,7 +817,6 @@ r_ble_ll_hci_cb_set_ctrlr_to_host_fc = 0x40000f9c;
|
||||
r_ble_ll_hci_cb_set_event_mask = 0x40000fa0;
|
||||
r_ble_ll_hci_cb_set_event_mask2 = 0x40000fa4;
|
||||
r_ble_ll_hci_chk_phy_masks = 0x40000fa8;
|
||||
r_ble_ll_hci_cmd_proc = 0x40000fac;
|
||||
r_ble_ll_hci_cmd_rx = 0x40000fb0;
|
||||
r_ble_ll_hci_disconnect = 0x40000fbc;
|
||||
r_ble_ll_hci_ev_conn_update = 0x40000fc4;
|
||||
@ -979,7 +970,6 @@ r_ble_ll_scan_reset = 0x40001258;
|
||||
r_ble_ll_scan_rx_pkt_in = 0x4000125c;
|
||||
r_ble_ll_scan_rx_pkt_in_restore_addr_data = 0x40001268;
|
||||
r_ble_ll_scan_rxed = 0x4000126c;
|
||||
r_ble_ll_scan_send_adv_report = 0x40001270;
|
||||
r_ble_ll_scan_send_truncated = 0x40001274;
|
||||
r_ble_ll_scan_set_peer_rpa = 0x4000127c;
|
||||
r_ble_ll_scan_set_perfer_addr = 0x40001280;
|
||||
@ -1116,7 +1106,6 @@ r_ble_lll_conn_coex_dpc_update_on_event_scheduled = 0x400014e4;
|
||||
r_ble_lll_conn_coex_dpc_update_on_event_started = 0x400014e8;
|
||||
r_ble_lll_conn_cth_flow_alloc_credit = 0x400014ec;
|
||||
r_ble_lll_conn_current_sm_over = 0x400014f4;
|
||||
r_ble_lll_conn_event_end = 0x40001504;
|
||||
r_ble_lll_conn_event_end_timer_cb = 0x40001508;
|
||||
r_ble_lll_conn_event_is_over = 0x40001510;
|
||||
r_ble_lll_conn_event_start_cb = 0x40001514;
|
||||
|
||||
@ -16,6 +16,7 @@ This example contains some build configurations. For each configuration, a few c
|
||||
- `sdkconfig.40m.esp32c3`: ESP32C3 uses main XTAL as low power clock in light sleep enabled.
|
||||
- `sdkconfig.defaults.esp32s3`: ESP32S3 uses 32kHz XTAL as low power clock in light sleep enabled.
|
||||
- `sdkconfig.40m.esp32s3`: ESP32S3 uses main XTAL as low power clock in light sleep enabled.
|
||||
- `sdkconfig.defaults.esp32c2`: ESP32C2 uses main XTAL as low power clock in light sleep enabled.
|
||||
## How to use example
|
||||
|
||||
### Hardware Required
|
||||
@ -48,6 +49,15 @@ idf.py menuconfig
|
||||
7. Enable power up main XTAL during light sleep:
|
||||
- `Component config > Bluetooth > Controller Options > MODEM SLEEP Options > [*] power up main XTAL during light sleep`
|
||||
|
||||
#### For Chip ESP32-C2
|
||||
|
||||
4. Enable bluetooth modem sleep:
|
||||
- `Component config > Bluetooth > Controller Options`
|
||||
- `[*] Enable BLE sleep`
|
||||
5. Power down flash during light sleep:
|
||||
- `Component config > Hardware Settings > Sleep Config`
|
||||
- `[*] Power down flash in light sleep when there is no SPIRAM`
|
||||
|
||||
### Build and Flash
|
||||
|
||||
```
|
||||
@ -107,8 +117,10 @@ I (463) NimBLE:
|
||||
| ESP32 | 231 mA | 14.1 mA | X | 1.9 mA |
|
||||
| ESP32C3 | 262 mA | 12 mA | 2.3 mA | 140 uA |
|
||||
| ESP32S3 | 240 mA | 17.9 mA | 3.3 mA | 230 uA |
|
||||
| ESP32C2 | 130 mA | 18.0 mA | 2.5 mA | X |
|
||||
X: This feature is currently not supported.
|
||||
|
||||
## Example Breakdown
|
||||
|
||||
- ESP32 does not support the use of main XTAL in light sleep mode, so an external 32kHz crystal is required.
|
||||
- ESP32 does not support the use of main XTAL in light sleep mode, so an external 32kHz crystal is required.
|
||||
- ESP32C2 does not support the use of 32KHz XTAL in light sleep mode, the XTAL frequency is set to 26MHz in default.
|
||||
@ -2,7 +2,8 @@ menu "Example Configuration"
|
||||
|
||||
choice EXAMPLE_MAX_CPU_FREQ
|
||||
prompt "Maximum CPU frequency"
|
||||
default EXAMPLE_MAX_CPU_FREQ_160
|
||||
default EXAMPLE_MAX_CPU_FREQ_160 if !IDF_TARGET_ESP32C2
|
||||
default EXAMPLE_MAX_CPU_FREQ_120 if IDF_TARGET_ESP32C2
|
||||
depends on PM_ENABLE
|
||||
help
|
||||
Maximum CPU frequency to use for dynamic frequency scaling.
|
||||
@ -11,6 +12,9 @@ menu "Example Configuration"
|
||||
bool "80 MHz"
|
||||
config EXAMPLE_MAX_CPU_FREQ_160
|
||||
bool "160 MHz"
|
||||
config EXAMPLE_MAX_CPU_FREQ_120
|
||||
bool "120 MHz"
|
||||
depends on IDF_TARGET_ESP32C2
|
||||
config EXAMPLE_MAX_CPU_FREQ_240
|
||||
bool "240 MHz"
|
||||
depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
|
||||
@ -19,12 +23,14 @@ menu "Example Configuration"
|
||||
config EXAMPLE_MAX_CPU_FREQ_MHZ
|
||||
int
|
||||
default 80 if EXAMPLE_MAX_CPU_FREQ_80
|
||||
default 120 if EXAMPLE_MAX_CPU_FREQ_120
|
||||
default 160 if EXAMPLE_MAX_CPU_FREQ_160
|
||||
default 240 if EXAMPLE_MAX_CPU_FREQ_240
|
||||
|
||||
choice EXAMPLE_MIN_CPU_FREQ
|
||||
prompt "Minimum CPU frequency"
|
||||
default EXAMPLE_MIN_CPU_FREQ_40M
|
||||
default EXAMPLE_MIN_CPU_FREQ_40M if !IDF_TARGET_ESP32C2
|
||||
default EXAMPLE_MIN_CPU_FREQ_26M if IDF_TARGET_ESP32C2
|
||||
depends on PM_ENABLE
|
||||
help
|
||||
Minimum CPU frequency to use for dynamic frequency scaling.
|
||||
@ -42,6 +48,10 @@ menu "Example Configuration"
|
||||
config EXAMPLE_MIN_CPU_FREQ_40M
|
||||
bool "40 MHz (use with 40MHz XTAL)"
|
||||
depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
|
||||
config EXAMPLE_MIN_CPU_FREQ_26M
|
||||
bool "26 MHz (use with 26MHz XTAL)"
|
||||
depends on IDF_TARGET_ESP32C2
|
||||
depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO
|
||||
config EXAMPLE_MIN_CPU_FREQ_20M
|
||||
bool "20 MHz (use with 40MHz XTAL)"
|
||||
depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
|
||||
@ -54,6 +64,7 @@ menu "Example Configuration"
|
||||
int
|
||||
default 80 if EXAMPLE_MIN_CPU_FREQ_80M
|
||||
default 40 if EXAMPLE_MIN_CPU_FREQ_40M
|
||||
default 26 if EXAMPLE_MIN_CPU_FREQ_26M
|
||||
default 20 if EXAMPLE_MIN_CPU_FREQ_20M
|
||||
default 10 if EXAMPLE_MIN_CPU_FREQ_10M
|
||||
|
||||
|
||||
@ -524,6 +524,8 @@ app_main(void)
|
||||
esp_pm_config_esp32c3_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_pm_config_esp32s3_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32C2
|
||||
esp_pm_config_esp32c2_t pm_config = {
|
||||
#endif
|
||||
.max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ,
|
||||
.min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ,
|
||||
|
||||
@ -0,0 +1,19 @@
|
||||
CONFIG_IDF_TARGET="esp32h2"
|
||||
|
||||
# Bluetooth Low Power Config
|
||||
CONFIG_BT_LE_SLEEP_ENABLE=y
|
||||
|
||||
#
|
||||
# Power Management
|
||||
#
|
||||
CONFIG_PM_ENABLE=y
|
||||
CONFIG_PM_DFS_INIT_AUTO=y
|
||||
|
||||
# XTAL Freq Config
|
||||
CONFIG_XTAL_FREQ_26=y
|
||||
CONFIG_XTAL_FREQ=26
|
||||
|
||||
#
|
||||
# Sleep Config
|
||||
#
|
||||
CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y
|
||||
Loading…
Reference in New Issue
Block a user