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esp_system: Fix a race-condition in esp_ipc_isr (in QEMU env)
The race condition is very unlikely on real hardware but can be observed with qemu under heavy load. Also add missing `memw` instructions which are generated by the C compiler but absent in the assembly code. Signed-off-by: Paul Guyot <pguyot@kallisys.net> Signed-off-by: KonstantinKondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/11447 Closes https://github.com/espressif/esp-idf/issues/11433
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@ -142,6 +142,8 @@ void IRAM_ATTR esp_ipc_isr_release_other_cpu(void)
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const uint32_t cpu_id = xPortGetCoreID();
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if (--s_count_of_nested_calls[cpu_id] == 0) {
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esp_ipc_isr_finish_cmd = 1;
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// Make sure end flag is cleared and esp_ipc_isr_waiting_for_finish_cmd is done.
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while (!esp_ipc_isr_end_fl) {};
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IPC_ISR_EXIT_CRITICAL();
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#if CONFIG_FREERTOS_SMP
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portRESTORE_INTERRUPTS(s_stored_interrupt_level);
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@ -96,6 +96,7 @@ esp_ipc_isr_handler:
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/* set the start flag */
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movi a0, esp_ipc_isr_start_fl
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memw
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s32i a0, a0, 0
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/* Call the esp_ipc_function(void* arg) */
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@ -113,6 +114,7 @@ esp_ipc_isr_handler:
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/* set the end flag */
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movi a0, esp_ipc_isr_end_fl
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memw
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s32i a0, a0, 0
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/* restore a0 */
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@ -23,6 +23,7 @@
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esp_ipc_isr_waiting_for_finish_cmd:
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/* waiting for the finish command */
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.check_finish_cmd:
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memw
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l32i a3, a2, 0
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beqz a3, .check_finish_cmd
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ret
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