mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
spi_slave: fix io re-config issue
This commit is contained in:
parent
30a46d0754
commit
cdd610cadc
@ -50,6 +50,7 @@ static const char *SPI_TAG = "spi_slave";
|
||||
|
||||
typedef struct {
|
||||
int id;
|
||||
spi_bus_config_t bus_config;
|
||||
spi_slave_interface_config_t cfg;
|
||||
intr_handle_t intr;
|
||||
spi_slave_hal_context_t hal;
|
||||
@ -156,6 +157,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
|
||||
}
|
||||
memset(spihost[host], 0, sizeof(spi_slave_t));
|
||||
memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
|
||||
memcpy(&spihost[host]->bus_config, bus_config, sizeof(spi_bus_config_t));
|
||||
spihost[host]->id = host;
|
||||
|
||||
bool use_dma = (dma_chan != SPI_DMA_DISABLED);
|
||||
@ -301,6 +303,7 @@ esp_err_t spi_slave_free(spi_host_device_t host)
|
||||
if (spihost[host]->dma_enabled) {
|
||||
spicommon_dma_chan_free(host);
|
||||
}
|
||||
spicommon_bus_free_io_cfg(&spihost[host]->bus_config);
|
||||
free(spihost[host]->hal.dmadesc_tx);
|
||||
free(spihost[host]->hal.dmadesc_rx);
|
||||
esp_intr_free(spihost[host]->intr);
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@ -8,7 +8,7 @@
|
||||
#include "unity_test_utils.h"
|
||||
#include "esp_heap_caps.h"
|
||||
|
||||
#define TEST_MEMORY_LEAK_THRESHOLD (100)
|
||||
#define TEST_MEMORY_LEAK_THRESHOLD (120)
|
||||
|
||||
static size_t before_free_8bit;
|
||||
static size_t before_free_32bit;
|
||||
|
@ -736,14 +736,8 @@ TEST_CASE("test_slave_isr_pin_to_core","[spi]")
|
||||
slave_expect = 0;
|
||||
for (int i = 0; i < TEST_ISR_CNT; i++) {
|
||||
TEST_ESP_OK(spi_slave_initialize(TEST_SPI_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
|
||||
|
||||
TEST_ESP_OK(spi_slave_queue_trans(TEST_SPI_HOST, &trans_cfg, portMAX_DELAY));
|
||||
// This two delay used for hardware to activate a interrupt after invoke
|
||||
vTaskDelay(1);
|
||||
// to invoke a trans_done intr for spi slave without a master
|
||||
spi_ll_set_int_stat(SPI_LL_GET_HW(TEST_SPI_HOST));
|
||||
vTaskDelay(1);
|
||||
|
||||
vTaskDelay(1); // Waiting ISR on core 1 to be done.
|
||||
TEST_ESP_OK(spi_slave_free(TEST_SPI_HOST));
|
||||
}
|
||||
printf("Test Slave ISR Assign CPU1: %d : %ld\n", TEST_ISR_CNT, slave_expect);
|
||||
|
Loading…
Reference in New Issue
Block a user