From cdb11885f51241f4df1d4efb4753850612871744 Mon Sep 17 00:00:00 2001
From: chenjianxing <chenjianxing@espressif.com>
Date: Wed, 7 Jun 2023 11:57:31 +0800
Subject: [PATCH] esp_phy: update esp32c2 phy lib to fix some issues

1. improve Wi-Fi rx 11b pkts for AC-DC power supply modules.
2. fix Wi-Fi disconnect in low temperature.
3. fix RTC_SW_CPU_RST occur in Wi-Fi start and stop process.
---
 components/esp_phy/Kconfig                           |  9 +++++++++
 components/esp_phy/include/phy.h                     | 12 ++++++++++++
 components/esp_phy/lib                               |  2 +-
 components/esp_phy/src/phy_init.c                    |  9 +++++++++
 .../soc/esp32c2/include/soc/Kconfig.soc_caps.in      |  4 ++++
 components/soc/esp32c2/include/soc/soc_caps.h        |  3 +++
 6 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/components/esp_phy/Kconfig b/components/esp_phy/Kconfig
index 646522e499..310f0f0a44 100644
--- a/components/esp_phy/Kconfig
+++ b/components/esp_phy/Kconfig
@@ -137,4 +137,13 @@ menu "PHY"
         default 1 if ESP_PHY_RF_CAL_NONE
         default 2 if ESP_PHY_RF_CAL_FULL
 
+    config ESP_PHY_IMPROVE_RX_11B
+        bool "Improve Wi-Fi receive 11b pkts"
+        default n
+        depends on SOC_PHY_IMPROVE_RX_11B
+        help
+            This is a workaround to improve Wi-Fi receive 11b pkts for some modules using AC-DC power supply with
+            high interference, enable this option will sacrifice Wi-Fi OFDM receive performance.
+            But to guarantee 11b receive performance serves as a bottom line in this case.
+
 endmenu  # PHY
diff --git a/components/esp_phy/include/phy.h b/components/esp_phy/include/phy.h
index c8d1018288..aa6def0672 100644
--- a/components/esp_phy/include/phy.h
+++ b/components/esp_phy/include/phy.h
@@ -106,6 +106,18 @@ void phy_bbpll_en_usb(bool en);
 void phy_eco_version_sel(uint8_t chip_ver);
 #endif
 
+#if CONFIG_ESP_PHY_IMPROVE_RX_11B
+/**
+ * @brief Improve Wi-Fi receive 11b pkts when modules with high interference.
+ *
+ * @attention 1.This is a workaround to improve Wi-Fi receive 11b pkts for some modules using AC-DC power supply with high interference.
+ * @attention 2.Enable this will sacrifice Wi-Fi OFDM receive performance. But to guarantee 11b receive performance serves as a bottom line in this case.
+ *
+ * @param     enable  Enable or disable.
+ */
+void phy_improve_rx_special(bool enable);
+#endif
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/esp_phy/lib b/components/esp_phy/lib
index ac1b53b9ef..3fa590e24e 160000
--- a/components/esp_phy/lib
+++ b/components/esp_phy/lib
@@ -1 +1 @@
-Subproject commit ac1b53b9efe6f09c24ae6c2955073eda8a5689e8
+Subproject commit 3fa590e24e4e1b3a55bd0daf7ec0a5918d4eded8
diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index e728e1f75d..f8917aa6f0 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -250,6 +250,10 @@ void esp_phy_enable(void)
         else {
             phy_wakeup_init();
             phy_digital_regs_load();
+
+#if CONFIG_ESP_PHY_IMPROVE_RX_11B
+            phy_improve_rx_special(true);
+#endif
         }
 
 #if CONFIG_IDF_TARGET_ESP32
@@ -752,6 +756,11 @@ void esp_phy_load_cal_and_init(void)
     register_chipv7_phy(init_data, cal_data, PHY_RF_CAL_FULL);
 #endif
 
+#if CONFIG_ESP_PHY_IMPROVE_RX_11B
+    ESP_LOGW(TAG, "PHY enable improve rx 11b");
+    phy_improve_rx_special(true);
+#endif
+
 #if CONFIG_ESP_PHY_REDUCE_TX_POWER
     esp_phy_release_init_data(phy_init_data);
     free(init_data);
diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
index 477046ce77..7fd22bf20b 100644
--- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
@@ -602,3 +602,7 @@ config SOC_BLE_50_SUPPORTED
 config SOC_BLE_DEVICE_PRIVACY_SUPPORTED
     bool
     default y
+
+config SOC_PHY_IMPROVE_RX_11B
+    bool
+    default y
diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h
index 702685a50f..3ea7a0819b 100644
--- a/components/soc/esp32c2/include/soc/soc_caps.h
+++ b/components/soc/esp32c2/include/soc/soc_caps.h
@@ -290,3 +290,6 @@
 #define SOC_ESP_NIMBLE_CONTROLLER       (1)    /*!< Support BLE EMBEDDED controller V1 */
 #define SOC_BLE_50_SUPPORTED            (1)    /*!< Support Bluetooth 5.0 */
 #define SOC_BLE_DEVICE_PRIVACY_SUPPORTED (1)   /*!< Support BLE device privacy mode */
+
+/*------------------------------------- PHY CAPS -------------------------------------*/
+#define SOC_PHY_IMPROVE_RX_11B              (1)