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Merge branch 'bugfix/dfs_rtc_fixes' into 'master'

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DFS related fixes

See merge request idf/esp-idf!2102

(cherry picked from commit 8478823039)

9377d4ac pm: fix incorrect configuration at startup
7167ad45 pm: improve debug output from esp_pm_dump_locks
1618dbc9 soc/rtc: wait for frequency switch to complete
This commit is contained in:
Jiang Jiang Jian 2018-03-21 12:02:48 +08:00
parent f0eb023f17
commit c9ed467e26
2 changed files with 20 additions and 8 deletions
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27
components/esp32/pm_esp32.c
View File

@ -82,14 +82,9 @@ static bool s_core_idle[portNUM_PROCESSORS];
extern uint32_t g_ticks_per_us_pro; extern uint32_t g_ticks_per_us_pro;
/* Lookup table of CPU frequencies to be used in each mode. /* Lookup table of CPU frequencies to be used in each mode.
* Modified by esp_pm_configure. * Initialized by esp_pm_impl_init and modified by esp_pm_configure.
*/ */
rtc_cpu_freq_t s_cpu_freq_by_mode[PM_MODE_COUNT] = { rtc_cpu_freq_t s_cpu_freq_by_mode[PM_MODE_COUNT];
[PM_MODE_LIGHT_SLEEP] = (rtc_cpu_freq_t) -1, /* unused */
[PM_MODE_APB_MIN] = RTC_CPU_FREQ_XTAL,
[PM_MODE_APB_MAX] = RTC_CPU_FREQ_80M,
[PM_MODE_CPU_MAX] = RTC_CPU_FREQ_80M,
};
/* Lookup table of CPU ticks per microsecond for each RTC_CPU_FREQ_ value. /* Lookup table of CPU ticks per microsecond for each RTC_CPU_FREQ_ value.
* Essentially the same as returned by rtc_clk_cpu_freq_value(), but without * Essentially the same as returned by rtc_clk_cpu_freq_value(), but without
@ -192,6 +187,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
s_cpu_freq_by_mode[PM_MODE_CPU_MAX] = max_freq; s_cpu_freq_by_mode[PM_MODE_CPU_MAX] = max_freq;
s_cpu_freq_by_mode[PM_MODE_APB_MAX] = apb_max_freq; s_cpu_freq_by_mode[PM_MODE_APB_MAX] = apb_max_freq;
s_cpu_freq_by_mode[PM_MODE_APB_MIN] = min_freq; s_cpu_freq_by_mode[PM_MODE_APB_MIN] = min_freq;
s_cpu_freq_by_mode[PM_MODE_LIGHT_SLEEP] = min_freq;
s_light_sleep_en = config->light_sleep_enable; s_light_sleep_en = config->light_sleep_enable;
portEXIT_CRITICAL(&s_switch_lock); portEXIT_CRITICAL(&s_switch_lock);
@ -430,9 +426,15 @@ void esp_pm_impl_dump_stats(FILE* out)
time_in_mode[cur_mode] += now - last_mode_change_time; time_in_mode[cur_mode] += now - last_mode_change_time;
fprintf(out, "Mode stats:\n");
for (int i = 0; i < PM_MODE_COUNT; ++i) { for (int i = 0; i < PM_MODE_COUNT; ++i) {
fprintf(out, "%8s %12lld %2d%%\n", if (i == PM_MODE_LIGHT_SLEEP && !s_light_sleep_en) {
/* don't display light sleep mode if it's not enabled */
continue;
}
fprintf(out, "%8s %6s %12lld %2d%%\n",
s_mode_names[i], s_mode_names[i],
s_freq_names[s_cpu_freq_by_mode[i]],
time_in_mode[i], time_in_mode[i],
(int) (time_in_mode[i] * 100 / now)); (int) (time_in_mode[i] * 100 / now));
} }
@ -452,5 +454,14 @@ void esp_pm_impl_init()
ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos1", ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos1",
&s_rtos_lock_handle[1])); &s_rtos_lock_handle[1]));
ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[1])); ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[1]));
/* Configure all modes to use the default CPU frequency.
* This will be modified later by a call to esp_pm_configure.
*/
rtc_cpu_freq_t default_freq;
assert(rtc_clk_cpu_freq_from_mhz(CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ, &default_freq));
for (size_t i = 0; i < PM_MODE_COUNT; ++i) {
s_cpu_freq_by_mode[i] = default_freq;
}
#endif // portNUM_PROCESSORS == 2 #endif // portNUM_PROCESSORS == 2
} }

1
components/soc/esp32/rtc_clk.c
View File

@ -402,6 +402,7 @@ void rtc_clk_cpu_freq_set_fast(rtc_cpu_freq_t cpu_freq)
rtc_clk_cpu_freq_to_xtal(); rtc_clk_cpu_freq_to_xtal();
} else if (cpu_freq > RTC_CPU_FREQ_XTAL) { } else if (cpu_freq > RTC_CPU_FREQ_XTAL) {
rtc_clk_cpu_freq_to_pll(cpu_freq); rtc_clk_cpu_freq_to_pll(cpu_freq);
rtc_clk_wait_for_slow_cycle();
} }
} }