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fix(sleep): fix_wrong_sleep_param_for_lp_memory_retention
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@ -390,7 +390,7 @@ const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pm
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#define PMU_LP_SLEEP_POWER_CONFIG_DEFAULT() { \
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.dig_power = { \
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.mem_dslp = 1, \
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.mem_dslp = 0, \
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.peri_pd_en = 0, \
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}, \
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.clk_power = { \
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@ -309,7 +309,7 @@ typedef struct {
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.lp_sys[PMU_MODE_LP_SLEEP] = { \
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.dig_power = { \
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.peri_pd_en = ((pd_flags) & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \
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.mem_dslp = 1 \
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.mem_dslp = 0 \
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}, \
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.clk_power = { \
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.xpd_xtal32k = ((pd_flags) & PMU_SLEEP_PD_XTAL32K) ? 0 : 1, \
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@ -389,7 +389,7 @@ const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pm
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#define PMU_LP_SLEEP_POWER_CONFIG_DEFAULT() { \
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.dig_power = { \
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.mem_dslp = 1, \
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.mem_dslp = 0, \
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.peri_pd_en = 0, \
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}, \
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.clk_power = { \
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@ -305,7 +305,7 @@ typedef struct {
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.lp_sys[PMU_MODE_LP_SLEEP] = { \
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.dig_power = { \
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.peri_pd_en = ((pd_flags) & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \
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.mem_dslp = 1 \
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.mem_dslp = 0 \
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}, \
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.clk_power = { \
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.xpd_xtal32k = ((pd_flags) & PMU_SLEEP_PD_XTAL32K) ? 0 : 1, \
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@ -292,7 +292,7 @@ const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pm
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.lp_pad_slp_sel = 0, \
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.bod_source_sel = 0, \
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.vddbat_mode = 0, \
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.mem_dslp = 1, \
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.mem_dslp = 0, \
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.peri_pd_en = 0, \
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}, \
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.clk_power = { \
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@ -303,7 +303,7 @@ typedef struct {
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.bod_source_sel = 0, \
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.vddbat_mode = 0, \
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.peri_pd_en = ((pd_flags) & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \
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.mem_dslp = 1 \
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.mem_dslp = 0 \
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}, \
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.clk_power = { \
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.xpd_lppll = 0,\
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