From 35918b89a9fb8078ad5f4acfb1b6ac5ecf3d1821 Mon Sep 17 00:00:00 2001 From: hongshuqing Date: Wed, 6 Dec 2023 10:37:15 +0800 Subject: [PATCH] feat(pmu): set fix voltage to different mode for esp32c6 & c6 modify brownout rst2 --- .../esp_hw_support/port/esp32c6/pmu_init.c | 34 ++++++--- .../esp_hw_support/port/esp32c6/pmu_param.c | 63 ++++++++++++++-- .../esp_hw_support/port/esp32c6/pmu_sleep.c | 71 +++++++++++++++++-- .../port/esp32c6/private_include/pmu_param.h | 29 +++++--- .../port/esp32c6/rtc_clk_init.c | 11 ++- components/esp_system/startup_funcs.c | 12 +++- .../hal/esp32c6/include/hal/brownout_ll.h | 3 +- components/hal/esp32c6/include/hal/efuse_ll.h | 35 +++++++++ .../esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32c6/include/soc/soc_caps.h | 3 + 10 files changed, 231 insertions(+), 34 deletions(-) diff --git a/components/esp_hw_support/port/esp32c6/pmu_init.c b/components/esp_hw_support/port/esp32c6/pmu_init.c index 8c04486f02..148f0ff4bb 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_init.c +++ b/components/esp_hw_support/port/esp32c6/pmu_init.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -23,13 +23,13 @@ typedef struct { const pmu_hp_system_power_param_t *power; const pmu_hp_system_clock_param_t *clock; const pmu_hp_system_digital_param_t *digital; - const pmu_hp_system_analog_param_t *analog; + pmu_hp_system_analog_param_t *analog; //param determined at runtime const pmu_hp_system_retention_param_t *retent; } pmu_hp_system_param_t; typedef struct { const pmu_lp_system_power_param_t *power; - const pmu_lp_system_analog_param_t *analog; + pmu_lp_system_analog_param_t *analog; //param determined at runtime } pmu_lp_system_param_t; pmu_context_t * __attribute__((weak)) IRAM_ATTR PMU_instance(void) @@ -42,7 +42,7 @@ pmu_context_t * __attribute__((weak)) IRAM_ATTR PMU_instance(void) return &pmu_context; } -void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, pmu_hp_system_param_t *param) +void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, const pmu_hp_system_param_t *param) { const pmu_hp_system_power_param_t *power = param->power; const pmu_hp_system_clock_param_t *clock = param->clock; @@ -101,7 +101,7 @@ void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, pmu_hp_system_pa pmu_ll_hp_set_sleep_protect_mode(ctx->hal->dev, PMU_SLEEP_PROTECT_HP_LP_SLEEP); } -void pmu_lp_system_init(pmu_context_t *ctx, pmu_lp_mode_t mode, pmu_lp_system_param_t *param) +void pmu_lp_system_init(pmu_context_t *ctx, pmu_lp_mode_t mode, const pmu_lp_system_param_t *param) { const pmu_lp_system_power_param_t *power = param->power; const pmu_lp_system_analog_param_t *anlg = param->analog; @@ -157,18 +157,26 @@ static inline void pmu_power_domain_force_default(pmu_context_t *ctx) static inline void pmu_hp_system_param_default(pmu_hp_mode_t mode, pmu_hp_system_param_t *param) { + assert (param->analog); + param->power = pmu_hp_system_power_param_default(mode); param->clock = pmu_hp_system_clock_param_default(mode); param->digital = pmu_hp_system_digital_param_default(mode); - param->analog = pmu_hp_system_analog_param_default(mode); + *param->analog = *pmu_hp_system_analog_param_default(mode); //copy default value param->retent = pmu_hp_system_retention_param_default(mode); + + if (mode == PMU_MODE_HP_ACTIVE || mode == PMU_MODE_HP_MODEM) { + param->analog->regulator0.dbias = get_act_hp_dbias(); + } } static void pmu_hp_system_init_default(pmu_context_t *ctx) { assert(ctx); - pmu_hp_system_param_t param = { 0 }; for (pmu_hp_mode_t mode = PMU_MODE_HP_ACTIVE; mode < PMU_MODE_HP_MAX; mode++) { + pmu_hp_system_analog_param_t analog = {}; + pmu_hp_system_param_t param = {.analog = &analog}; + pmu_hp_system_param_default(mode, ¶m); pmu_hp_system_init(ctx, mode, ¶m); } @@ -176,15 +184,23 @@ static void pmu_hp_system_init_default(pmu_context_t *ctx) static inline void pmu_lp_system_param_default(pmu_lp_mode_t mode, pmu_lp_system_param_t *param) { + assert (param->analog); + param->power = pmu_lp_system_power_param_default(mode); - param->analog = pmu_lp_system_analog_param_default(mode); + *param->analog = *pmu_lp_system_analog_param_default(mode); //copy default value + + if (mode == PMU_MODE_LP_ACTIVE) { + param->analog->regulator0.dbias = get_act_lp_dbias(); + } } static void pmu_lp_system_init_default(pmu_context_t *ctx) { assert(ctx); - pmu_lp_system_param_t param; for (pmu_lp_mode_t mode = PMU_MODE_LP_ACTIVE; mode < PMU_MODE_LP_MAX; mode++) { + pmu_lp_system_analog_param_t analog = {}; + pmu_lp_system_param_t param = {.analog = &analog}; + pmu_lp_system_param_default(mode, ¶m); pmu_lp_system_init(ctx, mode, ¶m); } diff --git a/components/esp_hw_support/port/esp32c6/pmu_param.c b/components/esp_hw_support/port/esp32c6/pmu_param.c index af0e1c38b4..850cc6abc5 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_param.c +++ b/components/esp_hw_support/port/esp32c6/pmu_param.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,11 @@ #include "pmu_param.h" #include "soc/pmu_icg_mapping.h" #include "esp_private/esp_pmu.h" +#include "hal/efuse_ll.h" +#include "hal/efuse_hal.h" +#include "esp_hw_log.h" + +static __attribute__((unused)) const char *TAG = "pmu_param"; #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -211,7 +216,7 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .xpd = 1, \ .slp_mem_dbias = 0, \ .slp_logic_dbias = 0, \ - .dbias = HP_CALI_DBIAS \ + .dbias = HP_CALI_DBIAS_DEFAULT \ }, \ .regulator1 = { \ .drv_b = 0x0 \ @@ -231,7 +236,7 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .xpd = 1, \ .slp_mem_dbias = 0, \ .slp_logic_dbias = 0, \ - .dbias = HP_CALI_DBIAS \ + .dbias = HP_CALI_DBIAS_DEFAULT \ }, \ .regulator1 = { \ .drv_b = 0x0 \ @@ -411,7 +416,7 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod .slp_xpd = 0, \ .xpd = 1, \ .slp_dbias = 0, \ - .dbias = LP_CALI_DBIAS \ + .dbias = LP_CALI_DBIAS_DEFAULT \ }, \ .regulator1 = { \ .drv_b = 0x0 \ @@ -445,3 +450,53 @@ const pmu_lp_system_analog_param_t * pmu_lp_system_analog_param_default(pmu_lp_m assert(mode < ARRAY_SIZE(lp_analog)); return &lp_analog[mode]; } + +uint32_t get_act_hp_dbias(void) +{ + /* hp_cali_dbias is read from efuse to ensure that the hp_active_voltage is close to 1.15V + */ + uint32_t hp_cali_dbias = HP_CALI_DBIAS_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + hp_cali_dbias = efuse_ll_get_active_hp_dbias(); + if (hp_cali_dbias != 0) { + //efuse dbias need to add 2 to meet the CPU frequency switching + if (hp_cali_dbias + 2 > 31) { + hp_cali_dbias = 31; + } else { + hp_cali_dbias += 2; + } + } else { + hp_cali_dbias = HP_CALI_DBIAS_DEFAULT; + ESP_HW_LOGD(TAG, "hp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version); + } + } + + return hp_cali_dbias; +} + +uint32_t get_act_lp_dbias(void) +{ + /* lp_cali_dbias is read from efuse to ensure that the lp_active_voltage is close to 1.15V + */ + uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + lp_cali_dbias = efuse_ll_get_active_lp_dbias(); + if (lp_cali_dbias != 0) { + //efuse dbias need to add 2 to meet the CPU frequency switching + if (lp_cali_dbias + 2 > 31) { + lp_cali_dbias = 31; + } else { + lp_cali_dbias += 2; + } + } else { + lp_cali_dbias = LP_CALI_DBIAS_DEFAULT; + ESP_HW_LOGD(TAG, "lp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version); + } + } else { + ESP_HW_LOGD(TAG, "blk_version is less than 3, act dbias not burnt in efuse\n"); + } + + return lp_cali_dbias; +} diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c index 2f0ab685f5..c85fd72c2c 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -17,13 +17,69 @@ #include "hal/lp_aon_hal.h" #include "esp_private/esp_pmu.h" #include "pmu_param.h" +#include "hal/efuse_ll.h" +#include "hal/efuse_hal.h" +#include "esp_hw_log.h" + +static __attribute__((unused)) const char *TAG = "pmu_sleep"; #define HP(state) (PMU_MODE_HP_ ## state) #define LP(state) (PMU_MODE_LP_ ## state) - static bool s_pmu_sleep_regdma_backup_enabled; +uint32_t get_lslp_dbg(void) +{ + uint32_t pmu_dbg_atten_lightsleep = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + pmu_dbg_atten_lightsleep = efuse_ll_get_lslp_dbg(); + } else { + ESP_HW_LOGD(TAG, "blk_version is less than 3, lslp dbg not burnt in efuse\n"); + } + + return pmu_dbg_atten_lightsleep; +} + +uint32_t get_lslp_hp_dbias(void) +{ + uint32_t pmu_hp_dbias_lightsleep_0v6 = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + pmu_hp_dbias_lightsleep_0v6 = efuse_ll_get_lslp_hp_dbias(); + } else { + ESP_HW_LOGD(TAG, "blk_version is less than 3, lslp hp dbias not burnt in efuse\n"); + } + + return pmu_hp_dbias_lightsleep_0v6; +} + +uint32_t get_dslp_dbg(void) +{ + uint32_t pmu_dbg_atten_deepsleep = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + pmu_dbg_atten_deepsleep = efuse_ll_get_dslp_dbg() + EFUSE_BURN_OFFSET_DSLP_DBG; + } else { + ESP_HW_LOGD(TAG, "blk_version is less than 3, dslp dbg not burnt in efuse\n"); + } + + return pmu_dbg_atten_deepsleep; +} + +uint32_t get_dslp_lp_dbias(void) +{ + uint32_t pmu_lp_dbias_deepsleep_0v7 = PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 3) { + pmu_lp_dbias_deepsleep_0v7 = efuse_ll_get_dslp_lp_dbias() + EFUSE_BURN_OFFSET_DSLP_LP_DBIAS; + } else { + ESP_HW_LOGD(TAG, "blk_version is less than 3, dslp lp dbias not burnt in efuse\n"); + } + + return pmu_lp_dbias_deepsleep_0v7; +} + void pmu_sleep_enable_regdma_backup(void) { if(!s_pmu_sleep_regdma_backup_enabled){ @@ -158,21 +214,28 @@ const pmu_sleep_config_t* pmu_sleep_config_default( if (dslp) { config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags); + analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = get_dslp_dbg(); + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_dslp_lp_dbias(); config->analog = analog_default; } else { pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags); config->digital = digital_default; pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags); + analog_default.hp_sys.analog.dbg_atten = get_lslp_dbg(); + analog_default.hp_sys.analog.dbias = get_lslp_hp_dbias(); + analog_default.lp_sys[LP(SLEEP)].analog.dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT; if (!(pd_flags & PMU_SLEEP_PD_XTAL)){ analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.hp_sys.analog.dbias = HP_CALI_DBIAS; + analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; + analog_default.hp_sys.analog.dbias = get_act_hp_dbias(); analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS; + analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); } config->analog = analog_default; diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h index 75e1f99ff2..950a3ac91b 100644 --- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -16,8 +16,8 @@ extern "C" { #endif -#define HP_CALI_DBIAS 25 -#define LP_CALI_DBIAS 26 +#define HP_CALI_DBIAS_DEFAULT 25 +#define LP_CALI_DBIAS_DEFAULT 26 // FOR XTAL FORCE PU IN SLEEP #define PMU_PD_CUR_SLEEP_ON 0 @@ -36,8 +36,11 @@ extern "C" { #define PMU_HP_XPD_LIGHTSLEEP 1 #define PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT 0 -#define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1 -#define PMU_LP_DBIAS_LIGHTSLEEP_0V7 12 +#define PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT 1 +#define PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT 12 + +// FOR LIGHTSLEEP: XTAL FORCE PU +#define PMU_DBG_ATTEN_ACTIVE_DEFAULT 0 // FOR DEEPSLEEP #define PMU_DBG_HP_DEEPSLEEP 0 @@ -46,8 +49,14 @@ extern "C" { #define PMU_REGDMA_S2A_WORK_TIME_US 480 -#define PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT 12 -#define PMU_LP_DBIAS_DEEPSLEEP_0V7 23 +#define PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT 12 +#define PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT 23 + +#define EFUSE_BURN_OFFSET_DSLP_DBG 8 +#define EFUSE_BURN_OFFSET_DSLP_LP_DBIAS 23 + +uint32_t get_act_hp_dbias(void); +uint32_t get_act_lp_dbias(void); typedef struct { pmu_hp_dig_power_reg_t dig_power; @@ -335,7 +344,7 @@ typedef struct { .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ .xpd = PMU_HP_XPD_LIGHTSLEEP, \ .dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT, \ - .dbias = PMU_HP_DBIAS_LIGHTSLEEP_0V6 \ + .dbias = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT \ } \ }, \ .lp_sys[PMU_MODE_LP_SLEEP] = { \ @@ -347,7 +356,7 @@ typedef struct { .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT, \ .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ .dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT, \ - .dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7 \ + .dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT \ } \ } \ } @@ -370,7 +379,7 @@ typedef struct { .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT, \ .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ .dbg_atten = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT, \ - .dbias = PMU_LP_DBIAS_DEEPSLEEP_0V7 \ + .dbias = PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT \ } \ } \ } diff --git a/components/esp_hw_support/port/esp32c6/rtc_clk_init.c b/components/esp_hw_support/port/esp32c6/rtc_clk_init.c index 2f64255aa3..70c275a1f9 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_clk_init.c +++ b/components/esp_hw_support/port/esp32c6/rtc_clk_init.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -76,8 +76,13 @@ void rtc_clk_init(rtc_clk_config_t cfg) REG_SET_FIELD(LP_CLKRST_RC32K_CNTL_REG, LP_CLKRST_RC32K_DFREQ, cfg.rc32k_dfreq); REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_RTC_DREG, 1); REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_DIG_DREG, 1); - REG_SET_FIELD(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, HP_CALI_DBIAS); - REG_SET_FIELD(PMU_HP_SLEEP_LP_REGULATOR0_REG, PMU_HP_SLEEP_LP_REGULATOR_DBIAS, LP_CALI_DBIAS); + + uint32_t hp_cali_dbias = get_act_hp_dbias(); + uint32_t lp_cali_dbias = get_act_lp_dbias(); + + SET_PERI_REG_BITS(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, hp_cali_dbias, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS_S); + SET_PERI_REG_BITS(PMU_HP_MODEM_HP_REGULATOR0_REG, PMU_HP_MODEM_HP_REGULATOR_DBIAS, hp_cali_dbias, PMU_HP_MODEM_HP_REGULATOR_DBIAS_S); + SET_PERI_REG_BITS(PMU_HP_SLEEP_LP_REGULATOR0_REG, PMU_HP_SLEEP_LP_REGULATOR_DBIAS, lp_cali_dbias, PMU_HP_SLEEP_LP_REGULATOR_DBIAS_S); clk_ll_rc_fast_tick_conf(); diff --git a/components/esp_system/startup_funcs.c b/components/esp_system/startup_funcs.c index 6d887a670a..95ec9328a7 100644 --- a/components/esp_system/startup_funcs.c +++ b/components/esp_system/startup_funcs.c @@ -60,6 +60,10 @@ #include "esp_rom_caps.h" #include "esp_rom_sys.h" +#if SOC_BOD_SUPPORTED +#include "hal/brownout_ll.h" +#endif + #if CONFIG_SPIRAM #include "esp_psram.h" #include "esp_private/esp_psram_extram.h" @@ -147,15 +151,19 @@ ESP_SYSTEM_INIT_FN(init_psram_heap, CORE, BIT(0), 103) return ESP_OK; } -#if CONFIG_ESP_BROWNOUT_DET ESP_SYSTEM_INIT_FN(init_brownout, CORE, BIT(0), 104) { // [refactor-todo] leads to call chain rtc_is_register (driver) -> esp_intr_alloc (esp32/esp32s2) -> // malloc (newlib) -> heap_caps_malloc (heap), so heap must be at least initialized +#if CONFIG_ESP_BROWNOUT_DET esp_brownout_init(); +#else +#if SOC_CAPS_NO_RESET_BY_ANA_BOD + brownout_ll_ana_reset_enable(false); +#endif // SOC_CAPS_NO_RESET_BY_ANA_BOD +#endif // CONFIG_ESP_BROWNOUT_DET return ESP_OK; } -#endif ESP_SYSTEM_INIT_FN(init_newlib_time, CORE, BIT(0), 105) { diff --git a/components/hal/esp32c6/include/hal/brownout_ll.h b/components/hal/esp32c6/include/hal/brownout_ll.h index 913f99ff0b..032ada35ac 100644 --- a/components/hal/esp32c6/include/hal/brownout_ll.h +++ b/components/hal/esp32c6/include/hal/brownout_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -55,7 +55,6 @@ static inline void brownout_ll_reset_config(bool reset_ena, uint32_t reset_wait, LP_ANA_PERI.bod_mode0_cntl.bod_mode0_reset_ena = reset_ena; LP_ANA_PERI.bod_mode0_cntl.bod_mode0_reset_sel = select; } - /** * @brief Set brown out threshold * diff --git a/components/hal/esp32c6/include/hal/efuse_ll.h b/components/hal/esp32c6/include/hal/efuse_ll.h index a899a37d1f..fc687bc9de 100644 --- a/components/hal/esp32c6/include/hal/efuse_ll.h +++ b/components/hal/esp32c6/include/hal/efuse_ll.h @@ -62,6 +62,41 @@ __attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_ver return EFUSE.rd_repeat_data4.disable_wafer_version_major; } +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void) +{ + return EFUSE.rd_mac_spi_sys_2.active_hp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void) +{ + return EFUSE.rd_mac_spi_sys_2.active_lp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void) +{ + return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbg; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void) +{ + return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void) +{ + return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbg; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void) +{ + return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbias; +} + +__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void) +{ + return EFUSE.rd_mac_spi_sys_2.dbias_vol_gap; +} + __attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void) { return EFUSE.rd_mac_spi_sys_3.blk_version_major; diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 23004cea20..8ae015c118 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1398,3 +1398,7 @@ config SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND config SOC_PHY_COMBO_MODULE bool default y + +config SOC_CAPS_NO_RESET_BY_ANA_BOD + bool + default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index eeefc68d60..55c0ebf027 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -559,3 +559,6 @@ /*------------------------------------- PHY CAPS -------------------------------------*/ #define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BLE and 15.4*/ + +/*------------------------------------- No Reset CAPS -------------------------------------*/ +#define SOC_CAPS_NO_RESET_BY_ANA_BOD (1)