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ci: Fix for ETSTimers arm & disarm run from IRAM
UT
- For ESP32 | SPIRAM_MALLOC_ALWAYSINTERNAL=0 - Forced `esp_timer_create` to allocate resource from the internal memory - WiFi/BT coexistence will sometimes arm/disarm timers from an ISR where flash may be disabled. This can lead to a cache-based exception as the timer instance will be located in the PSRAM.
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@ -122,7 +122,7 @@ esp_err_t esp_timer_create(const esp_timer_create_args_t* args,
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args->dispatch_method < 0 || args->dispatch_method >= ESP_TIMER_MAX) {
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args->dispatch_method < 0 || args->dispatch_method >= ESP_TIMER_MAX) {
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return ESP_ERR_INVALID_ARG;
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return ESP_ERR_INVALID_ARG;
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}
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}
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esp_timer_handle_t result = (esp_timer_handle_t) calloc(1, sizeof(*result));
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esp_timer_handle_t result = (esp_timer_handle_t) heap_caps_calloc(1, sizeof(*result), MALLOC_CAP_8BIT | MALLOC_CAP_INTERNAL);
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if (result == NULL) {
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if (result == NULL) {
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return ESP_ERR_NO_MEM;
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return ESP_ERR_NO_MEM;
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}
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}
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