diff --git a/components/esp_adc/test_apps/adc/main/CMakeLists.txt b/components/esp_adc/test_apps/adc/main/CMakeLists.txt index b545b3fc48..7251400011 100644 --- a/components/esp_adc/test_apps/adc/main/CMakeLists.txt +++ b/components/esp_adc/test_apps/adc/main/CMakeLists.txt @@ -3,7 +3,7 @@ set(srcs "test_app_main.c" "test_adc_performance.c" "test_adc_driver.c" "test_adc_driver_iram.c" - "test_adc2_wifi.c" + "test_adc_wifi.c" "test_common_adc.c") # In order for the cases defined by `TEST_CASE` to be linked into the final elf, diff --git a/components/esp_adc/test_apps/adc/main/test_adc2_wifi.c b/components/esp_adc/test_apps/adc/main/test_adc_wifi.c similarity index 55% rename from components/esp_adc/test_apps/adc/main/test_adc2_wifi.c rename to components/esp_adc/test_apps/adc/main/test_adc_wifi.c index 8a25812526..23e8cae3d3 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc2_wifi.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_wifi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,32 +18,32 @@ #include "test_common_adc.h" #include "test_utils.h" -/** - * On ESP32C3, ADC2 is no longer supported, due to its HW limitation. - */ -#if (SOC_ADC_PERIPH_NUM > 1) && !CONFIG_IDF_TARGET_ESP32C3 +#if SOC_WIFI_SUPPORTED && SOC_ADC_SUPPORTED -static const char* TAG = "test_adc2"; +static const char* TAG = "test_adc_wifi"; #define DEFAULT_SSID "TEST_SSID" #define DEFAULT_PWD "TEST_PASS" +//ADC Channels #if CONFIG_IDF_TARGET_ESP32 -#define TEST_ADC2_CHAN0 ADC_CHANNEL_9 -#elif CONFIG_IDF_TARGET_ESP32S2 -#define TEST_ADC2_CHAN0 ADC_CHANNEL_0 -#elif CONFIG_IDF_TARGET_ESP32C3 -#define TEST_ADC2_CHAN0 ADC_CHANNEL_0 -#elif CONFIG_IDF_TARGET_ESP32S3 -#define TEST_ADC2_CHAN0 ADC_CHANNEL_0 +#define ADC1_WIFI_TEST_CHAN0 ADC_CHANNEL_4 +#define ADC2_WIFI_TEST_CHAN0 ADC_CHANNEL_9 +#else +#define ADC1_WIFI_TEST_CHAN0 ADC_CHANNEL_0 +#define ADC2_WIFI_TEST_CHAN0 ADC_CHANNEL_0 #endif -#define ADC_ERROR_THRES 100 +#define ADC_ERROR_THRES 200 #define TEST_NUM 8 #define MINUS_UNTIL_ZERO(a, b) ( ((a) > (b)) ? ((a)-(b)): 0) #define TIME_REMAIN(start, now, timeout) ((now) >= (start) ? MINUS_UNTIL_ZERO((timeout), (now)-(start)) : -1) +static int read_raw; +static int target_value; +static int test_adc_io; +static bool test_list[TEST_NUM] = {1, 1, 0, 0, 1, 0, 1, 0}; static void wifi_event_handler(void* arg, esp_event_base_t event_base, int32_t event_id, void* event_data) @@ -98,7 +98,30 @@ static int event_deinit(void) return ESP_OK; } -TEST_CASE("adc2 work with wifi","[adc]") +static void s_test_adc_work_when_wifi_on(adc_oneshot_unit_handle_t adc_handle, adc_channel_t channel) +{ + esp_err_t ret = ESP_FAIL; + int32_t start = xTaskGetTickCount(); + int32_t now; + int32_t remain_wait_ms = 0; + int32_t timeout = pdMS_TO_TICKS(10); + do { + now = xTaskGetTickCount(); + remain_wait_ms = pdTICKS_TO_MS(TIME_REMAIN(start, now, timeout)); + ret = adc_oneshot_read(adc_handle, channel, &read_raw); + if (ret == ESP_OK) { + printf("When WiFi is ON, ADC read: %d (target_value: %d)\n", read_raw, target_value); + TEST_ASSERT_INT_WITHIN(ADC_ERROR_THRES, target_value, read_raw); + break; + } else if (ret == ESP_ERR_TIMEOUT) { + continue; + } else { + TEST_ESP_OK(ret); + } + } while (remain_wait_ms); +} + +__attribute__((unused)) static void adc_work_with_wifi(adc_unit_t unit_id, adc_channel_t channel) { test_case_uses_tcpip(); @@ -132,82 +155,83 @@ TEST_CASE("adc2 work with wifi","[adc]") TEST_ESP_OK(esp_wifi_set_config(WIFI_IF_STA, &wifi_config)); //---------------------------------ADC init-----------------------------------// - int read_raw; - int target_value; - int test_adc_io; - bool test_list[TEST_NUM] = {1, 1, 0, 0, 1, 0, 1, 0}; - TEST_ESP_OK(adc_oneshot_channel_to_io(ADC_UNIT_2, TEST_ADC2_CHAN0, &test_adc_io)); + TEST_ESP_OK(adc_oneshot_channel_to_io(unit_id, channel, &test_adc_io)); printf("test_adc_io is %d\n", test_adc_io); - //-------------ADC2 Init---------------// - adc_oneshot_unit_handle_t adc2_handle; - adc_oneshot_unit_init_cfg_t init_config2 = { - .unit_id = ADC_UNIT_2, + //-------------ADC Init---------------// + adc_oneshot_unit_handle_t adc_handle; + adc_oneshot_unit_init_cfg_t init_config = { + .unit_id = unit_id, .ulp_mode = ADC_ULP_MODE_DISABLE, }; - TEST_ESP_OK(adc_oneshot_new_unit(&init_config2, &adc2_handle)); + TEST_ESP_OK(adc_oneshot_new_unit(&init_config, &adc_handle)); - //-------------ADC2 TEST Channel 0 Config---------------// + //-------------ADC TEST Channel Config---------------// adc_oneshot_chan_cfg_t config = { .bitwidth = ADC_BITWIDTH_DEFAULT, .atten = ADC_ATTEN_DB_11, }; - TEST_ESP_OK(adc_oneshot_config_channel(adc2_handle, TEST_ADC2_CHAN0, &config)); + TEST_ESP_OK(adc_oneshot_config_channel(adc_handle, channel, &config)); for (int i = 0; i < TEST_NUM; i++) { /* Tune test ADC channel level */ - test_adc_set_io_level(ADC_UNIT_2, TEST_ADC2_CHAN0, test_list[i]); + test_adc_set_io_level(unit_id, channel, test_list[i]); target_value = test_list[i] ? ADC_TEST_HIGH_VAL : ADC_TEST_LOW_VAL; - /* ADC2 single read before WIFI start */ - TEST_ESP_OK(adc_oneshot_read(adc2_handle, TEST_ADC2_CHAN0, &read_raw)); + /* ADC single read before WIFI start */ + TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &read_raw)); printf("Before WiFi starts, ADC read: %d (target_value: %d)\n", read_raw, target_value); TEST_ASSERT_INT_WITHIN(ADC_ERROR_THRES, target_value, read_raw); - /* ADC2 single read when WIFI is on */ + /* ADC single read when WIFI is on */ TEST_ESP_OK(esp_wifi_start()); #if CONFIG_IDF_TARGET_ESP32 - TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, adc_oneshot_read(adc2_handle, TEST_ADC2_CHAN0, &read_raw)); + if (unit_id == 1) { + // On ESP32 ADC2, PWDET/PKDET controller is for Wi-Fi internal use only. + // If Wi-Fi module is using the SAR ADC2, users can not measure the analog signal from the pins using SAR ADC2. + // After SAR ADC2 is released by Wi-Fi, users can use SAR ADC2 normally. + TEST_ASSERT_EQUAL(ESP_ERR_TIMEOUT, adc_oneshot_read(adc_handle, channel, &read_raw)); + } else { + s_test_adc_work_when_wifi_on(adc_handle, channel); + } #else - esp_err_t ret = ESP_FAIL; - int32_t start = xTaskGetTickCount(); - int32_t now; - int32_t remain_wait_ms = 0; - int32_t timeout = pdMS_TO_TICKS(10); - - do { - now = xTaskGetTickCount(); - remain_wait_ms = pdTICKS_TO_MS(TIME_REMAIN(start, now, timeout)); - ret = adc_oneshot_read(adc2_handle, TEST_ADC2_CHAN0, &read_raw); - if (ret == ESP_OK) { - printf("When WiFi is ON, ADC read: %d (target_value: %d)\n", read_raw, target_value); - TEST_ASSERT_INT_WITHIN(ADC_ERROR_THRES, target_value, read_raw); - break; - } else if (ret == ESP_ERR_TIMEOUT) { - continue; - } else { - TEST_ESP_OK(ret); - } - } while (remain_wait_ms); + s_test_adc_work_when_wifi_on(adc_handle, channel); #endif - - - /* ADC2 single read after WIFI is off */ + /* ADC single read after WIFI is off */ TEST_ESP_OK(esp_wifi_stop()); - TEST_ESP_OK(adc_oneshot_read(adc2_handle, TEST_ADC2_CHAN0, &read_raw)); + TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &read_raw)); printf("After WiFi is OFF, ADC read: %d (target_value: %d)\n\n", read_raw, target_value); TEST_ASSERT_INT_WITHIN(ADC_ERROR_THRES, target_value, read_raw); } + TEST_ESP_OK(adc_oneshot_del_unit(adc_handle)); + ESP_LOGI(TAG, "ADC%d with WiFi test is success", unit_id + 1); + TEST_ESP_OK(esp_wifi_deinit()); event_deinit(); nvs_flash_deinit(); - TEST_ESP_OK(adc_oneshot_del_unit(adc2_handle)); TEST_IGNORE_MESSAGE("this test case is ignored due to the critical memory leak of esp_netif and event_loop."); } -#endif //#if (SOC_ADC_PERIPH_NUM > 1) +#if CONFIG_IDF_TARGET_ESP32C6 +// On ESP32C6, ADC need to call two modem clocks: modem_syscon_ll_enable_fe_80m_clock and modem_syscon_ll_enable_fe_apb_clock. +// Without calling these two clocks, PWDET mode will not take into effect, so ADC readings will be wrong. +TEST_CASE("ADC1 work with WiFi","[adc]") +{ + adc_work_with_wifi(ADC_UNIT_1, ADC1_WIFI_TEST_CHAN0); +} +#endif // CONFIG_IDF_TARGET_ESP32C6 + +#if (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3 +// On ESP32C3, ADC2 is no longer supported, due to its HW limitation. +TEST_CASE("ADC2 work with WiFi","[adc]") +{ + adc_work_with_wifi(ADC_UNIT_2, ADC2_WIFI_TEST_CHAN0); +} +#endif // (SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3 + +#endif //SOC_WIFI_SUPPORTED && SOC_ADC_SUPPORTED diff --git a/components/esp_hw_support/include/esp_private/esp_modem_clock.h b/components/esp_hw_support/include/esp_private/esp_modem_clock.h index bd822ebfbd..1aae8638e8 100644 --- a/components/esp_hw_support/include/esp_private/esp_modem_clock.h +++ b/components/esp_hw_support/include/esp_private/esp_modem_clock.h @@ -124,6 +124,13 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module); */ void modem_clock_wifi_mac_reset(void); +/** + * @brief Enable clock registers which shared by both modem and ADC. Need a ref count to enable/disable them + * + * @param enable true: enable; false: disable + */ +void modem_clock_shared_enable(bool enable); + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 3ad811bdd6..f48a281bc9 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -21,7 +21,8 @@ // Please define the frequently called modules in the low bit, // which will improve the execution efficiency typedef enum { - MODEM_CLOCK_FE, + MODEM_CLOCK_MODEM_ADC_COMMON_FE, + MODEM_CLOCK_MODEM_PRIVATE_FE, MODEM_CLOCK_COEXIST, MODEM_CLOCK_I2C_MASTER, #if SOC_WIFI_SUPPORTED @@ -99,9 +100,14 @@ static void IRAM_ATTR modem_clock_coex_configure(modem_clock_context_t *ctx, boo modem_lpcon_ll_enable_coex_clock(ctx->hal->lpcon_dev, enable); } -static void IRAM_ATTR modem_clock_fe_configure(modem_clock_context_t *ctx, bool enable) +static void IRAM_ATTR modem_clock_modem_adc_common_fe_configure(modem_clock_context_t *ctx, bool enable) { - modem_clock_hal_enable_fe_clock(ctx->hal, enable); + modem_clock_hal_enable_modem_adc_common_fe_clock(ctx->hal, enable); +} + +static void IRAM_ATTR modem_clock_modem_private_fe_configure(modem_clock_context_t *ctx, bool enable) +{ + modem_clock_hal_enable_modem_private_fe_clock(ctx->hal, enable); } static void IRAM_ATTR modem_clock_i2c_master_configure(modem_clock_context_t *ctx, bool enable) @@ -127,22 +133,23 @@ modem_clock_context_t * __attribute__((weak)) IRAM_ATTR MODEM_CLOCK_instance(voi static DRAM_ATTR modem_clock_context_t modem_clock_context = { .hal = &modem_clock_hal, .lock = portMUX_INITIALIZER_UNLOCKED, .dev = { - [MODEM_CLOCK_FE] = { .refs = 0, .configure = modem_clock_fe_configure }, - [MODEM_CLOCK_COEXIST] = { .refs = 0, .configure = modem_clock_coex_configure }, - [MODEM_CLOCK_I2C_MASTER] = { .refs = 0, .configure = modem_clock_i2c_master_configure }, + [MODEM_CLOCK_MODEM_ADC_COMMON_FE] = { .refs = 0, .configure = modem_clock_modem_adc_common_fe_configure }, + [MODEM_CLOCK_MODEM_PRIVATE_FE] = { .refs = 0, .configure = modem_clock_modem_private_fe_configure }, + [MODEM_CLOCK_COEXIST] = { .refs = 0, .configure = modem_clock_coex_configure }, + [MODEM_CLOCK_I2C_MASTER] = { .refs = 0, .configure = modem_clock_i2c_master_configure }, #if SOC_WIFI_SUPPORTED - [MODEM_CLOCK_WIFI_MAC] = { .refs = 0, .configure = modem_clock_wifi_mac_configure }, - [MODEM_CLOCK_WIFI_BB] = { .refs = 0, .configure = modem_clock_wifi_bb_configure }, + [MODEM_CLOCK_WIFI_MAC] = { .refs = 0, .configure = modem_clock_wifi_mac_configure }, + [MODEM_CLOCK_WIFI_BB] = { .refs = 0, .configure = modem_clock_wifi_bb_configure }, #endif - [MODEM_CLOCK_ETM] = { .refs = 0, .configure = modem_clock_etm_configure }, + [MODEM_CLOCK_ETM] = { .refs = 0, .configure = modem_clock_etm_configure }, #if SOC_BT_SUPPORTED - [MODEM_CLOCK_BLE_MAC] = { .refs = 0, .configure = modem_clock_ble_mac_configure }, - [MODEM_CLOCK_BLE_BB] = { .refs = 0, .configure = modem_clock_ble_bb_configure }, + [MODEM_CLOCK_BLE_MAC] = { .refs = 0, .configure = modem_clock_ble_mac_configure }, + [MODEM_CLOCK_BLE_BB] = { .refs = 0, .configure = modem_clock_ble_bb_configure }, #endif #if SOC_IEEE802154_SUPPORTED - [MODEM_CLOCK_802154_MAC] = { .refs = 0, .configure = modem_clock_ieee802154_mac_configure }, + [MODEM_CLOCK_802154_MAC] = { .refs = 0, .configure = modem_clock_ieee802154_mac_configure }, #endif - [MODEM_CLOCK_DATADUMP] = { .refs = 0, .configure = modem_clock_data_dump_configure } + [MODEM_CLOCK_DATADUMP] = { .refs = 0, .configure = modem_clock_data_dump_configure } }, .lpclk_src = { [0 ... PERIPH_MODEM_MODULE_NUM - 1] = MODEM_CLOCK_LPCLK_SRC_INVALID } }; @@ -159,16 +166,16 @@ static void IRAM_ATTR modem_clock_domain_power_state_icg_map_init(modem_clock_co /* the ICG code's bit 0, 1 and 2 indicates the ICG state * of pmu SLEEP, MODEM and ACTIVE mode respectively */ const uint32_t code[MODEM_CLOCK_DOMAIN_MAX] = { - [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, - [MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, + [MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, }; for (modem_clock_domain_t domain = MODEM_CLOCK_DOMAIN_MODEM_APB; domain < MODEM_CLOCK_DOMAIN_MAX; domain++) { modem_clock_hal_set_clock_domain_icg_bitmap(ctx->hal, domain, code[domain]); @@ -279,30 +286,32 @@ void IRAM_ATTR modem_clock_module_mac_reset(periph_module_t module) #define BLE_CLOCK_DEPS (BIT(MODEM_CLOCK_BLE_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST)) #define IEEE802154_CLOCK_DEPS (BIT(MODEM_CLOCK_802154_MAC) | BIT(MODEM_CLOCK_BLE_BB) | BIT(MODEM_CLOCK_ETM) | BIT(MODEM_CLOCK_COEXIST)) #define COEXIST_CLOCK_DEPS (BIT(MODEM_CLOCK_COEXIST)) -#define PHY_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER) | BIT(MODEM_CLOCK_FE)) +#define PHY_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER) | BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE) | BIT(MODEM_CLOCK_MODEM_PRIVATE_FE)) #define I2C_ANA_MST_CLOCK_DEPS (BIT(MODEM_CLOCK_I2C_MASTER)) #define MODEM_ETM_CLOCK_DEPS (BIT(MODEM_CLOCK_ETM)) +#define MODEM_ADC_COMMON_FE_CLOCK_DEPS (BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE)) static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module) { uint32_t deps = 0; switch (module) { - case PERIPH_ANA_I2C_MASTER_MODULE: deps = I2C_ANA_MST_CLOCK_DEPS; break; - case PERIPH_PHY_MODULE: deps = PHY_CLOCK_DEPS; break; + case PERIPH_ANA_I2C_MASTER_MODULE: deps = I2C_ANA_MST_CLOCK_DEPS; break; + case PERIPH_PHY_MODULE: deps = PHY_CLOCK_DEPS; break; + case PERIPH_MODEM_ADC_COMMON_FE_MODULE: deps = MODEM_ADC_COMMON_FE_CLOCK_DEPS; break; #if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED - case PERIPH_COEX_MODULE: deps = COEXIST_CLOCK_DEPS; break; + case PERIPH_COEX_MODULE: deps = COEXIST_CLOCK_DEPS; break; #endif #if SOC_WIFI_SUPPORTED - case PERIPH_WIFI_MODULE: deps = WIFI_CLOCK_DEPS; break; + case PERIPH_WIFI_MODULE: deps = WIFI_CLOCK_DEPS; break; #endif #if SOC_BT_SUPPORTED - case PERIPH_BT_MODULE: deps = BLE_CLOCK_DEPS; break; + case PERIPH_BT_MODULE: deps = BLE_CLOCK_DEPS; break; #endif #if SOC_IEEE802154_SUPPORTED - case PERIPH_IEEE802154_MODULE: deps = IEEE802154_CLOCK_DEPS; break; + case PERIPH_IEEE802154_MODULE: deps = IEEE802154_CLOCK_DEPS; break; #endif #if SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED - case PERIPH_MODEM_ETM_MODULE: deps = MODEM_ETM_CLOCK_DEPS; break; + case PERIPH_MODEM_ETM_MODULE: deps = MODEM_ETM_CLOCK_DEPS; break; #endif default: assert(0); diff --git a/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c index c0b853124a..c541f2b570 100644 --- a/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c +++ b/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c @@ -18,6 +18,7 @@ #include "esp_log.h" #include "freertos/FreeRTOS.h" #include "esp_private/sar_periph_ctrl.h" +#include "esp_private/esp_modem_clock.h" #include "hal/sar_ctrl_ll.h" static const char *TAG = "sar_periph_ctrl"; @@ -55,6 +56,7 @@ static int s_pwdet_power_on_cnt; static void s_sar_power_acquire(void) { + modem_clock_module_enable(PERIPH_MODEM_ADC_COMMON_FE_MODULE); portENTER_CRITICAL_SAFE(&rtc_spinlock); s_pwdet_power_on_cnt++; if (s_pwdet_power_on_cnt == 1) { @@ -75,6 +77,7 @@ static void s_sar_power_release(void) sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM); } portEXIT_CRITICAL_SAFE(&rtc_spinlock); + modem_clock_module_disable(PERIPH_MODEM_ADC_COMMON_FE_MODULE); } diff --git a/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c index 79598ee0eb..115f4077bd 100644 --- a/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c +++ b/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c @@ -17,6 +17,7 @@ #include "esp_log.h" #include "freertos/FreeRTOS.h" #include "esp_private/sar_periph_ctrl.h" +#include "esp_private/esp_modem_clock.h" #include "hal/sar_ctrl_ll.h" static const char *TAG = "sar_periph_ctrl"; @@ -54,6 +55,7 @@ static int s_pwdet_power_on_cnt; static void s_sar_power_acquire(void) { + modem_clock_module_enable(PERIPH_MODEM_ADC_COMMON_FE_MODULE); portENTER_CRITICAL_SAFE(&rtc_spinlock); s_pwdet_power_on_cnt++; if (s_pwdet_power_on_cnt == 1) { @@ -74,6 +76,7 @@ static void s_sar_power_release(void) sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM); } portEXIT_CRITICAL_SAFE(&rtc_spinlock); + modem_clock_module_disable(PERIPH_MODEM_ADC_COMMON_FE_MODULE); } diff --git a/components/hal/esp32c6/modem_clock_hal.c b/components/hal/esp32c6/modem_clock_hal.c index 553c7cbfac..179ec2cf5c 100644 --- a/components/hal/esp32c6/modem_clock_hal.c +++ b/components/hal/esp32c6/modem_clock_hal.c @@ -36,7 +36,7 @@ void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, case MODEM_CLOCK_DOMAIN_BT: modem_syscon_ll_set_bt_icg_bitmap(hal->syscon_dev, bitmap); break; - case MODEM_CLOCK_DOMAIN_FE: + case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE: modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap); break; case MODEM_CLOCK_DOMAIN_IEEE802154: @@ -77,7 +77,7 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t * case MODEM_CLOCK_DOMAIN_BT: bitmap = modem_syscon_ll_get_bt_icg_bitmap(hal->syscon_dev); break; - case MODEM_CLOCK_DOMAIN_FE: + case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE: bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev); break; case MODEM_CLOCK_DOMAIN_IEEE802154: @@ -101,13 +101,19 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t * return bitmap; } -void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable) +void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable) { if (enable) { modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable); + modem_syscon_ll_enable_fe_80m_clock(hal->syscon_dev, enable); + } +} + +void IRAM_ATTR modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable) +{ + if (enable) { modem_syscon_ll_enable_fe_cal_160m_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_160m_clock(hal->syscon_dev, enable); - modem_syscon_ll_enable_fe_80m_clock(hal->syscon_dev, enable); } } diff --git a/components/hal/esp32h2/modem_clock_hal.c b/components/hal/esp32h2/modem_clock_hal.c index eb77e7b45b..b120b52a36 100644 --- a/components/hal/esp32h2/modem_clock_hal.c +++ b/components/hal/esp32h2/modem_clock_hal.c @@ -19,12 +19,16 @@ typedef enum { MODEM_CLOCK_EXT32K_CODE = 2 } modem_clock_32k_clk_src_code_t; -void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable) +void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable) +{ + modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable); +} + +void IRAM_ATTR modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable) { modem_lpcon_ll_enable_fe_mem_clock(hal->lpcon_dev, enable); modem_syscon_ll_enable_fe_sdm_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_adc_clock(hal->syscon_dev, enable); - modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_32m_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_16m_clock(hal->syscon_dev, enable); } diff --git a/components/hal/include/hal/modem_clock_hal.h b/components/hal/include/hal/modem_clock_hal.h index 9e74e37d22..e3cb2b8e05 100644 --- a/components/hal/include/hal/modem_clock_hal.h +++ b/components/hal/include/hal/modem_clock_hal.h @@ -27,7 +27,8 @@ void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain); #endif -void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable); +void modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable); +void modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable); #if SOC_BT_SUPPORTED void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider); diff --git a/components/hal/include/hal/modem_clock_types.h b/components/hal/include/hal/modem_clock_types.h index ed435be226..e430a0610f 100644 --- a/components/hal/include/hal/modem_clock_types.h +++ b/components/hal/include/hal/modem_clock_types.h @@ -15,13 +15,13 @@ typedef enum { MODEM_CLOCK_DOMAIN_MODEM_PERIPH, MODEM_CLOCK_DOMAIN_WIFI, MODEM_CLOCK_DOMAIN_BT, - MODEM_CLOCK_DOMAIN_FE, + MODEM_CLOCK_DOMAIN_MODEM_ADC_COMMON_FE, + MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE, MODEM_CLOCK_DOMAIN_IEEE802154, MODEM_CLOCK_DOMAIN_LP_APB, MODEM_CLOCK_DOMAIN_I2C_MASTER, MODEM_CLOCK_DOMAIN_COEX, MODEM_CLOCK_DOMAIN_WIFIPWR, - MODEM_CLOCK_DOMAIN_MAX } modem_clock_domain_t; diff --git a/components/soc/esp32c6/include/soc/periph_defs.h b/components/soc/esp32c6/include/soc/periph_defs.h index b3a115731b..e4c401a9ad 100644 --- a/components/soc/esp32c6/include/soc/periph_defs.h +++ b/components/soc/esp32c6/include/soc/periph_defs.h @@ -51,12 +51,13 @@ typedef enum { PERIPH_PHY_MODULE, PERIPH_ANA_I2C_MASTER_MODULE, PERIPH_MODEM_ETM_MODULE, + PERIPH_MODEM_ADC_COMMON_FE_MODULE, PERIPH_MODULE_MAX /* !!! Don't append soc modules here !!! */ } periph_module_t; #define PERIPH_MODEM_MODULE_MIN PERIPH_WIFI_MODULE -#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ETM_MODULE +#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1) #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX)) diff --git a/components/soc/esp32h2/include/soc/periph_defs.h b/components/soc/esp32h2/include/soc/periph_defs.h index 7d3f8b8093..ec4233c304 100644 --- a/components/soc/esp32h2/include/soc/periph_defs.h +++ b/components/soc/esp32h2/include/soc/periph_defs.h @@ -49,12 +49,13 @@ typedef enum { PERIPH_PHY_MODULE, PERIPH_ANA_I2C_MASTER_MODULE, PERIPH_MODEM_ETM_MODULE, + PERIPH_MODEM_ADC_COMMON_FE_MODULE, PERIPH_MODULE_MAX /* !!! Don't append soc modules here !!! */ } periph_module_t; #define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE -#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ETM_MODULE +#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1) #define IS_MODEM_MODULE(periph) ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))