From bd6cd85b8edda5c798a4860b00cdb228ff4b3eae Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 16 May 2023 15:34:28 +0800 Subject: [PATCH] adc: added big conv_frame test --- .../test_apps/adc/main/test_adc_driver.c | 96 +++++++++++++++++-- 1 file changed, 90 insertions(+), 6 deletions(-) diff --git a/components/esp_adc/test_apps/adc/main/test_adc_driver.c b/components/esp_adc/test_apps/adc/main/test_adc_driver.c index 886ecf7274..e163fa0e83 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_driver.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_driver.c @@ -34,7 +34,8 @@ const __attribute__((unused)) static char *TAG = "TEST_ADC"; ---------------------------------------------------------------*/ typedef struct { TaskHandle_t task_handle; //Task handle - adc_oneshot_unit_handle_t adc_handle; //ADC handle + adc_oneshot_unit_handle_t oneshot_handle; //oneshot handle + adc_continuous_handle_t continuous_handle; //continuous handle bool level; //ADC level } test_adc_isr_ctx_t; @@ -50,7 +51,7 @@ static bool IRAM_ATTR s_alarm_callback(gptimer_handle_t timer, const gptimer_ala */ esp_rom_printf("alarm isr count=%llu\r\n", edata->count_value); - TEST_ESP_OK(adc_oneshot_read_isr(test_ctx->adc_handle, ADC1_TEST_CHAN0, &adc_raw)); + TEST_ESP_OK(adc_oneshot_read_isr(test_ctx->oneshot_handle, ADC1_TEST_CHAN0, &adc_raw)); esp_rom_printf("adc raw: %d\r\n", adc_raw); if (test_ctx->level) { TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw); @@ -68,7 +69,7 @@ static bool IRAM_ATTR s_alarm_callback(gptimer_handle_t timer, const gptimer_ala TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]") { static test_adc_isr_ctx_t isr_test_ctx = {}; - isr_test_ctx.adc_handle = NULL; + isr_test_ctx.oneshot_handle = NULL; isr_test_ctx.task_handle = xTaskGetCurrentTaskHandle(); //-------------ADC1 Init---------------// @@ -76,14 +77,14 @@ TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]") .unit_id = ADC_UNIT_1, .ulp_mode = ADC_ULP_MODE_DISABLE, }; - TEST_ESP_OK(adc_oneshot_new_unit(&init_config1, &isr_test_ctx.adc_handle)); + TEST_ESP_OK(adc_oneshot_new_unit(&init_config1, &isr_test_ctx.oneshot_handle)); //-------------ADC1 TEST Channel 0 Config---------------// adc_oneshot_chan_cfg_t config = { .bitwidth = ADC_BITWIDTH_DEFAULT, .atten = ADC_ATTEN_DB_11, }; - TEST_ESP_OK(adc_oneshot_config_channel(isr_test_ctx.adc_handle, ADC1_TEST_CHAN0, &config)); + TEST_ESP_OK(adc_oneshot_config_channel(isr_test_ctx.oneshot_handle, ADC1_TEST_CHAN0, &config)); //-------------GPTimer Init & Config---------------// gptimer_handle_t timer = NULL; @@ -127,10 +128,93 @@ TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]") //Tear Down TEST_ESP_OK(gptimer_disable(timer)); TEST_ESP_OK(gptimer_del_timer(timer)); - TEST_ESP_OK(adc_oneshot_del_unit(isr_test_ctx.adc_handle)); + TEST_ESP_OK(adc_oneshot_del_unit(isr_test_ctx.oneshot_handle)); } #if SOC_ADC_DMA_SUPPORTED +#if (SOC_ADC_DIGI_RESULT_BYTES == 2) +#define ADC_DRIVER_TEST_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE1 +#define ADC_DRIVER_TEST_GET_CHANNEL(p_data) ((p_data)->type1.channel) +#define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type1.data) +#else +#define ADC_DRIVER_TEST_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2 +#define ADC_DRIVER_TEST_GET_CHANNEL(p_data) ((p_data)->type2.channel) +#define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type2.data) +#endif + +#define ADC_FRAME_TEST_SIZE 8192 + + +static bool IRAM_ATTR NOINLINE_ATTR s_conv_done_cb_frame_size_test(adc_continuous_handle_t handle, const adc_continuous_evt_data_t *edata, void *user_data) +{ + test_adc_isr_ctx_t *test_ctx = (test_adc_isr_ctx_t *)user_data; + BaseType_t high_task_wakeup; + + vTaskNotifyGiveFromISR(test_ctx->task_handle, &high_task_wakeup); + + return high_task_wakeup == pdTRUE; +} + +TEST_CASE("ADC continuous big conv_frame_size test", "[adc_continuous]") +{ + static test_adc_isr_ctx_t isr_test_ctx = {}; + isr_test_ctx.continuous_handle = NULL; + isr_test_ctx.task_handle = xTaskGetCurrentTaskHandle(); + + adc_continuous_handle_t handle = NULL; + adc_continuous_handle_cfg_t adc_config = { + .max_store_buf_size = ADC_FRAME_TEST_SIZE, + .conv_frame_size = ADC_FRAME_TEST_SIZE, + }; + TEST_ESP_OK(adc_continuous_new_handle(&adc_config, &handle)); + isr_test_ctx.continuous_handle = handle; + + adc_continuous_config_t dig_cfg = { + .sample_freq_hz = 50 * 1000, + .conv_mode = ADC_CONV_SINGLE_UNIT_1, + .format = ADC_DRIVER_TEST_OUTPUT_TYPE, + }; + adc_digi_pattern_config_t adc_pattern[SOC_ADC_PATT_LEN_MAX] = {0}; + adc_pattern[0].atten = ADC_ATTEN_DB_11; + adc_pattern[0].channel = ADC1_TEST_CHAN0; + adc_pattern[0].unit = ADC_UNIT_1; + adc_pattern[0].bit_width = SOC_ADC_DIGI_MAX_BITWIDTH; + dig_cfg.adc_pattern = adc_pattern; + dig_cfg.pattern_num = 1; + TEST_ESP_OK(adc_continuous_config(handle, &dig_cfg)); + + adc_continuous_evt_cbs_t cbs = { + .on_conv_done = s_conv_done_cb_frame_size_test, + }; + TEST_ESP_OK(adc_continuous_register_event_callbacks(handle, &cbs, &isr_test_ctx)); + + uint8_t* result = malloc(ADC_FRAME_TEST_SIZE); + TEST_ASSERT(result); + + test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0); + TEST_ESP_OK(adc_continuous_start(handle)); + + for (int i = 0; i < 5; i++) { + uint32_t ret_num = 0; + uint32_t sum = 0; + uint32_t cnt = 0; + ulTaskNotifyTake(pdTRUE, portMAX_DELAY); + TEST_ESP_OK(adc_continuous_read(handle, result, ADC_FRAME_TEST_SIZE, &ret_num, ADC_MAX_DELAY)); + esp_rom_printf("ret_num: %d\n", ret_num); + for (int i = 0; i < ret_num; i += SOC_ADC_DIGI_RESULT_BYTES) { + adc_digi_output_data_t *p = (adc_digi_output_data_t*)&result[i]; + sum += ADC_DRIVER_TEST_GET_DATA(p); + cnt++; + } + esp_rom_printf("avg: %d\n", sum/cnt); + TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, sum/cnt); + } + + TEST_ESP_OK(adc_continuous_stop(handle)); + TEST_ESP_OK(adc_continuous_deinit(handle)); + free(result); +} + #if SOC_ADC_DIG_IIR_FILTER_SUPPORTED TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]") {