esp32: move common fragment definitions

This commit is contained in:
Renz Bagaporo 2021-03-10 19:33:24 +08:00
parent 1b4e4c37b7
commit bbc599493e
20 changed files with 105 additions and 379 deletions

View File

@ -26,7 +26,7 @@ else()
# esp_timer is added here because cpu_start.c uses esp_timer
set(priv_requires app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread
spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc esp_pm)
set(fragments linker.lf ld/esp32_fragments.lf)
set(fragments linker.lf)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"

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@ -17,7 +17,7 @@ COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH)/ld \
-u ld_include_panic_highint_hdl \
$(addprefix -T ,$(LINKER_SCRIPTS)) \
COMPONENT_ADD_LDFRAGMENTS += ld/esp32_fragments.lf linker.lf
COMPONENT_ADD_LDFRAGMENTS += linker.lf
# final linking of project ELF depends on all binary libraries, and
# all linker scripts (except esp32_out.ld, as this is code generated here.)

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@ -1,120 +0,0 @@
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:legacy_bss]
entries:
.dynsbss
.sbss+
.gnu.linkonce.sb+
.scommon
.sbss2+
.gnu.linkonce.sb2+
.dynbss
.share.mem
.gnu.linkonce.b+
[sections:rodata]
entries:
.rodata+
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:iram_data]
entries:
.iram.data+
[sections:iram_bss]
entries:
.iram.bss+
[sections:extram_bss]
entries:
.ext_ram.bss+
[sections:dram]
entries:
.dram1+
[scheme:default]
entries:
if APP_BUILD_USE_FLASH_SECTIONS = y:
text -> flash_text
rodata -> flash_rodata
else:
text -> iram0_text
rodata -> dram0_data
data -> dram0_data
bss -> dram0_bss
common -> dram0_bss
if ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY = y:
extram_bss -> extern_ram
else:
extram_bss -> dram0_bss
legacy_bss -> dram0_bss
iram -> iram0_text
iram_data -> iram0_data
iram_bss -> iram0_bss
dram -> dram0_data
rtc_text -> rtc_text
rtc_data -> rtc_data
rtc_rodata -> rtc_data
rtc_bss -> rtc_bss
[scheme:rtc]
entries:
text -> rtc_text
data -> rtc_data
rodata -> rtc_data
bss -> rtc_bss
common -> rtc_bss
[scheme:noflash]
entries:
text -> iram0_text
rodata -> dram0_data
[scheme:noflash_data]
entries:
rodata -> dram0_data
[scheme:noflash_text]
entries:
text -> iram0_text
[mapping:default]
archive: *
entries:
* (default)

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@ -27,7 +27,7 @@ else()
app_trace app_update bootloader_support log mbedtls nvs_flash
pthread spi_flash vfs espcoredump esp_common esp_timer)
set(fragments linker.lf ld/esp32c3_fragments.lf)
set(fragments linker.lf)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"

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@ -1,99 +0,0 @@
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:rodata]
entries:
.rodata+
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:iram_data]
entries:
.iram.data+
[sections:iram_bss]
entries:
.iram.bss+
[sections:dram]
entries:
.dram1+
[scheme:default]
entries:
if APP_BUILD_USE_FLASH_SECTIONS = y:
text -> flash_text
rodata -> flash_rodata
else:
text -> iram0_text
rodata -> dram0_data
data -> dram0_data
bss -> dram0_bss
common -> dram0_bss
iram -> iram0_text
iram_data -> iram0_data
iram_bss -> iram0_bss
dram -> dram0_data
rtc_text -> rtc_text
rtc_data -> rtc_data
rtc_rodata -> rtc_data
rtc_bss -> rtc_bss
[scheme:rtc]
entries:
text -> rtc_text
data -> rtc_data
rodata -> rtc_data
bss -> rtc_bss
common -> rtc_bss
[scheme:noflash]
entries:
text -> iram0_text
rodata -> dram0_data
[scheme:noflash_data]
entries:
rodata -> dram0_data
[scheme:noflash_text]
entries:
text -> iram0_text
[mapping:default]
archive: *
entries:
* (default)

View File

@ -29,7 +29,7 @@ else()
app_trace app_update bootloader_support esp_system log mbedtls nvs_flash
pthread spi_flash vfs espcoredump esp_common esp_timer)
set(fragments linker.lf ld/esp32s2_fragments.lf)
set(fragments linker.lf)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"

View File

@ -26,7 +26,7 @@ else()
# esp_timer is added here because cpu_start.c uses esp_timer
set(priv_requires app_trace app_update bootloader_support log mbedtls nvs_flash pthread
spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc)
set(fragments linker.lf ld/esp32s3_fragments.lf)
set(fragments linker.lf)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"

View File

@ -1,99 +0,0 @@
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:rodata]
entries:
.rodata+
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:iram_data]
entries:
.iram.data+
[sections:iram_bss]
entries:
.iram.bss+
[sections:dram]
entries:
.dram1+
[scheme:default]
entries:
if APP_BUILD_USE_FLASH_SECTIONS = y:
text -> flash_text
rodata -> flash_rodata
else:
text -> iram0_text
rodata -> dram0_data
data -> dram0_data
bss -> dram0_bss
common -> dram0_bss
iram -> iram0_text
iram_data -> iram0_data
iram_bss -> iram0_bss
dram -> dram0_data
rtc_text -> rtc_text
rtc_data -> rtc_data
rtc_rodata -> rtc_data
rtc_bss -> rtc_bss
[scheme:rtc]
entries:
text -> rtc_text
data -> rtc_data
rodata -> rtc_data
bss -> rtc_bss
common -> rtc_bss
[scheme:noflash]
entries:
text -> iram0_text
rodata -> dram0_data
[scheme:noflash_data]
entries:
rodata -> dram0_data
[scheme:noflash_text]
entries:
text -> iram0_text
[mapping:default]
archive: *
entries:
* (default)

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@ -5,7 +5,8 @@ list(APPEND srcs "src/esp_err_to_name.c")
# Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here.
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS include
REQUIRES ${target})
REQUIRES ${target}
LDFRAGMENTS "common.lf" "soc.lf")
set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY LINK_INTERFACE_MULTIPLICITY 4)

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@ -0,0 +1,34 @@
# Sections emitted by compiler by default.
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:legacy_bss]
entries:
.dynsbss
.sbss+
.gnu.linkonce.sb+
.scommon
.sbss2+
.gnu.linkonce.sb2+
.dynbss
.share.mem
.gnu.linkonce.b+
[sections:rodata]
entries:
.rodata+

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@ -4,3 +4,5 @@
COMPONENT_ADD_INCLUDEDIRS := include
COMPONENT_SRCDIRS := src
COMPONENT_ADD_LDFRAGMENTS += common.lf soc.lf

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@ -0,0 +1,43 @@
# Sections that can be placed in memory regions common
# to supported SoCs. This is here since some of counterpart attributes
# are in esp_attr.h.
#
# Ideally esp_attr.h would be split between this component and `soc`.
# Those moved to `soc` are the counterpart attributes to these sections.
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:iram_data]
entries:
.iram.data+
[sections:iram_bss]
entries:
.iram.bss+
[sections:dram]
entries:
.dram1+
[sections:extram_bss]
entries:
.ext_ram.bss+

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@ -36,7 +36,7 @@ else()
# link-time registration is used.
esp_pm app_update nvs_flash pthread app_trace esp_gdbstub esp_ipc
espcoredump
LDFRAGMENTS "linker.lf")
LDFRAGMENTS "linker.lf" "app.lf")
add_subdirectory(port)
# After system initialization, `start_app` (and its other cores variant) is called.

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@ -1,49 +1,3 @@
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:rodata]
entries:
.rodata+
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:dram]
entries:
.dram1+
[scheme:default]
entries:
if APP_BUILD_USE_FLASH_SECTIONS = y:
@ -55,7 +9,14 @@ entries:
data -> dram0_data
bss -> dram0_bss
common -> dram0_bss
if ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY = y:
extram_bss -> extern_ram
else:
extram_bss -> dram0_bss
legacy_bss -> dram0_bss
iram -> iram0_text
iram_data -> iram0_data
iram_bss -> iram0_bss
dram -> dram0_data
rtc_text -> rtc_text
rtc_data -> rtc_data

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@ -13,7 +13,7 @@ SOC_NAME := $(IDF_TARGET)
COMPONENT_SRCDIRS := .
COMPONENT_ADD_INCLUDEDIRS := include
COMPONENT_PRIV_INCLUDEDIRS := port/include port
COMPONENT_ADD_LDFRAGMENTS += linker.lf
COMPONENT_ADD_LDFRAGMENTS += linker.lf app.lf
ifndef CONFIG_IDF_ENV_FPGA
COMPONENT_OBJEXCLUDE += fpga_overrides.o

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@ -2,7 +2,7 @@ idf_component_register(SRCS "lldesc.c"
"soc_include_legacy_warn.c"
"memory_layout_utils.c"
INCLUDE_DIRS include
LDFRAGMENTS linker.lf)
LDFRAGMENTS "linker.lf")
idf_build_get_property(target IDF_TARGET)
add_subdirectory(${target})

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@ -388,7 +388,10 @@ There exists a special scheme with the name ``default``. This scheme is special
These catch-all rules then effectively serve as fallback rules for those whose mappings were not specified.
The ``default scheme`` is defined in :component_file:`{IDF_TARGET_PATH_NAME}/ld/{IDF_TARGET_PATH_NAME}_fragments.lf`. The ``noflash`` and ``rtc`` scheme fragments which are built-in schemes referenced in the quick start guide are also defined in this file.
The ``default scheme`` is defined in :component_file:`esp_system/app.lf`. The ``noflash`` and ``rtc`` scheme fragments which are
built-in schemes referenced in the quick start guide are also defined in this file.
.. _ldgen-mapping-fragment :

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@ -388,7 +388,7 @@ ESP-IDF v4.0 变更了链接器脚本片段文件使用的一些语法:
这些生成的包罗规则将用于未指定映射规则的情况。
``默认`` 协议在 :component_file:`{IDF_TARGET_PATH_NAME}/ld/{IDF_TARGET_PATH_NAME}_fragments.lf` 文件中定义,快速上手指南中提到的内置 ``noflash`` 协议和 ``rtc`` 协议也在该文件中定义。
``默认`` 协议在 :component_file:`esp_system/app.lf` 文件中定义,快速上手指南中提到的内置 ``noflash`` 协议和 ``rtc`` 协议也在该文件中定义。
.. _ldgen-mapping-fragment :

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@ -167,7 +167,7 @@ function run_tests()
print_status "Touching a linker fragment file should trigger re-link of app" # only app linker script is generated by tool for now
take_build_snapshot
touch ${IDF_PATH}/components/esp32/linker.lf
touch ${IDF_PATH}/components/esp_common/common.lf
make
assert_rebuilt ${APP_BINS}
assert_not_rebuilt ${BOOTLOADER_BINS}

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@ -230,13 +230,13 @@ function run_tests()
print_status "Updating fragment file should only re-link app" # only app linker script is generated by tool for now
take_build_snapshot
cp ${IDF_PATH}/components/esp32/ld/esp32_fragments.lf .
cp ${IDF_PATH}/components/esp_common/common.lf .
sleep 1 # ninja may ignore if the timestamp delta is too low
echo "# (Build test comment)" >> ${IDF_PATH}/components/esp32/ld/esp32_fragments.lf
echo "# (Build test comment)" >> ${IDF_PATH}/components/esp_common/common.lf
idf.py build || failure "Failed to rebuild with modified linker fragment file"
assert_rebuilt ${APP_BINS}
assert_not_rebuilt ${BOOTLOADER_BINS}
mv esp32_fragments.lf ${IDF_PATH}/components/esp32/ld/
mv common.lf ${IDF_PATH}/components/esp_common
print_status "sdkconfig update triggers full recompile"
clean_build_dir