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Merge branch 'bugfix/block9_can_not_be_used_for_fe' into 'master'
efuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5) Closes IDF-7175 See merge request espressif/esp-idf!23052
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badf267022
@ -282,6 +282,22 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
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ESP_EFUSE_CHK(esp_efuse_write_field_blob(s_table[idx].key, key, key_size_bytes * 8));
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ESP_EFUSE_CHK(esp_efuse_set_key_dis_write(block));
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (block == EFUSE_BLK9 && (
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#if SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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#endif
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#if SOC_ECDSA_SUPPORTED
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purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
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#endif
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
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ESP_LOGE(TAG, "BLOCK9 can not have the %d purpose because of HW bug (see TRM for more details)", purpose);
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err = ESP_ERR_NOT_SUPPORTED;
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goto err_exit;
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY ||
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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@ -50,6 +50,26 @@ TEST_CASE("Test keys and purposes, rd, wr, wr_key_purposes are in the initial st
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printf("EFUSE_BLK_KEY%d, RD, WR, PURPOSE_USER, PURPOSE_USER WR ... OK\n", num_key - EFUSE_BLK_KEY0);
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}
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}
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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TEST_CASE("Test efuse API blocks burning XTS and ECDSA keys into BLOCK9", "[efuse]")
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{
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uint8_t key[32] = {0};
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esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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#if SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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#endif
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#if SOC_ECDSA_SUPPORTED
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purpose = ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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#endif
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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#endif // CONFIG_EFUSE_VIRTUAL
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// If using efuse is real, then turn off writing tests.
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@ -124,8 +144,8 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK_KEY0, tmp_purpose, &rd_key, 33));
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK10, tmp_purpose, &rd_key, sizeof(rd_key)));
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for (esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_USER; purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++purpose) {
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if (purpose == ESP_EFUSE_KEY_PURPOSE_USER) {
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for (esp_efuse_purpose_t g_purpose = ESP_EFUSE_KEY_PURPOSE_USER; g_purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++g_purpose) {
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if (g_purpose == ESP_EFUSE_KEY_PURPOSE_USER) {
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continue;
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}
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esp_efuse_utility_reset();
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@ -136,9 +156,24 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
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#endif
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esp_efuse_utility_debug_dump_blocks();
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TEST_ASSERT_FALSE(esp_efuse_find_purpose(purpose, NULL));
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TEST_ASSERT_FALSE(esp_efuse_find_purpose(g_purpose, NULL));
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for (esp_efuse_block_t num_key = (EFUSE_BLK_KEY_MAX - 1); num_key >= EFUSE_BLK_KEY0; --num_key) {
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esp_efuse_purpose_t purpose = g_purpose;
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (num_key == EFUSE_BLK9 && (
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
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#if SOC_ECDSA_SUPPORTED
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purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
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#endif
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
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printf("BLOCK9 can not have the %d purpose, use RESERVED instead\n", purpose);
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purpose = ESP_EFUSE_KEY_PURPOSE_RESERVED;
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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int id = num_key - EFUSE_BLK_KEY0;
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TEST_ASSERT_EQUAL(id + 1, esp_efuse_count_unused_key_blocks());
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test_write_key(num_key, purpose);
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@ -771,6 +771,10 @@ config SOC_EFUSE_DIS_ICACHE
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bool
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default y
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config SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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bool
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default y
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config SOC_SECURE_BOOT_V2_RSA
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bool
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default y
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@ -340,6 +340,7 @@
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#define SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define SOC_EFUSE_SOFT_DIS_JTAG 1
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#define SOC_EFUSE_DIS_ICACHE 1
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Secure Boot CAPS----------------------------*/
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#define SOC_SECURE_BOOT_V2_RSA 1
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@ -983,6 +983,10 @@ config SOC_EFUSE_DIS_ICACHE
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bool
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default y
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config SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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bool
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default y
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config SOC_SECURE_BOOT_V2_RSA
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bool
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default y
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@ -404,6 +404,7 @@
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#define SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define SOC_EFUSE_SOFT_DIS_JTAG 1
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#define SOC_EFUSE_DIS_ICACHE 1
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Secure Boot CAPS----------------------------*/
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#define SOC_SECURE_BOOT_V2_RSA 1
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@ -975,6 +975,10 @@ config SOC_EFUSE_DIS_ICACHE
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bool
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default y
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config SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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bool
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default y
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config SOC_SECURE_BOOT_V2_RSA
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bool
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default y
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@ -410,6 +410,7 @@
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#define SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define SOC_EFUSE_SOFT_DIS_JTAG 1
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#define SOC_EFUSE_DIS_ICACHE 1
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS and ECDSA key purposes not supported for this block
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/*-------------------------- Secure Boot CAPS----------------------------*/
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#define SOC_SECURE_BOOT_V2_RSA 1
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@ -743,6 +743,10 @@ config SOC_EFUSE_DIS_ICACHE
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bool
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default y
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config SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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bool
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default y
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config SOC_SECURE_BOOT_V2_RSA
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bool
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default y
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@ -351,6 +351,7 @@
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#define SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define SOC_EFUSE_SOFT_DIS_JTAG 1
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#define SOC_EFUSE_DIS_ICACHE 1
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Secure Boot CAPS----------------------------*/
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#define SOC_SECURE_BOOT_V2_RSA 1
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@ -1095,6 +1095,10 @@ config SOC_EFUSE_DIS_ICACHE
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bool
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default y
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config SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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bool
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default y
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config SOC_SECURE_BOOT_V2_RSA
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bool
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default y
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@ -440,6 +440,7 @@
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#define SOC_EFUSE_SOFT_DIS_JTAG 1
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#define SOC_EFUSE_DIS_DIRECT_BOOT 1
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#define SOC_EFUSE_DIS_ICACHE 1
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Secure Boot CAPS----------------------------*/
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#define SOC_SECURE_BOOT_V2_RSA 1
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@ -29,6 +29,8 @@ For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *eFuse Co
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.. only:: not esp32 and not esp32c2
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.. list::
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{IDF_TARGET_NAME} has 11 eFuse blocks each of the size of 256 bits (not all bits are available):
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* EFUSE_BLK0 is used entirely for system purposes;
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@ -40,7 +42,9 @@ For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *eFuse Co
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* EFUSE_BLK6 (also named EFUSE_BLK_KEY2) can be used as key (for secure_boot or flash_encryption) or for user purposes;
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* EFUSE_BLK7 (also named EFUSE_BLK_KEY3) can be used as key (for secure_boot or flash_encryption) or for user purposes;
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* EFUSE_BLK8 (also named EFUSE_BLK_KEY4) can be used as key (for secure_boot or flash_encryption) or for user purposes;
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* EFUSE_BLK9 (also named EFUSE_BLK_KEY5) can be used as key (for secure_boot or flash_encryption) or for user purposes;
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:SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK and SOC_ECDSA_SUPPORTED: * EFUSE_BLK9 (also named EFUSE_BLK_KEY5) can be used for any purpose except for flash encryption or ECDSA (due to a HW bug);
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:SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK and not SOC_ECDSA_SUPPORTED: * EFUSE_BLK9 (also named EFUSE_BLK_KEY5) can be used for any purpose except for flash encryption (due to a HW bug);
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:not SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK: * EFUSE_BLK9 (also named EFUSE_BLK_KEY5) can be used as key (for secure_boot or flash_encryption) or for user purposes;
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* EFUSE_BLK10 (also named EFUSE_BLK_SYS_DATA_PART2) is reseved for system purposes.
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.. only:: esp32c2
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