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feat(efuse): Add flash efuses for esp32c3

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This commit is contained in:
KonstantinKondrashov 2023-07-10 23:34:46 +08:00
parent 0298e6f257
commit b95dfc67fa
6 changed files with 112 additions and 19 deletions
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56
components/efuse/esp32c3/esp_efuse_table.c
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@ -9,7 +9,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 661eec06c4c442af5baa0c947029db74
// md5_digest_table f41d6027e08973065c84a93ebd369dee
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -223,6 +223,18 @@ static const esp_efuse_desc_t WR_DIS_BLK_VERSION_MINOR[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MINOR,
};
static const esp_efuse_desc_t WR_DIS_FLASH_CAP[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_CAP,
};
static const esp_efuse_desc_t WR_DIS_FLASH_TEMP[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_TEMP,
};
static const esp_efuse_desc_t WR_DIS_FLASH_VENDOR[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_VENDOR,
};
static const esp_efuse_desc_t WR_DIS_K_RTC_LDO[] = {
{EFUSE_BLK0, 20, 1}, // [] wr_dis of K_RTC_LDO,
};
@ -600,6 +612,18 @@ static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
{EFUSE_BLK1, 120, 3}, // [] BLK_VERSION_MINOR,
};
static const esp_efuse_desc_t FLASH_CAP[] = {
{EFUSE_BLK1, 123, 3}, // [] Flash capacity {0: "None"; 1: "4M"; 2: "2M"; 3: "1M"; 4: "8M"},
};
static const esp_efuse_desc_t FLASH_TEMP[] = {
{EFUSE_BLK1, 126, 2}, // [] Flash temperature {0: "None"; 1: "105C"; 2: "85C"},
};
static const esp_efuse_desc_t FLASH_VENDOR[] = {
{EFUSE_BLK1, 128, 3}, // [] Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5: "ZBIT"},
};
static const esp_efuse_desc_t K_RTC_LDO[] = {
{EFUSE_BLK1, 135, 7}, // [] BLOCK1 K_RTC_LDO,
};
@ -980,6 +1004,21 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[] = {
&WR_DIS_FLASH_CAP[0], // [] wr_dis of FLASH_CAP
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[] = {
&WR_DIS_FLASH_TEMP[0], // [] wr_dis of FLASH_TEMP
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[] = {
&WR_DIS_FLASH_VENDOR[0], // [] wr_dis of FLASH_VENDOR
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_K_RTC_LDO[] = {
&WR_DIS_K_RTC_LDO[0], // [] wr_dis of K_RTC_LDO
NULL
@ -1450,6 +1489,21 @@ const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
&FLASH_CAP[0], // [] Flash capacity {0: "None"; 1: "4M"; 2: "2M"; 3: "1M"; 4: "8M"}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[] = {
&FLASH_TEMP[0], // [] Flash temperature {0: "None"; 1: "105C"; 2: "85C"}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
&FLASH_VENDOR[0], // [] Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5: "ZBIT"}
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[] = {
&K_RTC_LDO[0], // [] BLOCK1 K_RTC_LDO
NULL

8
components/efuse/esp32c3/esp_efuse_table.csv
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@ -9,7 +9,7 @@
# this will generate new source files, next rebuild all the sources.
# !!!!!!!!!!! #
# This file was generated by regtools.py based on the efuses.yaml file with the version: a85f874ae2b6538ca48b7c3db4a79531
# This file was generated by regtools.py based on the efuses.yaml file with the version: 4622cf9245401eca0eb1df8122449a6d
WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
@ -63,6 +63,9 @@ WR_DIS.SPI_PAD_CONFIG_D7, EFUSE_BLK0, 20, 1, [] wr_dis
WR_DIS.WAFER_VERSION_MINOR_LO, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_LO
WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION
WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR
WR_DIS.FLASH_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_CAP
WR_DIS.FLASH_TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_TEMP
WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VENDOR
WR_DIS.K_RTC_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_RTC_LDO
WR_DIS.K_DIG_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_DIG_LDO
WR_DIS.V_RTC_DBIAS20, EFUSE_BLK0, 20, 1, [] wr_dis of V_RTC_DBIAS20
@ -161,6 +164,9 @@ SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, [] SPI PA
WAFER_VERSION_MINOR_LO, EFUSE_BLK1, 114, 3, [] WAFER_VERSION_MINOR least significant bits
PKG_VERSION, EFUSE_BLK1, 117, 3, [] Package version
BLK_VERSION_MINOR, EFUSE_BLK1, 120, 3, [] BLK_VERSION_MINOR
FLASH_CAP, EFUSE_BLK1, 123, 3, [] Flash capacity {0: "None"; 1: "4M"; 2: "2M"; 3: "1M"; 4: "8M"}
FLASH_TEMP, EFUSE_BLK1, 126, 2, [] Flash temperature {0: "None"; 1: "105C"; 2: "85C"}
FLASH_VENDOR, EFUSE_BLK1, 128, 3, [] Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5: "ZBIT"}
K_RTC_LDO, EFUSE_BLK1, 135, 7, [] BLOCK1 K_RTC_LDO
K_DIG_LDO, EFUSE_BLK1, 142, 7, [] BLOCK1 K_DIG_LDO
V_RTC_DBIAS20, EFUSE_BLK1, 149, 8, [] BLOCK1 voltage of rtc dbias20

Can't render this file because it contains an unexpected character in line 8 and column 53.

8
components/efuse/esp32c3/include/esp_efuse_table.h
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@ -10,7 +10,7 @@ extern "C" {
#include "esp_efuse.h"
// md5_digest_table 661eec06c4c442af5baa0c947029db74
// md5_digest_table f41d6027e08973065c84a93ebd369dee
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -81,6 +81,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_PAD_CONFIG_D7[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR_LO[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_K_RTC_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_K_DIG_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_V_RTC_DBIAS20[];
@ -203,6 +206,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[];
extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR_LO[];
extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[];
extern const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[];
extern const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[];

5
components/soc/esp32c3/include/soc/efuse_defs.h
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@ -12,6 +12,11 @@ extern "C" {
#define EFUSE_WRITE_OP_CODE 0x5a5a
#define EFUSE_READ_OP_CODE 0x5aa5
#define EFUSE_PKG_VERSION_ESP32C3 0 // QFN32
#define EFUSE_PKG_VERSION_ESP8685 1 // QFN28
#define EFUSE_PKG_VERSION_ESP32C3AZ 2 // QFN32
#define EFUSE_PKG_VERSION_ESP8686 3 // QFN24
#ifdef __cplusplus
}
#endif

36
components/soc/esp32c3/include/soc/efuse_reg.h
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@ -715,25 +715,39 @@ extern "C" {
#define EFUSE_BLK_VERSION_MINOR_M (EFUSE_BLK_VERSION_MINOR_V << EFUSE_BLK_VERSION_MINOR_S)
#define EFUSE_BLK_VERSION_MINOR_V 0x00000007U
#define EFUSE_BLK_VERSION_MINOR_S 24
/** EFUSE_RESERVED_1_123 : R; bitpos: [31:27]; default: 0;
* reserved
/** EFUSE_FLASH_CAP : R; bitpos: [29:27]; default: 0;
* Flash capacity
*/
#define EFUSE_RESERVED_1_123 0x0000001FU
#define EFUSE_RESERVED_1_123_M (EFUSE_RESERVED_1_123_V << EFUSE_RESERVED_1_123_S)
#define EFUSE_RESERVED_1_123_V 0x0000001FU
#define EFUSE_RESERVED_1_123_S 27
#define EFUSE_FLASH_CAP 0x00000007U
#define EFUSE_FLASH_CAP_M (EFUSE_FLASH_CAP_V << EFUSE_FLASH_CAP_S)
#define EFUSE_FLASH_CAP_V 0x00000007U
#define EFUSE_FLASH_CAP_S 27
/** EFUSE_FLASH_TEMP : R; bitpos: [31:30]; default: 0;
* Flash temperature
*/
#define EFUSE_FLASH_TEMP 0x00000003U
#define EFUSE_FLASH_TEMP_M (EFUSE_FLASH_TEMP_V << EFUSE_FLASH_TEMP_S)
#define EFUSE_FLASH_TEMP_V 0x00000003U
#define EFUSE_FLASH_TEMP_S 30
/** EFUSE_RD_MAC_SPI_SYS_4_REG register
* BLOCK1 data register 4.
*/
#define EFUSE_RD_MAC_SPI_SYS_4_REG (DR_REG_EFUSE_BASE + 0x54)
/** EFUSE_RESERVED_1_128 : R; bitpos: [6:0]; default: 0;
/** EFUSE_FLASH_VENDOR : R; bitpos: [2:0]; default: 0;
* Flash vendor
*/
#define EFUSE_FLASH_VENDOR 0x00000007U
#define EFUSE_FLASH_VENDOR_M (EFUSE_FLASH_VENDOR_V << EFUSE_FLASH_VENDOR_S)
#define EFUSE_FLASH_VENDOR_V 0x00000007U
#define EFUSE_FLASH_VENDOR_S 0
/** EFUSE_RESERVED_1_131 : R; bitpos: [6:3]; default: 0;
* reserved
*/
#define EFUSE_RESERVED_1_128 0x0000007FU
#define EFUSE_RESERVED_1_128_M (EFUSE_RESERVED_1_128_V << EFUSE_RESERVED_1_128_S)
#define EFUSE_RESERVED_1_128_V 0x0000007FU
#define EFUSE_RESERVED_1_128_S 0
#define EFUSE_RESERVED_1_131 0x0000000FU
#define EFUSE_RESERVED_1_131_M (EFUSE_RESERVED_1_131_V << EFUSE_RESERVED_1_131_S)
#define EFUSE_RESERVED_1_131_V 0x0000000FU
#define EFUSE_RESERVED_1_131_S 3
/** EFUSE_K_RTC_LDO : R; bitpos: [13:7]; default: 0;
* BLOCK1 K_RTC_LDO
*/

18
components/soc/esp32c3/include/soc/efuse_struct.h
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@ -546,10 +546,14 @@ typedef union {
* BLK_VERSION_MINOR
*/
uint32_t blk_version_minor:3;
/** reserved_1_123 : R; bitpos: [31:27]; default: 0;
* reserved
/** flash_cap : R; bitpos: [29:27]; default: 0;
* Flash capacity
*/
uint32_t reserved_1_123:5;
uint32_t flash_cap:3;
/** flash_temp : R; bitpos: [31:30]; default: 0;
* Flash temperature
*/
uint32_t flash_temp:2;
};
uint32_t val;
} efuse_rd_mac_spi_sys_3_reg_t;
@ -559,10 +563,14 @@ typedef union {
*/
typedef union {
struct {
/** reserved_1_128 : R; bitpos: [6:0]; default: 0;
/** flash_vendor : R; bitpos: [2:0]; default: 0;
* Flash vendor
*/
uint32_t flash_vendor:3;
/** reserved_1_131 : R; bitpos: [6:3]; default: 0;
* reserved
*/
uint32_t reserved_1_128:7;
uint32_t reserved_1_131:4;
/** k_rtc_ldo : R; bitpos: [13:7]; default: 0;
* BLOCK1 K_RTC_LDO
*/