diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index 102cb93be6..aae3c8c666 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -174,9 +174,7 @@ #define SOC_CPU_HAS_FPU_EXT_ILL_BUG 1 // EXT_ILL CSR doesn't support FLW/FSW #define SOC_CPU_HAS_HWLOOP 1 /* PIE coprocessor assembly is only supported with GCC compiler */ -#ifndef __clang__ #define SOC_CPU_HAS_PIE 1 -#endif #define SOC_HP_CPU_HAS_MULTIPLE_CORES 1 // Convenience boolean macro used to determine if a target has multiple cores. diff --git a/tools/cmake/toolchain-clang-esp32p4.cmake b/tools/cmake/toolchain-clang-esp32p4.cmake index 6c4f948125..6606daecd7 100644 --- a/tools/cmake/toolchain-clang-esp32p4.cmake +++ b/tools/cmake/toolchain-clang-esp32p4.cmake @@ -11,21 +11,21 @@ set(CMAKE_AR llvm-ar) set(CMAKE_RANLIB llvm-ranlib) set(CMAKE_OBJDUMP riscv32-esp-elf-clang-objdump) -remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei -mabi=ilp32f \ +remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei_xesppie -mabi=ilp32f \ ${CMAKE_C_FLAGS}" UNIQ_CMAKE_C_FLAGS) set(CMAKE_C_FLAGS "${UNIQ_CMAKE_C_FLAGS}" CACHE STRING "C Compiler Base Flags" FORCE) -remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei -mabi=ilp32f \ +remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei_xesppie -mabi=ilp32f \ ${CMAKE_CXX_FLAGS}" UNIQ_CMAKE_CXX_FLAGS) set(CMAKE_CXX_FLAGS "${UNIQ_CMAKE_CXX_FLAGS}" CACHE STRING "C++ Compiler Base Flags" FORCE) -remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei -mabi=ilp32f \ +remove_duplicated_flags("--target=riscv32-esp-elf -march=rv32imafc_zicsr_zifencei_xesppie -mabi=ilp32f \ ${CMAKE_ASM_FLAGS}" UNIQ_CMAKE_ASM_FLAGS) set(CMAKE_ASM_FLAGS "${UNIQ_CMAKE_ASM_FLAGS}"