From b88e7716b94aba9262ff7a72ffdcf11701fa61cf Mon Sep 17 00:00:00 2001 From: Sachin Billore Date: Mon, 8 Jul 2024 14:55:49 +0530 Subject: [PATCH] refactor: remove assert from apm ll apis --- components/hal/apm_hal.c | 69 +++++++++++++++++-- components/hal/esp32c5/include/hal/apm_ll.h | 44 +----------- .../esp32c5/include/soc/Kconfig.soc_caps.in | 12 ++-- components/soc/esp32c5/include/soc/soc_caps.h | 7 +- .../esp32c6/include/soc/Kconfig.soc_caps.in | 12 ++-- components/soc/esp32c6/include/soc/soc_caps.h | 7 +- .../esp32h2/include/soc/Kconfig.soc_caps.in | 8 +-- components/soc/esp32h2/include/soc/soc_caps.h | 6 +- 8 files changed, 98 insertions(+), 67 deletions(-) diff --git a/components/hal/apm_hal.c b/components/hal/apm_hal.c index cb08dbde48..75f8a48d4d 100644 --- a/components/hal/apm_hal.c +++ b/components/hal/apm_hal.c @@ -70,6 +70,14 @@ void apm_hal_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, uint32_t void apm_hal_apm_ctrl_filter_enable(apm_ctrl_path_t *apm_path, bool enable) { + HAL_ASSERT(apm_path || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((apm_path->apm_ctrl == LP_APM0_CTRL) && (apm_path->apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((apm_path->apm_ctrl == HP_APM_CTRL) && (apm_path->apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((apm_path->apm_ctrl == LP_APM_CTRL) && (apm_path->apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + apm_ll_apm_ctrl_filter_enable(apm_path->apm_ctrl, apm_path->apm_m_path, enable); } @@ -87,19 +95,28 @@ void apm_hal_apm_ctrl_filter_enable_all(bool enable) apm_path.apm_m_path = i; apm_hal_apm_ctrl_filter_enable(&apm_path, enable); } -#if CONFIG_IDF_TARGET_ESP32C6 +#if defined(SOC_APM_LP_APM0_SUPPORTED) for (int i = 0; i < LP_APM0_MAX_ACCESS_PATH; i++) { apm_path.apm_ctrl = LP_APM0_CTRL; apm_path.apm_m_path = i; apm_hal_apm_ctrl_filter_enable(&apm_path, enable); } - #endif } void apm_hal_apm_ctrl_region_config(const apm_ctrl_region_config_data_t *pms_data) { - HAL_ASSERT(pms_data); + HAL_ASSERT(pms_data || + (( +#if defined(SOC_APM_LP_APM0_SUPPORTED) + (pms_data->apm_ctrl == LP_APM0_CTRL) || +#endif + (pms_data->apm_ctrl == LP_APM_CTRL) + ) && + (pms_data->regn_num <= APM_LL_LP_MAX_REGION_NUM) + ) || + ((pms_data->apm_ctrl == HP_APM_CTRL) && (pms_data->regn_num <= APM_LL_HP_MAX_REGION_NUM)) + ); apm_ll_apm_ctrl_set_region_start_address(pms_data->apm_ctrl, pms_data->regn_num, pms_data->regn_start_addr); apm_ll_apm_ctrl_set_region_end_address(pms_data->apm_ctrl, pms_data->regn_num, pms_data->regn_end_addr); @@ -108,21 +125,53 @@ void apm_hal_apm_ctrl_region_config(const apm_ctrl_region_config_data_t *pms_dat uint8_t apm_hal_apm_ctrl_exception_status(apm_ctrl_path_t *apm_path) { + HAL_ASSERT(apm_path || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((apm_path->apm_ctrl == LP_APM0_CTRL) && (apm_path->apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((apm_path->apm_ctrl == HP_APM_CTRL) && (apm_path->apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((apm_path->apm_ctrl == LP_APM_CTRL) && (apm_path->apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + return apm_ll_apm_ctrl_exception_status(apm_path->apm_ctrl, apm_path->apm_m_path); } void apm_hal_apm_ctrl_exception_clear(apm_ctrl_path_t *apm_path) { + HAL_ASSERT(apm_path || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((apm_path->apm_ctrl == LP_APM0_CTRL) && (apm_path->apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((apm_path->apm_ctrl == HP_APM_CTRL) && (apm_path->apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((apm_path->apm_ctrl == LP_APM_CTRL) && (apm_path->apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + apm_ll_apm_ctrl_exception_clear(apm_path->apm_ctrl, apm_path->apm_m_path); } void apm_hal_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info) { + HAL_ASSERT(excp_info || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((excp_info->apm_path.apm_ctrl == LP_APM0_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + apm_ll_apm_ctrl_get_exception_info(excp_info); } void apm_hal_apm_ctrl_interrupt_enable(apm_ctrl_path_t *apm_path, bool enable) { + HAL_ASSERT(apm_path || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((apm_path->apm_ctrl == LP_APM0_CTRL) && (apm_path->apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((apm_path->apm_ctrl == HP_APM_CTRL) && (apm_path->apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((apm_path->apm_ctrl == LP_APM_CTRL) && (apm_path->apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + apm_ll_apm_ctrl_interrupt_enable(apm_path->apm_ctrl, apm_path->apm_m_path, enable); } @@ -152,7 +201,8 @@ void apm_hal_apm_ctrl_master_sec_mode_config(apm_ctrl_secure_mode_config_t *sec_ sec_mode_data->pms_data[i].sec_mode = sec_mode_data->sec_mode; sec_mode_data->pms_data[i].apm_ctrl = sec_mode_data->apm_ctrl; apm_hal_apm_ctrl_region_config(&sec_mode_data->pms_data[i]); - apm_hal_apm_ctrl_region_filter_enable(sec_mode_data->pms_data[i].apm_ctrl, i, + apm_hal_apm_ctrl_region_filter_enable(sec_mode_data->pms_data[i].apm_ctrl, + sec_mode_data->pms_data[i].regn_num, sec_mode_data->pms_data[i].filter_enable); } @@ -169,9 +219,16 @@ void apm_hal_apm_ctrl_reset_event_enable(bool enable) apm_ll_apm_ctrl_reset_event_enable(enable); } -esp_err_t apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path) +int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path) { + HAL_ASSERT(apm_path || +#if defined(SOC_APM_LP_APM0_SUPPORTED) + ((apm_path->apm_ctrl == LP_APM0_CTRL) && (apm_path->apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || +#endif + ((apm_path->apm_ctrl == HP_APM_CTRL) && (apm_path->apm_m_path < HP_APM_MAX_ACCESS_PATH)) || + ((apm_path->apm_ctrl == LP_APM_CTRL) && (apm_path->apm_m_path < LP_APM_MAX_ACCESS_PATH)) + ); + return apm_ll_apm_ctrl_get_int_src_num(apm_path->apm_ctrl, apm_path->apm_m_path); } - #endif //CONFIG_IDF_TARGET_ESP32P4 diff --git a/components/hal/esp32c5/include/hal/apm_ll.h b/components/hal/esp32c5/include/hal/apm_ll.h index 2c86bb986a..fdde15988d 100644 --- a/components/hal/esp32c5/include/hal/apm_ll.h +++ b/components/hal/esp32c5/include/hal/apm_ll.h @@ -260,11 +260,6 @@ static inline void apm_ll_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ct static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -282,10 +277,6 @@ static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr); } @@ -299,10 +290,6 @@ static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t ap static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr); } @@ -317,10 +304,6 @@ static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - uint32_t val = 0; val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num)); val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode); @@ -337,11 +320,6 @@ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path)); } @@ -354,11 +332,6 @@ static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctr static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path), APM_CTRL_M_REGION_STATUS_CLR); } @@ -371,11 +344,6 @@ static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, */ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info) { - HAL_ASSERT(((excp_info->apm_path.apm_ctrl == LP_APM0_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), APM_LL_CTRL_EXCEPTION_ID); excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), @@ -396,11 +364,6 @@ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -448,13 +411,8 @@ static inline void apm_ll_apm_ctrl_reset_event_enable(bool enable) * @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM) * @param apm_m_path APM Ctrl access patch(M[0:n]) */ -static inline esp_err_t apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) +static inline int apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - switch (apm_ctrl) { case LP_APM0_CTRL : return (ETS_LP_APM0_INTR_SOURCE); diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index b694908e28..ebebddc656 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -135,10 +135,6 @@ config SOC_APM_SUPPORTED bool default y -config SOC_APM_CTRL_FILTER_SUPPORTED - bool - default y - config SOC_PMU_SUPPORTED bool default y @@ -875,6 +871,14 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128 bool default y +config SOC_APM_CTRL_FILTER_SUPPORTED + bool + default y + +config SOC_APM_LP_APM0_SUPPORTED + bool + default y + config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 4b27f2c51f..f184bdb563 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -57,8 +57,7 @@ #define SOC_FLASH_ENC_SUPPORTED 1 #define SOC_SECURE_BOOT_SUPPORTED 1 // #define SOC_BOD_SUPPORTED 1 // TODO: [ESP32C5] IDF-8647 -#define SOC_APM_SUPPORTED 1 -#define SOC_APM_CTRL_FILTER_SUPPORTED 1 +#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */ #define SOC_PMU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8667 // #define SOC_PAU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 #define SOC_LP_TIMER_SUPPORTED 1 @@ -487,6 +486,10 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES 1 #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 +/*-------------------------- APM CAPS-----------------------------------------*/ +#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */ +#define SOC_APM_LP_APM0_SUPPORTED 1 /*!< Support for LP APM0 control filter */ + /*------------------------ Anti DPA (Security) CAPS --------------------------*/ #define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1 diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 883710090f..8c3894401b 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -179,10 +179,6 @@ config SOC_APM_SUPPORTED bool default y -config SOC_APM_CTRL_FILTER_SUPPORTED - bool - default y - config SOC_PMU_SUPPORTED bool default y @@ -1219,6 +1215,14 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128 bool default y +config SOC_APM_CTRL_FILTER_SUPPORTED + bool + default y + +config SOC_APM_LP_APM0_SUPPORTED + bool + default y + config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 3c85addd91..f062dcd9c7 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -60,8 +60,7 @@ #define SOC_SECURE_BOOT_SUPPORTED 1 #define SOC_SDIO_SLAVE_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1 -#define SOC_APM_SUPPORTED 1 -#define SOC_APM_CTRL_FILTER_SUPPORTED 1 +#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */ #define SOC_PMU_SUPPORTED 1 #define SOC_PAU_SUPPORTED 1 #define SOC_LP_TIMER_SUPPORTED 1 @@ -478,6 +477,10 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES 1 #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 +/*-------------------------- APM CAPS ----------------------------------------*/ +#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */ +#define SOC_APM_LP_APM0_SUPPORTED 1 /*!< Support for LP APM0 control filter */ + /*------------------------ Anti DPA (Security) CAPS --------------------------*/ #define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 6d730810e2..e266012a35 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -179,10 +179,6 @@ config SOC_APM_SUPPORTED bool default y -config SOC_APM_CTRL_FILTER_SUPPORTED - bool - default y - config SOC_PMU_SUPPORTED bool default y @@ -1227,6 +1223,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128 bool default y +config SOC_APM_CTRL_FILTER_SUPPORTED + bool + default y + config SOC_CRYPTO_DPA_PROTECTION_SUPPORTED bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index d8d3c4bc1a..681e566d53 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -60,8 +60,7 @@ #define SOC_FLASH_ENC_SUPPORTED 1 #define SOC_SECURE_BOOT_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1 -#define SOC_APM_SUPPORTED 1 -#define SOC_APM_CTRL_FILTER_SUPPORTED 1 +#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */ #define SOC_PMU_SUPPORTED 1 #define SOC_LP_TIMER_SUPPORTED 1 #define SOC_LP_AON_SUPPORTED 1 @@ -477,6 +476,9 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES 1 #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 +/*-------------------------- APM CAPS ----------------------------------------*/ +#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */ + /*------------------------ Anti DPA (Security) CAPS --------------------------*/ #define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1