Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down' into 'master'

In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

Closes IDF-8410

See merge request espressif/esp-idf!26599
This commit is contained in:
Jiang Jiang Jian 2023-11-02 17:04:30 +08:00
commit b839a70aea
4 changed files with 19 additions and 7 deletions

View File

@ -361,14 +361,20 @@ const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pm
/** LP system default parameter */
#if CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
# define PMU_SLOW_CLK_USE_EXT_XTAL (1)
#else
# define PMU_SLOW_CLK_USE_EXT_XTAL (0)
#endif
#define PMU_LP_ACTIVE_POWER_CONFIG_DEFAULT() { \
.dig_power = { \
.mem_dslp = 0, \
.peri_pd_en = 0, \
}, \
.clk_power = { \
.xpd_xtal32k = 1, \
.xpd_rc32k = 1, \
.xpd_xtal32k = PMU_SLOW_CLK_USE_EXT_XTAL, \
.xpd_rc32k = 0, \
.xpd_fosc = 1, \
.pd_osc = 0 \
} \

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@ -285,8 +285,8 @@ typedef struct {
.mem_dslp = 0 \
}, \
.clk_power = { \
.xpd_xtal32k = 1, \
.xpd_rc32k = 1, \
.xpd_xtal32k = ((pd_flags) & PMU_SLEEP_PD_XTAL32K) ? 0 : 1, \
.xpd_rc32k = ((pd_flags) & PMU_SLEEP_PD_RC32K) ? 0 : 1, \
.xpd_fosc = 1 \
} \
}, \

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@ -359,13 +359,19 @@ const pmu_hp_system_retention_param_t * pmu_hp_system_retention_param_default(pm
/** LP system default parameter */
#if CONFIG_ESP_SYSTEM_RTC_EXT_XTAL
# define PMU_SLOW_CLK_USE_EXT_XTAL (1)
#else
# define PMU_SLOW_CLK_USE_EXT_XTAL (0)
#endif
#define PMU_LP_ACTIVE_POWER_CONFIG_DEFAULT() { \
.dig_power = { \
.mem_dslp = 0, \
.peri_pd_en = 0, \
}, \
.clk_power = { \
.xpd_xtal32k = 0, \
.xpd_xtal32k = PMU_SLOW_CLK_USE_EXT_XTAL, \
.xpd_rc32k = 0, \
.xpd_fosc = 1, \
.pd_osc = 0 \

View File

@ -280,8 +280,8 @@ typedef struct {
.mem_dslp = 0 \
}, \
.clk_power = { \
.xpd_xtal32k = 1, \
.xpd_rc32k = 1, \
.xpd_xtal32k = ((pd_flags) & PMU_SLEEP_PD_XTAL32K) ? 0 : 1, \
.xpd_rc32k = ((pd_flags) & PMU_SLEEP_PD_RC32K) ? 0 : 1, \
.xpd_fosc = 1 \
} \
}, \