mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
fix(apm): minor fixes for apm api
This commit is contained in:
parent
2806ef1e5c
commit
b82e26593e
@ -36,14 +36,14 @@ extern "C" {
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#define APM_LL_MASTER_MAX 32
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#define APM_LL_MASTER_MAX 32
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#define LP_APM0_MAX_ACCESS_PATH 0x1
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#define LP_APM0_MAX_ACCESS_PATH 0x1
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#define HP_APM_MAX_ACCESS_PATH 0x4
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#define HP_APM_MAX_ACCESS_PATH 0x5
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#define LP_APM_MAX_ACCESS_PATH 0x2
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#define LP_APM_MAX_ACCESS_PATH 0x2
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#define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \
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#define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : 0)); \
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(LP_APM_REGION_FILTER_EN_REG)); \
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})
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})
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#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
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#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
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@ -52,28 +52,28 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
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#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
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#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ATTR_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ATTR_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_ATTR_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
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#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
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@ -81,28 +81,28 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
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#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
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@ -113,7 +113,7 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : 0)); \
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(LP_APM_INT_EN_REG)); \
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})
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})
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#define APM_CTRL_CLK_EN (BIT(0))
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#define APM_CTRL_CLK_EN (BIT(0))
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@ -121,14 +121,14 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : 0)); \
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(LP_APM_CLOCK_GATE_REG)); \
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})
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})
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#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
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#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : 0)); \
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(LP_APM_FUNC_CTRL_REG)); \
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})
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})
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/**
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/**
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@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -15,7 +15,6 @@
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#include "soc/hp_apm_reg.h"
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#include "soc/hp_apm_reg.h"
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#include "soc/lp_apm_reg.h"
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#include "soc/lp_apm_reg.h"
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#include "soc/interrupts.h"
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#include "soc/interrupts.h"
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#include "hal/assert.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -43,7 +42,7 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : 0)); \
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(LP_APM_REGION_FILTER_EN_REG)); \
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})
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})
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#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
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#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
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@ -52,28 +51,28 @@ extern "C" {
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
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#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
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#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : 0)); \
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(LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num))); \
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})
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})
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
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#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
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#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
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({\
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({\
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
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((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0)); \
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(LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path))); \
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})
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})
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#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
||||||
((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \
|
(LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
||||||
((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0)); \
|
(LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path))); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
|
#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
|
||||||
@ -113,7 +112,7 @@ extern "C" {
|
|||||||
({\
|
({\
|
||||||
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \
|
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \
|
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \
|
||||||
((LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : 0)); \
|
(LP_APM_INT_EN_REG)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_CTRL_CLK_EN (BIT(0))
|
#define APM_CTRL_CLK_EN (BIT(0))
|
||||||
@ -121,14 +120,14 @@ extern "C" {
|
|||||||
({\
|
({\
|
||||||
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \
|
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \
|
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \
|
||||||
((LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : 0)); \
|
(LP_APM_CLOCK_GATE_REG)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
|
#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
|
||||||
({\
|
({\
|
||||||
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \
|
(LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \
|
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \
|
||||||
((LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : 0)); \
|
(LP_APM_FUNC_CTRL_REG)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -259,11 +258,6 @@ static inline void apm_ll_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ct
|
|||||||
static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path));
|
REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path));
|
||||||
} else {
|
} else {
|
||||||
@ -281,10 +275,6 @@ static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
|||||||
static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, uint32_t addr)
|
uint32_t regn_num, uint32_t addr)
|
||||||
{
|
{
|
||||||
HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr);
|
REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -298,10 +288,6 @@ static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t ap
|
|||||||
static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, uint32_t addr)
|
uint32_t regn_num, uint32_t addr)
|
||||||
{
|
{
|
||||||
HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr);
|
REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -316,10 +302,6 @@ static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_
|
|||||||
static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms)
|
uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms)
|
||||||
{
|
{
|
||||||
HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
uint32_t val = 0;
|
uint32_t val = 0;
|
||||||
val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num));
|
val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num));
|
||||||
val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode);
|
val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode);
|
||||||
@ -336,11 +318,6 @@ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t
|
|||||||
static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path)
|
apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path));
|
return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path));
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -353,11 +330,6 @@ static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctr
|
|||||||
static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path)
|
apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path),
|
REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path),
|
||||||
APM_CTRL_M_REGION_STATUS_CLR);
|
APM_CTRL_M_REGION_STATUS_CLR);
|
||||||
}
|
}
|
||||||
@ -370,11 +342,6 @@ static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
|||||||
*/
|
*/
|
||||||
static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info)
|
static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((excp_info->apm_path.apm_ctrl == LP_APM0_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
||||||
APM_LL_CTRL_EXCEPTION_ID);
|
APM_LL_CTRL_EXCEPTION_ID);
|
||||||
excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
||||||
@ -395,11 +362,6 @@ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t
|
|||||||
static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path));
|
REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path));
|
||||||
} else {
|
} else {
|
||||||
@ -442,18 +404,13 @@ static inline void apm_ll_apm_ctrl_reset_event_enable(bool enable)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Return APM Ctrl interrupt source number.
|
* @brief Fetch the APM Ctrl interrupt source number.
|
||||||
*
|
*
|
||||||
* @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM)
|
* @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM)
|
||||||
* @param apm_m_path APM Ctrl access patch(M[0:n])
|
* @param apm_m_path APM Ctrl access patch(M[0:n])
|
||||||
*/
|
*/
|
||||||
static inline esp_err_t apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path)
|
static inline int apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
switch (apm_ctrl) {
|
switch (apm_ctrl) {
|
||||||
case LP_APM0_CTRL :
|
case LP_APM0_CTRL :
|
||||||
return (ETS_LP_APM0_INTR_SOURCE);
|
return (ETS_LP_APM0_INTR_SOURCE);
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@ -14,7 +14,6 @@
|
|||||||
#include "soc/hp_apm_reg.h"
|
#include "soc/hp_apm_reg.h"
|
||||||
#include "soc/lp_apm_reg.h"
|
#include "soc/lp_apm_reg.h"
|
||||||
#include "soc/interrupts.h"
|
#include "soc/interrupts.h"
|
||||||
#include "hal/assert.h"
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
@ -40,7 +39,7 @@ extern "C" {
|
|||||||
#define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \
|
#define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : 0); \
|
(HP_APM_REGION_FILTER_EN_REG); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
|
#define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id))
|
||||||
@ -48,50 +47,50 @@ extern "C" {
|
|||||||
#define APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num) \
|
#define APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0); \
|
(HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
|
#define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0); \
|
(HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
|
#define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : 0); \
|
(HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0); \
|
(HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
|
#define APM_CTRL_M_REGION_STATUS_CLR (BIT(0))
|
||||||
#define APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0); \
|
(HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0); \
|
(HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0); \
|
(HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
|
#define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0); \
|
(HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
|
#define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1)))
|
||||||
@ -101,20 +100,20 @@ extern "C" {
|
|||||||
#define APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl) \
|
#define APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : 0); \
|
(HP_APM_INT_EN_REG); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_CTRL_CLK_EN (BIT(0))
|
#define APM_CTRL_CLK_EN (BIT(0))
|
||||||
#define APM_LL_APM_CTRL_CLOCK_GATE_REG(apm_ctrl) \
|
#define APM_LL_APM_CTRL_CLOCK_GATE_REG(apm_ctrl) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : 0); \
|
(HP_APM_CLOCK_GATE_REG); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
|
#define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \
|
||||||
({\
|
({\
|
||||||
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : \
|
(LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : \
|
||||||
((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : 0); \
|
(HP_APM_FUNC_CTRL_REG); \
|
||||||
})
|
})
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -242,10 +241,6 @@ static inline void apm_ll_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ct
|
|||||||
static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path));
|
REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path));
|
||||||
} else {
|
} else {
|
||||||
@ -263,10 +258,6 @@ static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
|||||||
static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, uint32_t addr)
|
uint32_t regn_num, uint32_t addr)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr);
|
REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -280,10 +271,6 @@ static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t ap
|
|||||||
static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, uint32_t addr)
|
uint32_t regn_num, uint32_t addr)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr);
|
REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -298,10 +285,6 @@ static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_
|
|||||||
static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms)
|
uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) ||
|
|
||||||
((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM))
|
|
||||||
);
|
|
||||||
|
|
||||||
uint32_t val = 0;
|
uint32_t val = 0;
|
||||||
val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num));
|
val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num));
|
||||||
val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode);
|
val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode);
|
||||||
@ -318,10 +301,6 @@ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t
|
|||||||
static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path)
|
apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path));
|
return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path));
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -334,10 +313,6 @@ static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctr
|
|||||||
static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path)
|
apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path),
|
REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path),
|
||||||
APM_CTRL_M_REGION_STATUS_CLR);
|
APM_CTRL_M_REGION_STATUS_CLR);
|
||||||
}
|
}
|
||||||
@ -350,10 +325,6 @@ static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl,
|
|||||||
*/
|
*/
|
||||||
static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info)
|
static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
||||||
APM_LL_CTRL_EXCEPTION_ID);
|
APM_LL_CTRL_EXCEPTION_ID);
|
||||||
excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path),
|
||||||
@ -374,10 +345,6 @@ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t
|
|||||||
static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl,
|
||||||
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
apm_ll_ctrl_access_path_t apm_m_path, bool enable)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path));
|
REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path));
|
||||||
} else {
|
} else {
|
||||||
@ -420,22 +387,18 @@ static inline void apm_ll_apm_ctrl_reset_event_enable(bool enable)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Return APM Ctrl interrupt source number.
|
* @brief Fetch the APM Ctrl interrupt source number.
|
||||||
*
|
*
|
||||||
* @param apm_ctrl APM Ctrl (LP_APM/HP_APM)
|
* @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM)
|
||||||
* @param apm_m_path APM Ctrl access patch(M[0:n])
|
* @param apm_m_path APM Ctrl access patch(M[0:n])
|
||||||
*/
|
*/
|
||||||
static inline esp_err_t apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path)
|
static inline int apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path)
|
||||||
{
|
{
|
||||||
HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) ||
|
|
||||||
((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH))
|
|
||||||
);
|
|
||||||
|
|
||||||
switch (apm_ctrl) {
|
switch (apm_ctrl) {
|
||||||
case HP_APM_CTRL :
|
case HP_APM_CTRL :
|
||||||
return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path);
|
return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path);
|
||||||
case LP_APM_CTRL :
|
case LP_APM_CTRL :
|
||||||
return (ETS_LP_APM_M0_INTR_SOURCE);
|
return (ETS_LP_APM_M0_INTR_SOURCE + apm_m_path);
|
||||||
}
|
}
|
||||||
|
|
||||||
return -1;
|
return -1;
|
||||||
|
@ -238,11 +238,15 @@ void apm_hal_apm_ctrl_master_sec_mode_config(apm_ctrl_secure_mode_config_t *sec_
|
|||||||
void apm_hal_apm_ctrl_reset_event_enable(bool enable);
|
void apm_hal_apm_ctrl_reset_event_enable(bool enable);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Returns APM Ctrl access path interrupt source number.
|
* @brief Fetch the APM Ctrl access path interrupt source number.
|
||||||
*
|
*
|
||||||
* @param apm_path APM controller and access path to be configured
|
* @param apm_path APM controller and access path to be configured
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* - valid interrupt source number on success
|
||||||
|
* - -1: invalid interrupt source
|
||||||
*/
|
*/
|
||||||
esp_err_t apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path);
|
int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path);
|
||||||
|
|
||||||
#endif //CONFIG_IDF_TARGET_ESP32P4
|
#endif //CONFIG_IDF_TARGET_ESP32P4
|
||||||
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user