mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
emac: configure data interface early
This commit is contained in:
morris
bot
parent
5e7d08d083
commit
b829fcff3e
@ -75,6 +75,9 @@ typedef struct {
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#endif
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} emac_esp32_t;
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static esp_err_t esp_emac_alloc_driver_obj(const eth_mac_config_t *config, emac_esp32_t **emac_out_hdl, void **out_descriptors);
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static void esp_emac_free_driver_obj(emac_esp32_t *emac, void *descriptors);
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static esp_err_t emac_esp32_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth)
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{
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esp_err_t ret = ESP_OK;
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@ -335,10 +338,6 @@ static esp_err_t emac_esp32_init(esp_eth_mac_t *mac)
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esp_err_t ret = ESP_OK;
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emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
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esp_eth_mediator_t *eth = emac->eth;
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/* enable peripheral clock */
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periph_module_enable(PERIPH_EMAC_MODULE);
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/* init clock, config gpio, etc */
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emac_hal_lowlevel_init(&emac->hal);
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/* init gpio used by smi interface */
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emac_esp32_init_smi_gpio(emac);
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MAC_CHECK(eth->on_state_changed(eth, ETH_STATE_LLINIT, NULL) == ESP_OK, "lowlevel init failed", err, ESP_FAIL);
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@ -383,7 +382,6 @@ static esp_err_t emac_esp32_deinit(esp_eth_mac_t *mac)
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#endif
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emac_hal_stop(&emac->hal);
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eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL);
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periph_module_disable(PERIPH_EMAC_MODULE);
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return ESP_OK;
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}
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@ -404,22 +402,8 @@ static esp_err_t emac_esp32_stop(esp_eth_mac_t *mac)
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static esp_err_t emac_esp32_del(esp_eth_mac_t *mac)
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{
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emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent);
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esp_intr_free(emac->intr_hdl);
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#ifdef CONFIG_PM_ENABLE
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if (emac->pm_lock) {
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esp_pm_lock_delete(emac->pm_lock);
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}
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#endif
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vTaskDelete(emac->rx_task_hdl);
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int i = 0;
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for (i = 0; i < CONFIG_ETH_DMA_RX_BUFFER_NUM; i++) {
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free(emac->hal.rx_buf[i]);
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}
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for (i = 0; i < CONFIG_ETH_DMA_TX_BUFFER_NUM; i++) {
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free(emac->hal.tx_buf[i]);
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}
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free(emac->hal.descriptors);
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free(emac);
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esp_emac_free_driver_obj(emac, emac->hal.descriptors);
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periph_module_disable(PERIPH_EMAC_MODULE);
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return ESP_OK;
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}
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@ -435,87 +419,8 @@ IRAM_ATTR void emac_esp32_isr_handler(void *args)
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}
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}
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esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
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static void esp_emac_free_driver_obj(emac_esp32_t *emac, void *descriptors)
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{
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esp_err_t ret_code = ESP_OK;
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esp_eth_mac_t *ret = NULL;
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void *descriptors = NULL;
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emac_esp32_t *emac = NULL;
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MAC_CHECK(config, "can't set mac config to null", err, NULL);
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if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
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emac = heap_caps_calloc(1, sizeof(emac_esp32_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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} else {
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emac = calloc(1, sizeof(emac_esp32_t));
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}
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MAC_CHECK(emac, "calloc emac failed", err, NULL);
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/* alloc memory for ethernet dma descriptor */
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uint32_t desc_size = CONFIG_ETH_DMA_RX_BUFFER_NUM * sizeof(eth_dma_rx_descriptor_t) +
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CONFIG_ETH_DMA_TX_BUFFER_NUM * sizeof(eth_dma_tx_descriptor_t);
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descriptors = heap_caps_calloc(1, desc_size, MALLOC_CAP_DMA);
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MAC_CHECK(descriptors, "calloc descriptors failed", err, NULL);
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int i = 0;
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/* alloc memory for ethernet dma buffer */
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for (i = 0; i < CONFIG_ETH_DMA_RX_BUFFER_NUM; i++) {
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emac->rx_buf[i] = heap_caps_calloc(1, CONFIG_ETH_DMA_BUFFER_SIZE, MALLOC_CAP_DMA);
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if (!(emac->rx_buf[i])) {
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goto err;
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}
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}
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for (i = 0; i < CONFIG_ETH_DMA_TX_BUFFER_NUM; i++) {
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emac->tx_buf[i] = heap_caps_calloc(1, CONFIG_ETH_DMA_BUFFER_SIZE, MALLOC_CAP_DMA);
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if (!(emac->tx_buf[i])) {
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goto err;
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}
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}
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/* initialize hal layer driver */
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emac_hal_init(&emac->hal, descriptors, emac->rx_buf, emac->tx_buf);
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emac->sw_reset_timeout_ms = config->sw_reset_timeout_ms;
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emac->smi_mdc_gpio_num = config->smi_mdc_gpio_num;
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emac->smi_mdio_gpio_num = config->smi_mdio_gpio_num;
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emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
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emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
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emac->parent.set_mediator = emac_esp32_set_mediator;
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emac->parent.init = emac_esp32_init;
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emac->parent.deinit = emac_esp32_deinit;
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emac->parent.start = emac_esp32_start;
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emac->parent.stop = emac_esp32_stop;
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emac->parent.del = emac_esp32_del;
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emac->parent.write_phy_reg = emac_esp32_write_phy_reg;
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emac->parent.read_phy_reg = emac_esp32_read_phy_reg;
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emac->parent.set_addr = emac_esp32_set_addr;
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emac->parent.get_addr = emac_esp32_get_addr;
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emac->parent.set_speed = emac_esp32_set_speed;
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emac->parent.set_duplex = emac_esp32_set_duplex;
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emac->parent.set_link = emac_esp32_set_link;
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emac->parent.set_promiscuous = emac_esp32_set_promiscuous;
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emac->parent.set_peer_pause_ability = emac_esp32_set_peer_pause_ability;
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emac->parent.enable_flow_ctrl = emac_esp32_enable_flow_ctrl;
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emac->parent.transmit = emac_esp32_transmit;
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emac->parent.receive = emac_esp32_receive;
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/* Interrupt configuration */
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if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
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ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM,
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emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
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} else {
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ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, 0,
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emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
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}
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MAC_CHECK(ret_code == ESP_OK, "alloc emac interrupt failed", err, NULL);
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#ifdef CONFIG_PM_ENABLE
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MAC_CHECK(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "emac_esp32", &emac->pm_lock) == ESP_OK,
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"create pm lock failed", err, NULL);
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#endif
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/* create rx task */
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BaseType_t core_num = tskNO_AFFINITY;
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if (config->flags & ETH_MAC_FLAG_PIN_TO_CORE) {
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core_num = cpu_hal_get_core_id();
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}
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BaseType_t xReturned = xTaskCreatePinnedToCore(emac_esp32_rx_task, "emac_rx", config->rx_task_stack_size, emac,
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config->rx_task_prio, &emac->rx_task_hdl, core_num);
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MAC_CHECK(xReturned == pdPASS, "create emac_rx task failed", err, NULL);
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return &(emac->parent);
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err:
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if (emac) {
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if (emac->rx_task_hdl) {
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vTaskDelete(emac->rx_task_hdl);
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@ -539,6 +444,110 @@ err:
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if (descriptors) {
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free(descriptors);
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}
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}
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static esp_err_t esp_emac_alloc_driver_obj(const eth_mac_config_t *config, emac_esp32_t **emac_out_hdl, void **out_descriptors)
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{
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esp_err_t ret = ESP_OK;
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emac_esp32_t *emac = NULL;
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void *descriptors = NULL;
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if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
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emac = heap_caps_calloc(1, sizeof(emac_esp32_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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} else {
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emac = calloc(1, sizeof(emac_esp32_t));
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}
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MAC_CHECK(emac, "no mem for esp emac object", err, ESP_ERR_NO_MEM);
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/* alloc memory for ethernet dma descriptor */
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uint32_t desc_size = CONFIG_ETH_DMA_RX_BUFFER_NUM * sizeof(eth_dma_rx_descriptor_t) +
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CONFIG_ETH_DMA_TX_BUFFER_NUM * sizeof(eth_dma_tx_descriptor_t);
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descriptors = heap_caps_calloc(1, desc_size, MALLOC_CAP_DMA);
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MAC_CHECK(descriptors, "no mem for descriptors", err, ESP_ERR_NO_MEM);
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/* alloc memory for ethernet dma buffer */
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for (int i = 0; i < CONFIG_ETH_DMA_RX_BUFFER_NUM; i++) {
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emac->rx_buf[i] = heap_caps_calloc(1, CONFIG_ETH_DMA_BUFFER_SIZE, MALLOC_CAP_DMA);
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MAC_CHECK(emac->rx_buf[i], "no mem for RX DMA buffers", err, ESP_ERR_NO_MEM);
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}
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for (int i = 0; i < CONFIG_ETH_DMA_TX_BUFFER_NUM; i++) {
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emac->tx_buf[i] = heap_caps_calloc(1, CONFIG_ETH_DMA_BUFFER_SIZE, MALLOC_CAP_DMA);
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MAC_CHECK(emac->tx_buf[i], "no mem for TX DMA buffers", err, ESP_ERR_NO_MEM);
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}
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/* alloc PM lock */
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#ifdef CONFIG_PM_ENABLE
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MAC_CHECK(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "emac_esp32", &emac->pm_lock) == ESP_OK,
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"create pm lock failed", err, ESP_FAIL);
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#endif
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/* create rx task */
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BaseType_t core_num = tskNO_AFFINITY;
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if (config->flags & ETH_MAC_FLAG_PIN_TO_CORE) {
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core_num = cpu_hal_get_core_id();
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}
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BaseType_t xReturned = xTaskCreatePinnedToCore(emac_esp32_rx_task, "emac_rx", config->rx_task_stack_size, emac,
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config->rx_task_prio, &emac->rx_task_hdl, core_num);
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MAC_CHECK(xReturned == pdPASS, "create emac_rx task failed", err, ESP_FAIL);
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*out_descriptors = descriptors;
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*emac_out_hdl = emac;
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return ESP_OK;
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err:
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esp_emac_free_driver_obj(emac, descriptors);
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return ret;
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}
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esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
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{
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esp_err_t ret_code = ESP_OK;
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esp_eth_mac_t *ret = NULL;
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void *descriptors = NULL;
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emac_esp32_t *emac = NULL;
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MAC_CHECK(config, "can't set mac config to null", err, NULL);
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ret_code = esp_emac_alloc_driver_obj(config, &emac, &descriptors);
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MAC_CHECK(ret_code == ESP_OK, "alloc driver object failed", err, NULL);
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/* enable APB to access Ethernet peripheral registers */
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periph_module_enable(PERIPH_EMAC_MODULE);
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/* initialize hal layer driver */
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emac_hal_init(&emac->hal, descriptors, emac->rx_buf, emac->tx_buf);
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// config emac data interface
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emac_hal_lowlevel_init(&emac->hal);
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/* alloc interrupt */
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if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
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ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM,
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emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
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} else {
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ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, 0,
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emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
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}
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MAC_CHECK(ret_code == ESP_OK, "alloc emac interrupt failed", err_intr, NULL);
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emac->sw_reset_timeout_ms = config->sw_reset_timeout_ms;
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emac->smi_mdc_gpio_num = config->smi_mdc_gpio_num;
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emac->smi_mdio_gpio_num = config->smi_mdio_gpio_num;
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emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
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emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
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emac->parent.set_mediator = emac_esp32_set_mediator;
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emac->parent.init = emac_esp32_init;
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emac->parent.deinit = emac_esp32_deinit;
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emac->parent.start = emac_esp32_start;
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emac->parent.stop = emac_esp32_stop;
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emac->parent.del = emac_esp32_del;
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emac->parent.write_phy_reg = emac_esp32_write_phy_reg;
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emac->parent.read_phy_reg = emac_esp32_read_phy_reg;
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emac->parent.set_addr = emac_esp32_set_addr;
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emac->parent.get_addr = emac_esp32_get_addr;
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emac->parent.set_speed = emac_esp32_set_speed;
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emac->parent.set_duplex = emac_esp32_set_duplex;
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emac->parent.set_link = emac_esp32_set_link;
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emac->parent.set_promiscuous = emac_esp32_set_promiscuous;
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emac->parent.set_peer_pause_ability = emac_esp32_set_peer_pause_ability;
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emac->parent.enable_flow_ctrl = emac_esp32_enable_flow_ctrl;
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emac->parent.transmit = emac_esp32_transmit;
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emac->parent.receive = emac_esp32_receive;
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return &(emac->parent);
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err_intr:
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periph_module_disable(PERIPH_EMAC_MODULE);
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err:
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esp_emac_free_driver_obj(emac, descriptors);
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return ret;
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}
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