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fix(aes-gcm): correct the DMA completion wait condition for hardware GCM case
DMA operation completion must wait until the last DMA descriptor ownership has been changed to hardware, that is hardware is completed the write operation for entire data. Earlier for the hardware GCM case, the first DMA descriptor was checked and it could have resulted in some race condition for non interrupt (MBEDTLS_AES_USE_INTERRUPT disabled) case.
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@ -481,6 +481,7 @@ cleanup:
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int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, unsigned char *output, size_t len, lldesc_t *aad_desc, size_t aad_len)
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{
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lldesc_t *in_desc_head = NULL, *out_desc_head = NULL, *len_desc = NULL;
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lldesc_t *out_desc_tail = NULL; /* pointer to the final output descriptor */
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lldesc_t stream_in_desc, stream_out_desc;
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lldesc_t *block_desc = NULL, *block_in_desc = NULL, *block_out_desc = NULL;
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size_t lldesc_num;
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@ -530,6 +531,8 @@ int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, un
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lldesc_append(&in_desc_head, block_in_desc);
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lldesc_append(&out_desc_head, block_out_desc);
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out_desc_tail = &block_out_desc[lldesc_num - 1];
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}
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/* Any leftover bytes which are appended as an additional DMA list */
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@ -541,6 +544,8 @@ int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, un
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lldesc_append(&in_desc_head, &stream_in_desc);
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lldesc_append(&out_desc_head, &stream_out_desc);
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out_desc_tail = &stream_out_desc;
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}
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@ -579,7 +584,7 @@ int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, un
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aes_hal_transform_dma_gcm_start(blocks);
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esp_aes_dma_wait_complete(use_intr, out_desc_head);
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esp_aes_dma_wait_complete(use_intr, out_desc_tail);
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aes_hal_transform_dma_finish();
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