coex: support esp32h2 coex lib

.gitlab/ci/pre_check.yml

@@ -83,12 +83,17 @@ check_blobs:
     - IDF_TARGET=esp32 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
     - IDF_TARGET=esp32s2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
     - IDF_TARGET=esp32s3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
+    - IDF_TARGET=esp32c2 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
     - IDF_TARGET=esp32c3 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
+    - IDF_TARGET=esp32c6 $IDF_PATH/components/esp_wifi/test_md5/test_md5.sh
     # Check if Coexistence library header files match between IDF and the version used when compiling the libraries
     - IDF_TARGET=esp32 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
     - IDF_TARGET=esp32s2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
     - IDF_TARGET=esp32s3 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
+    - IDF_TARGET=esp32c2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
     - IDF_TARGET=esp32c3 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
+    - IDF_TARGET=esp32c6 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
+    - IDF_TARGET=esp32h2 $IDF_PATH/components/esp_coex/test_md5/test_md5.sh
     # Check if Wi-Fi, PHY, BT blobs contain references to specific symbols
     - bash $IDF_PATH/tools/ci/check_blobs.sh
 

components/esp_coex/CMakeLists.txt

@@ -9,10 +9,17 @@ if(CONFIG_ESP_COEX_SW_COEXIST_ENABLE OR CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE)
         set(ldfragments "linker.lf")
     endif()
 
+    # TODO: need to remove these logic when unsupport esp32h4.
+    if(IDF_TARGET STREQUAL "esp32h4")
+        set(srcs
+        "src/coexist.c"
+        "esp32h2/esp_coex_adapter.c")
+    else()
         set(srcs
             "src/coexist.c"
             "${idf_target}/esp_coex_adapter.c")
     endif()
+endif()
 
 if(CONFIG_ESP_WIFI_ENABLED)
     list(APPEND srcs "${idf_target}/esp_coex_adapter.c")
@@ -31,9 +38,14 @@ if(CONFIG_ESP_COEX_SW_COEXIST_ENABLE OR CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE)
 
     if(link_binary_libs)
         set(blob coexist)
-
+        # TODO: need to remove these logic when unsupport esp32h4.
+        if(IDF_TARGET STREQUAL "esp32h4")
+            add_prebuilt_library(${blob} "${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/lib${blob}.a"
+                                REQUIRES ${COMPONENT_NAME})
+        else()
             add_prebuilt_library(${blob} "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/lib${blob}.a"
                                     REQUIRES ${COMPONENT_NAME})
+        endif()
         target_link_libraries(${COMPONENT_LIB} PUBLIC ${blob})
     endif()
 

components/esp_coex/Kconfig

@@ -3,9 +3,10 @@ menu "Wireless Coexistence"
     config ESP_COEX_SW_COEXIST_ENABLE
         bool "Software controls WiFi/Bluetooth coexistence"
         depends on (ESP_WIFI_ENABLED && BT_ENABLED) || \
-            (ESP_WIFI_ENABLED && IEEE802154_ENABLED)
+            (ESP_WIFI_ENABLED && IEEE802154_ENABLED)   || \
+            (IEEE802154_ENABLED && BT_ENABLED)
         default y
-        select ESP_WIFI_STA_DISCONNECTED_PM_ENABLE
+        select ESP_WIFI_STA_DISCONNECTED_PM_ENABLE if (ESP_WIFI_ENABLED)
         help
             If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
             Recommended for heavy traffic scenarios. Both coexistence configuration options are

components/esp_coex/esp32h2/esp_coex_adapter.c

@@ -0,0 +1,165 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stddef.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include <pthread.h>
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "freertos/semphr.h"
+#include "freertos/portmacro.h"
+#include "esp_heap_caps.h"
+#include "esp_timer.h"
+#include "soc/rtc.h"
+#include "esp_private/esp_clk.h"
+#include "esp_coexist_adapter.h"
+#include "esp32c6/rom/ets_sys.h"
+
+#define TAG "esp_coex_adapter"
+
+#define OSI_FUNCS_TIME_BLOCKING  0xffffffff
+
+bool IRAM_ATTR esp_coex_common_env_is_chip_wrapper(void)
+{
+#ifdef CONFIG_IDF_ENV_FPGA
+    return false;
+#else
+    return true;
+#endif
+}
+
+void *esp_coex_common_spin_lock_create_wrapper(void)
+{
+    portMUX_TYPE tmp = portMUX_INITIALIZER_UNLOCKED;
+    void *mux = malloc(sizeof(portMUX_TYPE));
+
+    if (mux) {
+        memcpy(mux, &tmp, sizeof(portMUX_TYPE));
+        return mux;
+    }
+    return NULL;
+}
+
+uint32_t IRAM_ATTR esp_coex_common_int_disable_wrapper(void *wifi_int_mux)
+{
+    if (xPortInIsrContext()) {
+        portENTER_CRITICAL_ISR(wifi_int_mux);
+    } else {
+        portENTER_CRITICAL(wifi_int_mux);
+    }
+
+    return 0;
+}
+
+void IRAM_ATTR esp_coex_common_int_restore_wrapper(void *wifi_int_mux, uint32_t tmp)
+{
+    if (xPortInIsrContext()) {
+        portEXIT_CRITICAL_ISR(wifi_int_mux);
+    } else {
+        portEXIT_CRITICAL(wifi_int_mux);
+    }
+}
+
+void IRAM_ATTR esp_coex_common_task_yield_from_isr_wrapper(void)
+{
+    portYIELD_FROM_ISR();
+}
+
+void *esp_coex_common_semphr_create_wrapper(uint32_t max, uint32_t init)
+{
+    return (void *)xSemaphoreCreateCounting(max, init);
+}
+
+void esp_coex_common_semphr_delete_wrapper(void *semphr)
+{
+    vSemaphoreDelete(semphr);
+}
+
+int32_t esp_coex_common_semphr_take_wrapper(void *semphr, uint32_t block_time_tick)
+{
+    if (block_time_tick == OSI_FUNCS_TIME_BLOCKING) {
+        return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
+    } else {
+        return (int32_t)xSemaphoreTake(semphr, block_time_tick);
+    }
+}
+
+int32_t esp_coex_common_semphr_give_wrapper(void *semphr)
+{
+    return (int32_t)xSemaphoreGive(semphr);
+}
+
+void IRAM_ATTR esp_coex_common_timer_disarm_wrapper(void *timer)
+{
+    ets_timer_disarm(timer);
+}
+
+void esp_coex_common_timer_done_wrapper(void *ptimer)
+{
+    ets_timer_done(ptimer);
+}
+
+void esp_coex_common_timer_setfn_wrapper(void *ptimer, void *pfunction, void *parg)
+{
+    ets_timer_setfn(ptimer, pfunction, parg);
+}
+
+void IRAM_ATTR esp_coex_common_timer_arm_us_wrapper(void *ptimer, uint32_t us, bool repeat)
+{
+    ets_timer_arm_us(ptimer, us, repeat);
+}
+
+uint32_t esp_coex_common_clk_slowclk_cal_get_wrapper(void)
+{
+    /* The bit width of WiFi light sleep clock calibration is 12 while the one of
+     * system is 19. It should shift 19 - 12 = 7.
+    */
+    return (esp_clk_slowclk_cal_get() >> (RTC_CLK_CAL_FRACT - SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH));
+}
+
+void *IRAM_ATTR esp_coex_common_malloc_internal_wrapper(size_t size)
+{
+    return heap_caps_malloc(size, MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
+}
+
+/* static wrapper */
+
+static int32_t IRAM_ATTR esp_coex_semphr_take_from_isr_wrapper(void *semphr, void *hptw)
+{
+    return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
+}
+
+static int32_t IRAM_ATTR esp_coex_semphr_give_from_isr_wrapper(void *semphr, void *hptw)
+{
+    return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
+}
+
+coex_adapter_funcs_t g_coex_adapter_funcs = {
+    ._version = COEX_ADAPTER_VERSION,
+    ._task_yield_from_isr = esp_coex_common_task_yield_from_isr_wrapper,
+    ._semphr_create = esp_coex_common_semphr_create_wrapper,
+    ._semphr_delete = esp_coex_common_semphr_delete_wrapper,
+    ._semphr_take_from_isr = esp_coex_semphr_take_from_isr_wrapper,
+    ._semphr_give_from_isr = esp_coex_semphr_give_from_isr_wrapper,
+    ._semphr_take = esp_coex_common_semphr_take_wrapper,
+    ._semphr_give = esp_coex_common_semphr_give_wrapper,
+    ._is_in_isr = xPortInIsrContext,
+    ._malloc_internal =  esp_coex_common_malloc_internal_wrapper,
+    ._free = free,
+    ._esp_timer_get_time = esp_timer_get_time,
+    ._env_is_chip = esp_coex_common_env_is_chip_wrapper,
+    ._slowclk_cal_get = esp_coex_common_clk_slowclk_cal_get_wrapper,
+    ._timer_disarm = esp_coex_common_timer_disarm_wrapper,
+    ._timer_done = esp_coex_common_timer_done_wrapper,
+    ._timer_setfn = esp_coex_common_timer_setfn_wrapper,
+    ._timer_arm_us = esp_coex_common_timer_arm_us_wrapper,
+    ._magic = COEX_ADAPTER_MAGIC,
+};

components/esp_coex/include/esp_coex_i154.h

@@ -8,16 +8,15 @@
 
 #ifdef CONFIG_SOC_IEEE802154_SUPPORTED
 typedef enum {
-    IEEE802154_RISK_TX = 1,
-    IEEE802154_TX_AT,
-    IEEE802154_RX_AT,
-    IEEE802154_ACK,
-    IEEE802154_NORMAL,
-    IEEE802154_IDLE_RX,
+    IEEE802154_HIGH = 1,
+    IEEE802154_MIDDLE,
+    IEEE802154_LOW,
+    IEEE802154_IDLE,
     IEEE802154_EVENT_MAX,
 } ieee802154_coex_event_t;
 
-void esp_coex_ieee802154_pti_set(ieee802154_coex_event_t event);
+void esp_coex_ieee802154_txrx_pti_set(ieee802154_coex_event_t event);
+void esp_coex_ieee802154_ack_pti_set(ieee802154_coex_event_t event);
 #endif
 
 #endif

components/esp_coex/lib

@@ -1 +1 @@
-Subproject commit cc8eae05caf9b67ddbde40b057e32748c197b95b
+Subproject commit 67ba5893b088d02a9902e1af275102c8f9dbed24

components/esp_coex/test_md5/test_md5.sh

@@ -22,7 +22,7 @@ case $IDF_TARGET in
     esp32s3)
         PREFIX=xtensa-esp32s3-elf-
         ;;
-    esp32c2|esp32c3|esp32c6)
+    esp32c2|esp32c3|esp32c6|esp32h2)
         PREFIX=riscv32-esp-elf-
         ;;
     *)
@@ -60,9 +60,11 @@ function check_md5()
 echo "Checking libraries for target ${IDF_TARGET}..."
 check_md5 ${IDF_PATH}/components/esp_coex/include/esp_coexist_adapter.h g_coex_adapter_funcs_md5
 
-if [ "${IDF_TARGET}" == "esp32c6" ]; then
+case $IDF_TARGET in
+    esp32c6|esp32h2)
     check_md5 ${IDF_PATH}/components/esp_coex/include/esp_coex_i154.h g_coex_i154_funcs_md5
-fi
+    ;;
+esac
 
 if [ $FAILURES -gt 0 ]; then
     exit 1

components/esp_wifi/test_md5/test_md5.sh

@@ -22,10 +22,7 @@ case $IDF_TARGET in
     esp32s3)
         PREFIX=xtensa-esp32s3-elf-
         ;;
-    esp32c3)
-        PREFIX=riscv32-esp-elf-
-        ;;
-    esp32c6)
+    esp32c2|esp32c3|esp32c6)
         PREFIX=riscv32-esp-elf-
         ;;
     *)

components/ieee802154/lib

@@ -1 +1 @@
-Subproject commit 56f4a209e8b88e32505172b7632380b8f260e789
+Subproject commit ecb84fc262cfb8d0f262c22f7f8792bf069dfdd9

components/soc/esp32h4/include/soc/Kconfig.soc_caps.in

@@ -231,6 +231,10 @@ config SOC_APB_BACKUP_DMA
     bool
     default y
 
+config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
+    int
+    default 12
+
 config SOC_BROWNOUT_RESET_SUPPORTED
     bool
     default y

components/soc/esp32h4/include/soc/soc_caps.h

@@ -110,6 +110,9 @@
 /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
 #define SOC_APB_BACKUP_DMA              (1)
 
+/*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
+#define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH  (12)
+
 /*-------------------------- BROWNOUT CAPS -----------------------------------*/
 #define SOC_BROWNOUT_RESET_SUPPORTED 1
 

examples/openthread/ot_cli/partitions.csv

@@ -2,5 +2,5 @@
 # Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
 nvs,        data, nvs,      0x9000,  0x6000,
 phy_init,   data, phy,      0xf000,  0x1000,
-factory,    app,  factory,  0x10000, 1M,
+factory,    app,  factory,  0x10000, 0x120000,
 ot_storage, data, 0x3a,            , 0x2000,