From b4d2fb56a0bf4d0872067cf96954666a7143bcd8 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Fri, 26 Feb 2021 11:44:26 +0800 Subject: [PATCH] ci: enable previously disabled unit tests --- components/driver/test/test_spi_master.c | 7 +--- components/driver/test/test_spi_sio.c | 5 ++- components/esp_pm/test/test_pm.c | 40 ++++++++++++------- components/esp_rom/test/test_miniz.c | 1 + components/esp_system/test/test_sleep.c | 25 ++++++++---- .../test/test_esp_timer_light_sleep.c | 5 +-- tools/unit-test-app/configs/pm_c3 | 4 ++ 7 files changed, 56 insertions(+), 31 deletions(-) create mode 100644 tools/unit-test-app/configs/pm_c3 diff --git a/components/driver/test/test_spi_master.c b/components/driver/test/test_spi_master.c index bc3c873b21..b942640145 100644 --- a/components/driver/test/test_spi_master.c +++ b/components/driver/test/test_spi_master.c @@ -1050,7 +1050,6 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]") #endif //#if !DISABLED_FOR_TARGETS(ESP32C3) -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) /******************************************************************************** * Test SPI transaction interval ********************************************************************************/ @@ -1058,8 +1057,8 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]") #ifndef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE #define RECORD_TIME_PREPARE() uint32_t __t1, __t2 -#define RECORD_TIME_START() do {__t1 = xthal_get_ccount();}while(0) -#define RECORD_TIME_END(p_time) do{__t2 = xthal_get_ccount(); *p_time = (__t2-__t1);}while(0) +#define RECORD_TIME_START() do {__t1 = esp_cpu_get_ccount();}while(0) +#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0) #ifdef CONFIG_IDF_TARGET_ESP32 #define GET_US_BY_CCOUNT(t) ((double)t/CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) #elif CONFIG_IDF_TARGET_ESP32S2 @@ -1203,5 +1202,3 @@ TEST_CASE("spi_speed","[spi]") master_free_device_bus(spi); } #endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE - -#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3) diff --git a/components/driver/test/test_spi_sio.c b/components/driver/test/test_spi_sio.c index cdb95a6b3c..c879ed6325 100644 --- a/components/driver/test/test_spi_sio.c +++ b/components/driver/test/test_spi_sio.c @@ -24,7 +24,8 @@ #include "hal/spi_ll.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) +#if !DISABLED_FOR_TARGETS(ESP32C3) //There is only one GPSPI controller, so single-board test is disabled. /******************************************************************************** * Test SIO @@ -101,6 +102,8 @@ TEST_CASE("local test sio", "[spi]") spi_slave_free(TEST_SLAVE_HOST); master_free_device_bus(spi); } +#endif //!DISABLED_FOR_TARGETS(ESP32C3) //There is only one GPSPI controller, so single-board test is disabled. + #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) //These tests are ESP32 only due to lack of runners diff --git a/components/esp_pm/test/test_pm.c b/components/esp_pm/test/test_pm.c index 804fd88729..7a3abe8760 100644 --- a/components/esp_pm/test/test_pm.c +++ b/components/esp_pm/test/test_pm.c @@ -26,6 +26,8 @@ #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/clk.h" #include "esp32s3/ulp.h" +#elif CONFIG_IDF_TARGET_ESP32C3 +#include "esp32c3/clk.h" #endif TEST_CASE("Can dump power management lock stats", "[pm]") @@ -44,6 +46,8 @@ static void switch_freq(int mhz) esp_pm_config_esp32s2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32S3 esp_pm_config_esp32s3_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32C3 + esp_pm_config_esp32c3_t pm_config = { #endif .max_freq_mhz = mhz, .min_freq_mhz = MIN(mhz, xtal_freq), @@ -56,22 +60,21 @@ static void switch_freq(int mhz) } } +#if CONFIG_IDF_TARGET_ESP32C3 +static const int test_freqs[] = {40, 160, 80, 40, 80, 10, 80, 20, 40}; +#else +static const int test_freqs[] = {240, 40, 160, 240, 80, 40, 240, 40, 80, 10, 80, 20, 40}; +#endif + + TEST_CASE("Can switch frequency using esp_pm_configure", "[pm]") { int orig_freq_mhz = esp_clk_cpu_freq() / MHZ; - switch_freq(240); - switch_freq(40); - switch_freq(160); - switch_freq(240); - switch_freq(80); - switch_freq(40); - switch_freq(240); - switch_freq(40); - switch_freq(80); - switch_freq(10); - switch_freq(80); - switch_freq(20); - switch_freq(40); + + for (int i = 0; i < sizeof(test_freqs)/sizeof(int); i++) { + switch_freq(test_freqs[i]); + } + switch_freq(orig_freq_mhz); } @@ -88,6 +91,8 @@ static void light_sleep_enable(void) esp_pm_config_esp32s2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32S3 esp_pm_config_esp32s3_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32C3 + esp_pm_config_esp32c3_t pm_config = { #endif .max_freq_mhz = cur_freq_mhz, .min_freq_mhz = xtal_freq, @@ -106,6 +111,8 @@ static void light_sleep_disable(void) esp_pm_config_esp32s2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32S3 esp_pm_config_esp32s3_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32C3 + esp_pm_config_esp32c3_t pm_config = { #endif .max_freq_mhz = cur_freq_mhz, .min_freq_mhz = cur_freq_mhz, @@ -154,6 +161,9 @@ TEST_CASE("Automatic light occurs when tasks are suspended", "[pm]") } #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3) +#if !DISABLED_FOR_TARGETS(ESP32C3) +// No ULP on C3 + // Fix failure on ESP32 when running alone; passes when the previous test is run before this one TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]") { @@ -227,7 +237,9 @@ TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm][ignore]") light_sleep_disable(); } -#endif +#endif //!DISABLED_FOR_TARGETS(ESP32C3) +#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3) + typedef struct { int delay_us; int result; diff --git a/components/esp_rom/test/test_miniz.c b/components/esp_rom/test/test_miniz.c index 13d30a978a..4744aba6a9 100644 --- a/components/esp_rom/test/test_miniz.c +++ b/components/esp_rom/test/test_miniz.c @@ -10,6 +10,7 @@ #ifdef CONFIG_SPIRAM #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) +// miniz unit test can't pass on ESP32 non-ECO3 version IDF-1807 #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/miniz.h" diff --git a/components/esp_system/test/test_sleep.c b/components/esp_system/test/test_sleep.c index 7024edf48f..0871cefd87 100644 --- a/components/esp_system/test/test_sleep.c +++ b/components/esp_system/test/test_sleep.c @@ -20,7 +20,7 @@ #include "esp_rom_sys.h" #include "esp_timer.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3, ESP32S3) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" @@ -66,14 +66,12 @@ TEST_CASE("wake up from deep sleep using timer", "[deepsleep][reset=DEEPSLEEP_RE esp_deep_sleep_start(); } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) TEST_CASE("light sleep followed by deep sleep", "[deepsleep][reset=DEEPSLEEP_RESET]") { esp_sleep_enable_timer_wakeup(1000000); esp_light_sleep_start(); esp_deep_sleep_start(); } -#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) TEST_CASE("wake up from light sleep using timer", "[deepsleep]") { @@ -194,7 +192,12 @@ TEST_CASE("light sleep duration is correct", "[deepsleep][ignore]") TEST_CASE("light sleep and frequency switching", "[deepsleep]") { #ifndef CONFIG_PM_ENABLE - uart_ll_set_sclk(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), UART_SCLK_REF_TICK); +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 + uart_sclk_t clk_source = UART_SCLK_REF_TICK; +#else + uart_sclk_t clk_source = UART_SCLK_XTAL; +#endif + uart_ll_set_sclk(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), clk_source); uart_ll_set_baudrate(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), CONFIG_ESP_CONSOLE_UART_BAUDRATE); #endif @@ -350,6 +353,8 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub from stack in RTC RAM", "[dee #endif // CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED + TEST_CASE("wake up using ext0 (13 high)", "[deepsleep][ignore]") { ESP_ERROR_CHECK(rtc_gpio_init(GPIO_NUM_13)); @@ -420,7 +425,9 @@ __attribute__((unused)) static uint32_t get_cause(void) return wakeup_cause; } -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) +// Fails on S2 IDF-2903 + // This test case verifies deactivation of trigger for wake up sources TEST_CASE("disable source trigger behavior", "[deepsleep]") { @@ -493,7 +500,9 @@ TEST_CASE("disable source trigger behavior", "[deepsleep]") // Disable ext0 wakeup source, as this might interfere with other tests ESP_ERROR_CHECK(esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_EXT0)); } -#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3) +#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2) + +#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED static RTC_DATA_ATTR struct timeval start; static void trigger_deepsleep(void) @@ -530,14 +539,14 @@ static void check_time_deepsleep(void) TEST_CASE_MULTIPLE_STAGES("check a time after wakeup from deep sleep", "[deepsleep][reset=DEEPSLEEP_RESET]", trigger_deepsleep, check_time_deepsleep); -#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3, ESP32S3) +#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP static void gpio_deepsleep_wakeup_config(void) { gpio_config_t io_conf = { .mode = GPIO_MODE_INPUT, - .pin_bit_mask = ((1ULL << 2) | (1ULL << 4)) + .pin_bit_mask = ((1ULL << 2) | (1ULL << 4)) }; ESP_ERROR_CHECK(gpio_config(&io_conf)); } diff --git a/components/esp_timer/test/test_esp_timer_light_sleep.c b/components/esp_timer/test/test_esp_timer_light_sleep.c index b2518b1a2e..e6ef48e5c9 100644 --- a/components/esp_timer/test/test_esp_timer_light_sleep.c +++ b/components/esp_timer/test/test_esp_timer_light_sleep.c @@ -9,8 +9,7 @@ #include "esp_sleep.h" -#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3) // IDF-1780 ESP32-S3 Deep sleep and light sleep -// TODO ESP32-C3 IDF-2571 +#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) // IDF-1780 ESP32-S3 Deep sleep and light sleep static void timer_cb1(void *arg) { @@ -50,4 +49,4 @@ TEST_CASE("Test the periodic timer does not handle lost events during light slee TEST_ESP_OK(esp_timer_delete(periodic_timer)); } -#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3) +#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) diff --git a/tools/unit-test-app/configs/pm_c3 b/tools/unit-test-app/configs/pm_c3 new file mode 100644 index 0000000000..e1fd3d1da1 --- /dev/null +++ b/tools/unit-test-app/configs/pm_c3 @@ -0,0 +1,4 @@ +CONFIG_IDF_TARGET="esp32c3" +TEST_COMPONENTS=esp_pm +CONFIG_PM_ENABLE=y +CONFIG_FREERTOS_USE_TICKLESS_IDLE=y