mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
feat(dma2d): added help driver for copying frame buffer with DMA2D
This commit is contained in:
morris
parent
d92cd1b7ec
commit
b2de1b5665
@ -14,6 +14,10 @@ set(includes "include" "interface")
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set(priv_requires "esp_mm" "esp_psram" "esp_pm" "esp_driver_spi" "esp_driver_i2s")
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set(public_requires "driver" "esp_driver_gpio" "esp_driver_i2c")
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if(CONFIG_SOC_DMA2D_SUPPORTED)
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list(APPEND srcs "src/esp_async_fbcpy.c")
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endif()
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if(CONFIG_SOC_I2C_SUPPORTED)
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list(APPEND srcs "i2c/esp_lcd_panel_io_i2c_v1.c" "i2c/esp_lcd_panel_io_i2c_v2.c")
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endif()
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90
components/esp_lcd/priv_include/esp_async_fbcpy.h
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90
components/esp_lcd/priv_include/esp_async_fbcpy.h
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@ -0,0 +1,90 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include "hal/color_types.h"
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/**
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* @brief Async FrameBuffer copy context
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*/
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typedef struct esp_async_fbcpy_context_t *esp_async_fbcpy_handle_t;
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/**
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* @brief Async FrameBuffer copy configuration
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*/
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typedef struct {
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} esp_async_fbcpy_config_t;
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/**
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* @brief Install Async FrameBuffer copy driver
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*
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* @param config Async FrameBuffer copy configuration
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* @param mcp Returned Async FrameBuffer copy handle
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* @return
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* - ESP_OK: Install Async FrameBuffer copy driver successfully
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* - ESP_ERR_INVALID_ARG: Install Async FrameBuffer copy driver failed because of invalid argument
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* - ESP_ERR_NO_MEM: Install Async FrameBuffer copy driver failed because of out of memory
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* - ESP_FAIL: Install Async FrameBuffer copy driver failed because of other error
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*/
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esp_err_t esp_async_fbcpy_install(const esp_async_fbcpy_config_t *config, esp_async_fbcpy_handle_t *mcp);
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/**
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* @brief Uninstall Async FrameBuffer copy driver
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*
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* @param mcp Async FrameBuffer copy handle
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* @return
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* - ESP_OK: Uninstall Async FrameBuffer copy driver successfully
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* - ESP_ERR_INVALID_ARG: Uninstall Async FrameBuffer copy driver failed because of invalid argument
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* - ESP_FAIL: Uninstall Async FrameBuffer copy driver failed because of other error
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*/
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esp_err_t esp_async_fbcpy_uninstall(esp_async_fbcpy_handle_t mcp);
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/**
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* @brief Async FrameBuffer copy transaction descriptor
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*/
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typedef struct {
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const void *src_buffer; /*!< Source buffer */
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void *dst_buffer; /*!< Destination buffer */
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size_t src_buffer_size_x; /*!< Source buffer size in x direction, size count in the number of pixels */
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size_t src_buffer_size_y; /*!< Source buffer size in y direction, size count in the number of pixels */
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size_t dst_buffer_size_x; /*!< Destination buffer size in x direction, size count in the number of pixels */
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size_t dst_buffer_size_y; /*!< Destination buffer size in y direction, size count in the number of pixels */
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size_t src_offset_x; /*!< Copy action will start from this offset in source buffer in the x direction, offset count in the number of pixels */
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size_t src_offset_y; /*!< Copy action will start from this offset in source buffer in the y direction, offset count in the number of pixels */
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size_t dst_offset_x; /*!< Copy action will start from this offset in destination buffer in the x direction, offset count in the number of pixels */
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size_t dst_offset_y; /*!< Copy action will start from this offset in destination buffer in the y direction, offset count in the number of pixels */
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size_t copy_size_x; /*!< Copy size in the x direction, size count in the number of pixels */
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size_t copy_size_y; /*!< Copy size in the y direction, size count in the number of pixels */
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color_space_pixel_format_t pixel_format_unique_id; /*!< Pixel format unique ID */
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} esp_async_fbcpy_trans_desc_t;
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/**
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* @brief Async FrameBuffer copy event data
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*/
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typedef struct {
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} esp_async_fbcpy_event_data_t;
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/**
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* @brief Async FrameBuffer copy event callback prototype
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*/
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typedef bool (*esp_async_fbcpy_event_callback_t)(esp_async_fbcpy_handle_t mcp, esp_async_fbcpy_event_data_t *event_data, void *cb_args);
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/**
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* @brief Start Async FrameBuffer copy transaction
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*
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* @param mcp Async FrameBuffer copy handle
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* @param transaction Async FrameBuffer copy transaction descriptor
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* @param memcpy_done_cb Callback function that will be invoked when Async FrameBuffer copy transaction finishes
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* @param cb_args User data
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* @return
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* - ESP_OK: Start Async FrameBuffer copy transaction successfully
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* - ESP_ERR_INVALID_ARG: Start Async FrameBuffer copy transaction failed because of invalid argument
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* - ESP_FAIL: Start Async FrameBuffer copy transaction failed because of other error
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*/
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esp_err_t esp_async_fbcpy(esp_async_fbcpy_handle_t mcp, esp_async_fbcpy_trans_desc_t* transaction,
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esp_async_fbcpy_event_callback_t memcpy_done_cb, void *cb_args);
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204
components/esp_lcd/src/esp_async_fbcpy.c
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204
components/esp_lcd/src/esp_async_fbcpy.c
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@ -0,0 +1,204 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_check.h"
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#include "esp_cache.h"
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#include "esp_heap_caps.h"
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#include "soc/dma2d_channel.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "hal/dma2d_ll.h"
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#include "esp_private/dma2d.h"
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#include "esp_async_fbcpy.h"
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#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
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static const char *TAG = "async_fbcpy";
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typedef struct esp_async_fbcpy_context_t {
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dma2d_pool_handle_t client; // DMA2D client
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dma2d_descriptor_t* tx_desc; // DMA2D TX descriptor
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dma2d_descriptor_t* rx_desc; // DMA2D RX descriptor
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dma2d_trans_t* trans_desc; // DMA2D transaction descriptor
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size_t dma_desc_size; // DMA2D descriptor size
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esp_async_fbcpy_event_callback_t memcpy_done_cb; // memory copy done callback
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void *cb_args; // callback arguments
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} esp_async_fbcpy_context_t;
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static esp_err_t async_fbcpy_del_context(esp_async_fbcpy_context_t* ctx)
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{
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if (ctx->tx_desc) {
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free(ctx->tx_desc);
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}
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if (ctx->rx_desc) {
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free(ctx->rx_desc);
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}
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if (ctx->trans_desc) {
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free(ctx->trans_desc);
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}
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if (ctx->client) {
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dma2d_release_pool(ctx->client);
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}
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free(ctx);
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return ESP_OK;
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}
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esp_err_t esp_async_fbcpy_install(const esp_async_fbcpy_config_t *config, esp_async_fbcpy_handle_t *mcp)
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{
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esp_err_t ret = ESP_OK;
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esp_async_fbcpy_context_t *ctx = NULL;
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dma2d_trans_t* trans_desc = NULL;
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dma2d_descriptor_t* dma_tx_desc = NULL;
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dma2d_descriptor_t* dma_rx_desc = NULL;
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dma2d_pool_handle_t dma2d_client = NULL;
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ESP_RETURN_ON_FALSE(config && mcp, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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// allocate context memory
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ctx = heap_caps_calloc(1, sizeof(esp_async_fbcpy_context_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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ESP_GOTO_ON_FALSE(ctx, ESP_ERR_NO_MEM, err, TAG, "no mem for esp_async_fbcpy_context_t");
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// according to the dma2d design, the transaction descriptor is also saved by the user
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trans_desc = heap_caps_calloc(1, dma2d_get_trans_elm_size(), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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ESP_GOTO_ON_FALSE(trans_desc, ESP_ERR_NO_MEM, err, TAG, "no mem for trans_desc");
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ctx->trans_desc = trans_desc;
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// allocate memory for DMA descriptor, the descriptor must be allocated from the internal memory, and alignment to the cache line size
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uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA);
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size_t alignment = MAX(DMA2D_LL_DESC_ALIGNMENT, data_cache_line_size);
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size_t dma_desc_mem_size = ALIGN_UP(sizeof(dma2d_descriptor_align8_t), alignment);
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dma_tx_desc = heap_caps_aligned_calloc(alignment, 1, dma_desc_mem_size, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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dma_rx_desc = heap_caps_aligned_calloc(alignment, 1, dma_desc_mem_size, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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ESP_GOTO_ON_FALSE(dma_tx_desc && dma_rx_desc, ESP_ERR_NO_MEM, err, TAG, "no memory for DMA2D descriptors");
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ctx->tx_desc = dma_tx_desc;
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ctx->rx_desc = dma_rx_desc;
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ctx->dma_desc_size = dma_desc_mem_size;
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// initialize DMA2D client
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dma2d_pool_config_t dma2d_client_config = {}; // all follow default configurations
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ESP_GOTO_ON_ERROR(dma2d_acquire_pool(&dma2d_client_config, &dma2d_client), err, TAG, "create DMA2D client failed");
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ctx->client = dma2d_client;
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*mcp = ctx;
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return ESP_OK;
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err:
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if (ctx) {
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async_fbcpy_del_context(ctx);
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}
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return ret;
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}
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esp_err_t esp_async_fbcpy_uninstall(esp_async_fbcpy_handle_t mcp)
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{
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ESP_RETURN_ON_FALSE(mcp, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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return async_fbcpy_del_context(mcp);
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}
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static void async_memcpy_setup_dma2d_descriptor(esp_async_fbcpy_context_t* mcp_ctx, esp_async_fbcpy_trans_desc_t* transaction)
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{
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dma2d_descriptor_t* tx_desc = mcp_ctx->tx_desc;
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dma2d_descriptor_t* rx_desc = mcp_ctx->rx_desc;
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size_t dma_desc_size = mcp_ctx->dma_desc_size;
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uint8_t dma2d_pbyte = dma2d_desc_pixel_format_to_pbyte_value(transaction->pixel_format_unique_id);
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tx_desc->buffer = (void*)transaction->src_buffer;
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tx_desc->next = NULL;
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tx_desc->dma2d_en = 1;
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tx_desc->suc_eof = 1;
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tx_desc->ha_length = transaction->src_buffer_size_x;
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tx_desc->va_size = transaction->src_buffer_size_y;
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tx_desc->hb_length = transaction->copy_size_x;
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tx_desc->vb_size = transaction->copy_size_y;
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tx_desc->x = transaction->src_offset_x;
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tx_desc->y = transaction->src_offset_y;
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tx_desc->pbyte = dma2d_pbyte;
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tx_desc->mode = DMA2D_DESCRIPTOR_BLOCK_RW_MODE_SINGLE;
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tx_desc->owner = DMA2D_DESCRIPTOR_BUFFER_OWNER_DMA;
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rx_desc->buffer = transaction->dst_buffer;
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rx_desc->next = NULL;
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rx_desc->dma2d_en = 1;
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rx_desc->suc_eof = 1;
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rx_desc->ha_length = transaction->dst_buffer_size_x;
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rx_desc->va_size = transaction->dst_buffer_size_y;
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rx_desc->hb_length = transaction->copy_size_x;
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rx_desc->vb_size = transaction->copy_size_y;
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rx_desc->x = transaction->dst_offset_x;
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rx_desc->y = transaction->dst_offset_y;
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rx_desc->pbyte = dma2d_pbyte;
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rx_desc->mode = DMA2D_DESCRIPTOR_BLOCK_RW_MODE_SINGLE;
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rx_desc->owner = DMA2D_DESCRIPTOR_BUFFER_OWNER_DMA;
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esp_cache_msync(tx_desc, dma_desc_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE);
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esp_cache_msync(rx_desc, dma_desc_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE);
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}
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static bool dma2d_memcpy_done_cb(dma2d_channel_handle_t dma2d_chan, dma2d_event_data_t *event_data, void *user_data)
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{
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bool need_yield = false;
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esp_async_fbcpy_context_t* mcp = (esp_async_fbcpy_context_t*)user_data;
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if (mcp->memcpy_done_cb) {
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need_yield = mcp->memcpy_done_cb(mcp, NULL, mcp->cb_args);
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}
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return need_yield;
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}
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static bool dma2d_job_picked_cb(uint32_t num_chans, const dma2d_trans_channel_info_t *dma2d_chans, void *user_data)
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{
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esp_async_fbcpy_context_t* mcp = (esp_async_fbcpy_context_t*)user_data;
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dma2d_channel_handle_t tx_chan = NULL;
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dma2d_channel_handle_t rx_chan = NULL;
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for (uint32_t i = 0; i < num_chans; i++) {
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if (dma2d_chans[i].dir == DMA2D_CHANNEL_DIRECTION_TX) {
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tx_chan = dma2d_chans[i].chan;
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}
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if (dma2d_chans[i].dir == DMA2D_CHANNEL_DIRECTION_RX) {
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rx_chan = dma2d_chans[i].chan;
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}
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}
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dma2d_trigger_t trig_periph = {
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.periph = DMA2D_TRIG_PERIPH_M2M,
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.periph_sel_id = SOC_DMA2D_TRIG_PERIPH_M2M_TX,
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};
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dma2d_connect(tx_chan, &trig_periph);
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trig_periph.periph_sel_id = SOC_DMA2D_TRIG_PERIPH_M2M_RX;
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dma2d_connect(rx_chan, &trig_periph);
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dma2d_rx_event_callbacks_t dma_cbs = {
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.on_recv_eof = dma2d_memcpy_done_cb,
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};
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dma2d_register_rx_event_callbacks(rx_chan, &dma_cbs, mcp);
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dma2d_set_desc_addr(tx_chan, (intptr_t)(mcp->tx_desc));
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dma2d_set_desc_addr(rx_chan, (intptr_t)(mcp->rx_desc));
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dma2d_start(tx_chan);
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dma2d_start(rx_chan);
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return false;
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}
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esp_err_t esp_async_fbcpy(esp_async_fbcpy_handle_t mcp, esp_async_fbcpy_trans_desc_t* transaction, esp_async_fbcpy_event_callback_t memcpy_done_cb, void *cb_args)
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{
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ESP_RETURN_ON_FALSE(mcp && transaction, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcp->memcpy_done_cb = memcpy_done_cb;
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mcp->cb_args = cb_args;
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// mount the data to the DMA descriptor
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async_memcpy_setup_dma2d_descriptor(mcp, transaction);
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// submit the DMA2D request
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dma2d_trans_config_t dma2d_trans_conf = {
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.tx_channel_num = 1,
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.rx_channel_num = 1,
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.channel_flags = DMA2D_CHANNEL_FUNCTION_FLAG_SIBLING,
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.on_job_picked = dma2d_job_picked_cb,
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.user_config = mcp,
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};
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ESP_RETURN_ON_ERROR(dma2d_enqueue(mcp->client, &dma2d_trans_conf, mcp->trans_desc), TAG, "DMA2D enqueue failed");
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return ESP_OK;
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}
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@ -69,6 +69,8 @@ extern "C" {
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// Peripheral selection ID register field width
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#define DMA2D_LL_CHANNEL_PERIPH_SEL_BIT_WIDTH (3)
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#define DMA2D_LL_DESC_ALIGNMENT 8 // Descriptor must be aligned to 8 bytes
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///////////////////////////////////// Common /////////////////////////////////////////
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/**
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* @brief Enable the bus clock for 2D-DMA module
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